[all-commits] [llvm/llvm-project] a0b6cf: [RISCV] Add MC layer support for XSfmm*. (#133031)

Craig Topper via All-commits all-commits at lists.llvm.org
Wed May 21 08:26:57 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a0b6cfd9752742ff599364545ca9996cee67ef9b
      https://github.com/llvm/llvm-project/commit/a0b6cfd9752742ff599364545ca9996cee67ef9b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-05-21 (Wed, 21 May 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    A clang/test/Preprocessor/riscv-target-features-sifive.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/include/llvm/TargetParser/RISCVTargetParser.h
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    A llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/TargetParser/RISCVTargetParser.cpp
    A llvm/test/CodeGen/RISCV/attributes-sifive.ll
    M llvm/test/CodeGen/RISCV/features-info.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir
    A llvm/test/MC/RISCV/attribute-arch-sifive.s
    A llvm/test/MC/RISCV/rvv/xsfmm-invalid.s
    A llvm/test/MC/RISCV/rvv/xsfmm.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add MC layer support for XSfmm*. (#133031)

This adds assembler/disassembler support for XSfmmbase 0.6 and related
SiFive matrix multiplication extensions based on the spec here
https://www.sifive.com/document-file/xsfmm-matrix-extensions-specification

Functionality-wise, this is the same as the Zvma extension proposal that
SiFive shared with the Attached Matrix Extension Task Group. The
extension names and instruction mnemonics have been changed to use
vendor prefixes.

Note this is a non-conforming extension as the opcodes used here are in
the standard opcode space in OP-V or OP-VE.

---------

Co-authored-by: Brandon Wu <brandon.wu at sifive.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list