[all-commits] [llvm/llvm-project] 07e2ba: [AMDGPU] Set AS8 address width to 48 bits

[Alexander Richardson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 07e2ba445df7d277e5195c0ec85b133735ea76e3
      https://github.com/llvm/llvm-project/commit/07e2ba445df7d277e5195c0ec85b133735ea76e3
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2025-05-19 (Mon, 19 May 2025)

  Changed paths:
    M clang/lib/Basic/Targets/AMDGPU.cpp
    M clang/test/CodeGen/target-data.c
    M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/test/Analysis/StackSafetyAnalysis/extend-ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll
    M llvm/test/CodeGen/AMDGPU/ptrmask.ll
    M llvm/test/Transforms/AlignmentFromAssumptions/amdgpu-crash.ll
    M llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll
    M llvm/test/Transforms/FunctionAttrs/make-buffer-rsrc.ll
    M llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
    M llvm/test/Transforms/InferAddressSpaces/X86/noop-ptrint-pair.ll
    M llvm/test/Transforms/LoopLoadElim/pr46854-adress-spaces.ll
    M llvm/test/Transforms/OpenMP/attributor_pointer_offset_crash.ll
    M llvm/test/Transforms/OpenMP/indirect_call_kernel_info_crash.ll
    M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
    M llvm/test/Transforms/OpenMP/spmdization_kernel_env_dep.ll
    M llvm/test/Transforms/OpenMP/values_in_offload_arrays.alloca.ll
    M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
    M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
    M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
    M mlir/test/Target/LLVMIR/omptarget-memcpy-align-metadata.mlir
    M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
    M mlir/test/Target/LLVMIR/omptarget-private-llvm.mlir
    M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-wsloop-collapsed.mlir
    M mlir/test/Target/LLVMIR/omptarget-wsloop.mlir

  Log Message:
  -----------
  [AMDGPU] Set AS8 address width to 48 bits

Of the 128-bits of buffer descriptor only 48 bits are address bits, so
following the discussion on https://discourse.llvm.org/t/clarifiying-the-semantics-of-ptrtoint/83987/54,
the logic conclusion is to set the index width to 48 bits instead of
the current value of 128.

Most of the test changes are mechanical datalayout updates, but there
is one actual change: the ptrmask test now uses .i48 instead of .i128
and I had to update SelectionDAGBuilder to correctly extend the mask.

Reviewed By: krzysz00

Pull Request: https://github.com/llvm/llvm-project/pull/139419



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