[all-commits] [llvm/llvm-project] ffeecb: [llvm-exegesis] Disable test
Akash Banerjee via All-commits
all-commits at lists.llvm.org
Mon May 19 08:31:47 PDT 2025
Branch: refs/heads/users/Akash/implicit_default_mapper
Home: https://github.com/llvm/llvm-project
Commit: ffeecb8836b00cf30ec53976a8816fe049d6b52d
https://github.com/llvm/llvm-project/commit/ffeecb8836b00cf30ec53976a8816fe049d6b52d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/AArch64/skip_unsupported_instructions.s
Log Message:
-----------
[llvm-exegesis] Disable test
This patch disables the skip unsupported instructions test on AArch64. On
machines that have hardware support for pointer authentication the test will
try and disable certain features, but currently fails depending upon the
configuration.
Commit: bc9358d7aa09474015ee0ecc6876d514813c9194
https://github.com/llvm/llvm-project/commit/bc9358d7aa09474015ee0ecc6876d514813c9194
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/M68k/CMakeLists.txt
M llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/M68k/M68kInstrInfo.td
A llvm/lib/Target/M68k/M68kSelectionDAGInfo.cpp
A llvm/lib/Target/M68k/M68kSelectionDAGInfo.h
M llvm/lib/Target/M68k/M68kSubtarget.cpp
M llvm/lib/Target/M68k/M68kSubtarget.h
Log Message:
-----------
[M68k] TableGen-erate SDNode descriptions (#139449)
This consolidates node definitions into one place and enables automatic
node verification.
Part of #119709.
Commit: 4b0ec204645d4ae8e5c2f17901fae551bf9e9894
https://github.com/llvm/llvm-project/commit/4b0ec204645d4ae8e5c2f17901fae551bf9e9894
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
Log Message:
-----------
[llvm] clang-format llvm/CodeGen/Passes.h (#139951)
Reformat a few header files under llvm/include/llvm/CodeGen/Passes.h
with clang-format in preparation for a codemod.
This is just a formatting change; no functionality is impacted.
Commit: cc1cc973debe71888c15ff4d21e80a71e2cbdf90
https://github.com/llvm/llvm-project/commit/cc1cc973debe71888c15ff4d21e80a71e2cbdf90
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/InProcessModuleCache.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
[clang][modules] Timestamp-less validation API (#138983)
Timestamps are an implementation detail of the cross-process module
cache implementation. This PR hides it from the `ModuleCache` API, which
simplifies the in-process implementation.
Commit: 6a492b7ff08c6280a71b49b8a81eb0e8c67e474b
https://github.com/llvm/llvm-project/commit/6a492b7ff08c6280a71b49b8a81eb0e8c67e474b
Author: Thurston Dang <thurston at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
Fix-forward build error from #132489
Replace deprecated use of getDeclaration that was added in #132489
llvm/lib/IR/AutoUpgrade.cpp:1480:26: error: 'getDeclaration' is deprecated: Use getOrInsertDeclaration instead [-Werror,-Wdeprecated-declarations]
1480 | NewFn = Intrinsic::getDeclaration(
| ^~~~~~~~~~~~~~
| getOrInsertDeclaration
Commit: 941438e458884502d5e72326f828fd291525361c
https://github.com/llvm/llvm-project/commit/941438e458884502d5e72326f828fd291525361c
Author: James Newling <james.newling at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
Log Message:
-----------
[mlir][vector] Additional transpose folding (#138347)
Fold transpose with unit-dimensions. Seen in the wild:
```
%0 = vector.transpose %arg, [0, 2, 1, 3] : vector<6x1x1x4xi8> to vector<6x1x1x4xi8>
```
This transpose can be folded because (1) it preserves the shape and (2)
the shuffled dims are unit extent.
Also addresses comment about static vs anonymous namespace:
https://github.com/llvm/llvm-project/pull/135841#discussion_r2071869067
---------
Signed-off-by: James Newling <james.newling at gmail.com>
Commit: 0f8836a10c26918f297a7dfc4b89bac26cb5830c
https://github.com/llvm/llvm-project/commit/0f8836a10c26918f297a7dfc4b89bac26cb5830c
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
Log Message:
-----------
[NVPTX] Further refactor intrinsic definitions to remove redundancy (NFC) (#139924)
Note: the diff indicates this change has no impact on the intrinsic code
generated by table-gen.
Commit: 5ef0dc609c25a963da9ce56a85e44a7c5f89c209
https://github.com/llvm/llvm-project/commit/5ef0dc609c25a963da9ce56a85e44a7c5f89c209
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
R offload/test/offloading/gpupgo/pgo1.c
R offload/test/offloading/gpupgo/pgo2.c
A offload/test/offloading/gpupgo/pgo_atomic_teams.c
A offload/test/offloading/gpupgo/pgo_atomic_threads.c
A offload/test/offloading/gpupgo/pgo_device_and_host.c
A offload/test/offloading/gpupgo/pgo_device_only.c
Log Message:
-----------
[PGO][Offload] Update PGO GPU tests (#132262)
Commit: e2af5029703bfc75a388c70dbdded18ffb191aae
https://github.com/llvm/llvm-project/commit/e2af5029703bfc75a388c70dbdded18ffb191aae
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir] [vector] Add linearization pattern for vector.create_mask (#138214)
This PR is a breakdown [3 / 4] of the PR #136193
The PR adds linearization patterns for vector.create_mask
Commit: 1958cef7c91a4fe0d1b86db53fd2ebec7035cf8e
https://github.com/llvm/llvm-project/commit/1958cef7c91a4fe0d1b86db53fd2ebec7035cf8e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
Log Message:
-----------
[gn] port 3bdfa6f3e8eb
Commit: 5531f87c29f871a371ecd90b5896b7f675c775b9
https://github.com/llvm/llvm-project/commit/5531f87c29f871a371ecd90b5896b7f675c775b9
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn] port ec406e86745af
Commit: 784032d53206591b3a3c7bb6f960cf5f114b0c28
https://github.com/llvm/llvm-project/commit/784032d53206591b3a3c7bb6f960cf5f114b0c28
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 0ab67ec19167
Commit: d0da71bf1d019e04efdd780c36bcce1d67ce0176
https://github.com/llvm/llvm-project/commit/d0da71bf1d019e04efdd780c36bcce1d67ce0176
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 14836597f5d8
Commit: 4298b57f1004d0a95f37d18e9971222ccc0d46eb
https://github.com/llvm/llvm-project/commit/4298b57f1004d0a95f37d18e9971222ccc0d46eb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 5b9246517f8f
Commit: 8c035f9b9521ce057df242a52f1cbf106f4b53d0
https://github.com/llvm/llvm-project/commit/8c035f9b9521ce057df242a52f1cbf106f4b53d0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/unittests/ADT/BitmaskEnumTest.cpp
Log Message:
-----------
[ADT] Add operator! to BitmaskEnum (#139958)
Add a logical (boolean) "not" operator.
Commit: 71dc381e2fee7144a587b8a359a54461ae95b227
https://github.com/llvm/llvm-project/commit/71dc381e2fee7144a587b8a359a54461ae95b227
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/InProcessModuleCache.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
Revert "[clang][modules] Timestamp-less validation API" (#139987)
Reverts llvm/llvm-project#138983
Commit: 13de8df301f2e47431e6e412013c44528a3521c8
https://github.com/llvm/llvm-project/commit/13de8df301f2e47431e6e412013c44528a3521c8
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/ExecutionEngine/JitRunner.cpp
R mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-entry-point.mlir
Log Message:
-----------
[mlir-runner] Check entry function does not expect arguments (#136825)
This PR fixes a crash if entry function has inputs. Fixes #136143.
Commit: 9ea453f0159f5063b7db53294e58a7718d51481e
https://github.com/llvm/llvm-project/commit/9ea453f0159f5063b7db53294e58a7718d51481e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
Log Message:
-----------
[HLSL] Add resource constructor with implicit binding for global resources (#138976)
Adds constructor for resources with implicit binding and applies it to
all resources without binding at the global scope.
Adds Clang builtin function
`__builtin_hlsl_resource_handlefromimplicitbinding` that gets translated
to `llvm.dx|spv.resource.handlefromimplicitbinding` intrinsic calls.
Specific bindings are assigned in DXILResourceImplicitBinding pass.
Design proposals:
https://github.com/llvm/wg-hlsl/blob/main/proposals/0024-implicit-resource-binding.md
https://github.com/llvm/wg-hlsl/blob/main/proposals/0025-resource-constructors.md
One change from the proposals is that the `orderId` parameter is added
onto the constructor. Originally it was supposed to be generated in
codegen when the `llvm.dx|spv.resource.handlefromimplicitbinding` call
is emitted, but that is not possible because the call is inside a
constructor, and the constructor body is generated once per resource
type and not resource instance. So the only way to inject instance-based
data like `orderId` into the
`llvm.dx|spv.resource.handlefromimplicitbinding` call is that it must
come in via the constructor argument.
Closes #136784
Commit: dd33de841d940ff5b7e2490b22416c5c001afd30
https://github.com/llvm/llvm-project/commit/dd33de841d940ff5b7e2490b22416c5c001afd30
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/xandesvdot-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Andes XAndesVDot (Andes Vector Dot Product) extension. (#139849)
The spec can be found at:
https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release.
This patch only supports assembler.
Intrinsics support will be added in a later patch.
Commit: e554c98c65f618038bbe0f096f8a93facbdd1a33
https://github.com/llvm/llvm-project/commit/e554c98c65f618038bbe0f096f8a93facbdd1a33
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
A llvm/include/llvm/IR/IntrinsicsRISCVXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
Log Message:
-----------
[RISCV] Support LLVM IR intrinsics for XAndesVPackFPH (#139860)
This patch adds LLVM IR intrinsic support for XAndesVPackFPH.
The document for the intrinsics can be found at:
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
and with policy variants
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/policy_funcs/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
The clang part will be added in a later patch.
Co-authored-by: Tony Chuan-Yue Yuan <yuan593 at andestech.com>
Commit: ce2126cfa9814e441cba62ce425c0600e3c48232
https://github.com/llvm/llvm-project/commit/ce2126cfa9814e441cba62ce425c0600e3c48232
Author: Matt <msta at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Module.h
A clang/test/Modules/pr130712.cppm
Log Message:
-----------
[clang] Fix a segfault when M is a nullptr (#130712)
If `MM->getOwningModule` returns nullptr, then `isVisible` is called
with nullptr, which then calls `getImportLoc(nullptr)`
https://github.com/llvm/llvm-project/blob/077e0c134a31cc16c432ce685458b1de80bfbf84/clang/lib/Lex/PPMacroExpansion.cpp#L208
Commit: 538b790b814a4d85cee063e489ab3b40b797594b
https://github.com/llvm/llvm-project/commit/538b790b814a4d85cee063e489ab3b40b797594b
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-arch.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
A llvm/lib/Target/RISCV/RISCVInstrInfoQ.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/rv32q-invalid.s
A llvm/test/MC/RISCV/rv64q-invalid.s
A llvm/test/MC/RISCV/rv64q-valid.s
A llvm/test/MC/RISCV/rvq-aliases-valid.s
A llvm/test/MC/RISCV/rvq-pseudos.s
A llvm/test/MC/RISCV/rvq-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add support for Q extension (#139369)
Closes #130217.
https://github.com/riscv/riscv-isa-manual/blob/main/src/q-st-ext.adoc
Commit: d4fd4489758b0cb597f897a95490a28ac52f59fb
https://github.com/llvm/llvm-project/commit/d4fd4489758b0cb597f897a95490a28ac52f59fb
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
A llvm/test/MC/RISCV/rv64zfa-only-valid.s
M llvm/test/MC/RISCV/zfa-invalid.s
A llvm/test/MC/RISCV/zfa-quad-invalid.s
M llvm/test/MC/RISCV/zfa-valid.s
Log Message:
-----------
[RISCV][MC] Add Q support for Zfa (#139508)
https://github.com/riscv/riscv-isa-manual/blob/main/src/zfa.adoc
Commit: ff50baa10f0bbddeb665bedd22191ea077426730
https://github.com/llvm/llvm-project/commit/ff50baa10f0bbddeb665bedd22191ea077426730
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoQ.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
Log Message:
-----------
[RISCV][Scheduler] Add scheduler definitions for the Q extension (#139495)
Commit: ee82c089904cc4a13ef13d5009fbbabea25bf9f5
https://github.com/llvm/llvm-project/commit/ee82c089904cc4a13ef13d5009fbbabea25bf9f5
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
M llvm/include/llvm/Support/FileOutputBuffer.h
M llvm/lib/Support/FileOutputBuffer.cpp
M llvm/unittests/Support/FileOutputBufferTest.cpp
Log Message:
-----------
Support,lld: Rename misnamed F_no_mmap to F_mmap
`F_no_mmap` introduced by https://reviews.llvm.org/D69294 is misnamed.
It oughts to be `F_mmap`
When the output is a regular file or do not exist,
`--no-mmap-output-file` is the default. Relands #134787 by fixing the
lld option default. Note: changing the default to --map-output-file
would likely fail on llvm-clang-x86_64-sie-win
(https://lab.llvm.org/buildbot/#/builders/46/builds/14847)
Pull Request: https://github.com/llvm/llvm-project/pull/139836
Commit: f016aa77e1b83d8da07df7cb52ee90aaa802e1db
https://github.com/llvm/llvm-project/commit/f016aa77e1b83d8da07df7cb52ee90aaa802e1db
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
[GVN][NFC] Add MSSA checks in tests 2/N (#137814)
The previous patch in this series is #130261
Commit: 90e2e05b85ab5523387d03301b738e736f1468a7
https://github.com/llvm/llvm-project/commit/90e2e05b85ab5523387d03301b738e736f1468a7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[llvm] Construct SmallVector with ArrayRef (NFC) (#139992)
Commit: f70d9101de65b0847d6854d272b70eed92c550f1
https://github.com/llvm/llvm-project/commit/f70d9101de65b0847d6854d272b70eed92c550f1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[AMDGPU] Use std::optional::value_or (NFC) (#140006)
Commit: 1fdeae2b2d8750bd6f61666d6312c2edb7596e76
https://github.com/llvm/llvm-project/commit/1fdeae2b2d8750bd6f61666d6312c2edb7596e76
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/include/__fwd/pair.h
M libcxx/include/__memory/uses_allocator_construction.h
M libcxx/include/__node_handle
M libcxx/include/__tree
M libcxx/include/map
M libcxx/test/libcxx/containers/associative/tree_key_value_traits.pass.cpp
M libcxx/utils/gdb/libcxx/printers.py
Log Message:
-----------
[libc++] Avoid type-punning between __value_type and pair (#134819)
Before this patch, we were dereferencing pointers to objects which were
never constructed. Now we always assume that nodes store `pair<const
KeyT, ValueT>` for maps instead, as they actually do. This patch also
allows for significant follow-up simplifications, since
`__node_value_type` and `__container_value_type` are the same type now.
Commit: f1e1821f860114b296385bb69d8464c40b9fde1a
https://github.com/llvm/llvm-project/commit/f1e1821f860114b296385bb69d8464c40b9fde1a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: Fix minimumnum/maximumnum nan handling phrasing (#139228)
Make this consistent with other operations with respect to
signaling nan quieting. This was specifying that quieting is
required, which is true for IEEE. Make this consistent with other
IR operations, and signaling nan quieting is possible but optional
in the case where there are two nan inputs.
This permits directly selecting the intrinsic to the hardware
instruction in the default floating-point environment for shaders.
Commit: ceb38c7477239d3466915c3449dc66901ec8a723
https://github.com/llvm/llvm-project/commit/ceb38c7477239d3466915c3449dc66901ec8a723
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
A llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
Log Message:
-----------
Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)
SMECallAttrs is a new helper class that holds all the SMEAttrs for a
call. The interfaces to query actions needed for the call (e.g. change
streaming mode) have been moved to the SMECallAttrs class.
The main motivation for this change is to make the split between the
caller, callee, and callsite attributes more apparent.
Before this change, we would always merge callsite and callee
attributes. The main reason to do this was to handle indirect calls,
however, we also occasionally used callsite attributes on direct calls
in tests (mainly to avoid creating multiple function declarations). With
this patch, we now explicitly handle indirect calls and disallow
incompatible attributes on direct calls (so this patch is not entirely
an NFC).
Same as #137239, but with a change to avoid inferring SME attributes for
function definitions. This allows stubbing the SME ABI routines in C/C++
(and matches the old behaviour).
Commit: 06be5a530166f216270a2146ba6b7d61c4ba0243
https://github.com/llvm/llvm-project/commit/06be5a530166f216270a2146ba6b7d61c4ba0243
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/include/lldb/Core/Address.h
M lldb/source/Core/Address.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/test/Shell/Unwind/Inputs/basic-block-sections-with-dwarf.s
M lldb/test/Shell/Unwind/basic-block-sections-with-dwarf-static.test
Log Message:
-----------
[lldb] Fix offset computation in RegisterContextUnwind (#137155)
AddressFunctionScope was always returning the first address range of the
function (assuming it was the only one). This doesn't work for
RegisterContextUnwind (it's only caller), when the function doesn't
start at the lowest address because it throws off the 'how many bytes
"into" a function I am' computation. This patch replaces the result with
a call to (recently introduced)
SymbolContext::GetFunctionOrSymbolAddress.
Commit: facde6e631b505c16c147bfc1d5d1f51ac875ca6
https://github.com/llvm/llvm-project/commit/facde6e631b505c16c147bfc1d5d1f51ac875ca6
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A clang/test/Headers/__clang_hip_cmath-return_types.hip
Log Message:
-----------
Pre-Commit tests: [HIP] Fix return type in __clang_hip_cmath.h (#139891)
Tests related to https://github.com/llvm/llvm-project/pull/139697
Commit: 6d3dd8206a86b28299b0eae9f55def16a93e93aa
https://github.com/llvm/llvm-project/commit/6d3dd8206a86b28299b0eae9f55def16a93e93aa
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-all-indirect-accesses.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
[AMDGPU] Add flag to prevent reruns of LowerModuleLDS (#129520)
FullLTO has to run this early before module splitting occurs otherwise
module splitting won't work as expected. There was a targeted fix for
fortran on another branch that disables the LTO run but that'd break
full LTO module splitting entirely.
Test changes are due to metadata indexes shifting.
See #122891
Commit: 57e95bf17ae8d5b55f1ced84c0a57d01e6adc05d
https://github.com/llvm/llvm-project/commit/57e95bf17ae8d5b55f1ced84c0a57d01e6adc05d
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
Log Message:
-----------
[mlir][x86vector] Improve intrinsic operands creation (#138666)
Refactors intrinsic op interface to delegate initial operands mapping to
the dialect converter and allow intrinsic operands getters to only
perform last mile post-processing.
Commit: 9a5cc37d69876049080cb73f6482ac5baa376801
https://github.com/llvm/llvm-project/commit/9a5cc37d69876049080cb73f6482ac5baa376801
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
A llvm/test/CodeGen/AArch64/nofpclass.ll
A llvm/test/CodeGen/ARM/nofpclass.ll
A llvm/test/CodeGen/Mips/nofpclass.ll
A llvm/test/CodeGen/X86/nofpclass.ll
Log Message:
-----------
CodeGen: Add ISD::AssertNoFPClass (#138839)
It is used to mark a value that we are sure that it is not some fcType.
The examples include:
* An arguments of a function is marked with nofpclass
* Output value of an intrinsic can be sure to not be some type
So that the following operation can make some assumptions.
Commit: 8d0784a25b7b4a58382c398c693a70fd4bd21c57
https://github.com/llvm/llvm-project/commit/8d0784a25b7b4a58382c398c693a70fd4bd21c57
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[SelectionDAG] Add an ISD node for for get.active.lane.mask (#139084)
For now expansion still happens in SelectionDAGBuilder when
GET_ACTIVE_LANE_MASK is not legal on the target.
This patch also includes changes in AArch64ISelLowering to replace
handling of the get.active.lane.mask intrinsic to use the ISD node.
Tablegen patterns are added which match to whilelo for scalable types.
A follow up change will add support for more types to be lowered to
GET_ACTIVE_LANE_MASK by allowing splitting of the node.
Commit: 05c3357a82fa210340da8a6d83be7006dc566db9
https://github.com/llvm/llvm-project/commit/05c3357a82fa210340da8a6d83be7006dc566db9
Author: Alexander Romanov <alexander.romanov at syntacore.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
Log Message:
-----------
[RISCV] Change type of Zicbop prefetch operand to GPRMem (#139888)
Prior to this commit PREFETCH_* instructions considered their operand
register to be a simple GPR which is not entirely correct as it is a
base address for possible prefetching operation (According to cmobase
v1.0.1)
Commit: 16740c7651a5af73afd3c605e9ed47267f4c6cba
https://github.com/llvm/llvm-project/commit/16740c7651a5af73afd3c605e9ed47267f4c6cba
Author: George Chaltas <george.chaltas at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Initialize IR block pointers in ILV. (NFC) (#139807)
Setting unitialized pointers to nullptr in InnerLoopVectorizer()
constructor. These were noticed during a review of the code. Seems like
a good idea to clean them up.
Commit: 41d28276bb21b0b29bb3a1107e804363c166ad76
https://github.com/llvm/llvm-project/commit/41d28276bb21b0b29bb3a1107e804363c166ad76
Author: Pablo Antonio Martinez <pablo.antonio.martinez at huawei.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
Log Message:
-----------
[mlir][Transform] Reuse bbArgs in FuseIntoContainingOp (#135066)
When fusing two ops with the same output operand using
FuseIntoContainingOp, the current implementation makes both ops write
into a different value pointing to the same tensor. This, in the end,
will bufferize into two different buffers, which is sub-optimal. The
current patch solves this problem, adding support to reuse the tensor by
both consumer and producer.
More precisely, before FuseIntoContainingOp is applied, we may have two
ops that write into the same output tensor. However, the consumer would
be tiled, thus the op would write into the loop iter_args (i.e., it does
not write directly into the original tensor). When the producer is fused
into the loop, the output tensor of the producer remains the same, so
the consumer and producer writes into two different values (consumer
writes into the iter_args and producer into the original tensor).
The current patch clones the consumer into the loop and checks if the
consumer is writing to the same value pointed by the loop inits, in
which case, it makes the output point to such tensor.
Commit: f064cb1ee96e2955cf617861118d66b7fa15544d
https://github.com/llvm/llvm-project/commit/f064cb1ee96e2955cf617861118d66b7fa15544d
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-arith-saturating.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/fix-shuffle-vector-be-rev.ll
M llvm/test/CodeGen/AArch64/fp16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-bitcast.ll
M llvm/test/CodeGen/AArch64/neon-insert-sve-elt.ll
M llvm/test/CodeGen/AArch64/neon-insextbitcast.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/vector-fcvt.ll
Log Message:
-----------
[AArch64] Prefer using DUP instead of INS where possible (#138549)
Replace all instances of `INS(IMPLICIT_DEF, 0, v, idx)` with
`DUP(v, idx)` in instruction selection.
`INS` (e.g. `mov v0.s[0], v1.s[1]`) has a value dependency on its output
register, which becomes a false dependency when we're inserting into an
`IMPLICIT_DEF` register. We can break this false dependency by using
`DUP` (e.g. `mov s0, v1.s[1]`) instead.
Commit: ab8291683662d5ef064057ebf62ff5ff41e0ebd6
https://github.com/llvm/llvm-project/commit/ab8291683662d5ef064057ebf62ff5ff41e0ebd6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/src/.clang-tidy
M libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/libcxx/clang_tidy.sh.py
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] run clang-tidy on src/ in the CI (#121198)
This adds a new test to run clang-tidy on the `src/` directory and
temporarily disables and clang-tidy checks that currently fail. They
will be enabled in follow-up patches.
Commit: f8d0d93ed2b0e381b2c997a52704d92c016911dd
https://github.com/llvm/llvm-project/commit/f8d0d93ed2b0e381b2c997a52704d92c016911dd
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
Log Message:
-----------
[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. (#139904)
`SIMDScalarLShiftDTied` should be using `vecshiftL64` to match
the immediate argument rather than `vecshiftR64` as the latter
prevents the pattern from matching 0 (and allows 64 instead).
Fixes #139879.
Commit: 7a839e1d93aa0bbd33f3d71fb43a840cc71282ea
https://github.com/llvm/llvm-project/commit/7a839e1d93aa0bbd33f3d71fb43a840cc71282ea
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/include/__format/format_functions.h
M libcxx/test/benchmarks/format/format.bench.cpp
Log Message:
-----------
[libc++] Add basic constant folding for std::format (#107197)
```
-------------------------------------------------------------------
Benchmark old new
-------------------------------------------------------------------
BM_format_string<char>/1 42.1 ns 7.67 ns
BM_format_string<char>/2 22.3 ns 3.84 ns
BM_format_string<char>/4 10.6 ns 1.92 ns
BM_format_string<char>/8 5.31 ns 0.815 ns
BM_format_string<char>/16 2.79 ns 0.480 ns
BM_format_string<char>/32 1.63 ns 0.550 ns
BM_format_string<char>/64 0.782 ns 0.276 ns
BM_format_string<char>/128 0.397 ns 0.145 ns
BM_format_string<char>/256 0.211 ns 0.066 ns
BM_format_string<char>/512 0.154 ns 0.035 ns
BM_format_string<char>/1024 0.146 ns 0.021 ns
BM_format_string<char>/2048 0.125 ns 0.033 ns
BM_format_string<char>/4096 0.097 ns 0.016 ns
BM_format_string<char>/8192 0.077 ns 0.012 ns
BM_format_string<char>/16384 0.066 ns 0.010 ns
BM_format_string<char>/32768 0.062 ns 0.016 ns
BM_format_string<char>/65536 0.062 ns 0.016 ns
BM_format_string<char>/131072 0.443 ns 0.015 ns
BM_format_string<char>/262144 0.629 ns 0.017 ns
BM_format_string<char>/524288 0.715 ns 0.020 ns
BM_format_string<char>/1048576 0.757 ns 0.020 ns
BM_format_string<wchar_t>/1 38.8 ns 34.0 ns
BM_format_string<wchar_t>/2 19.4 ns 16.9 ns
BM_format_string<wchar_t>/4 9.88 ns 8.45 ns
BM_format_string<wchar_t>/8 6.30 ns 6.47 ns
BM_format_string<wchar_t>/16 3.11 ns 3.21 ns
BM_format_string<wchar_t>/32 1.60 ns 1.63 ns
BM_format_string<wchar_t>/64 0.899 ns 0.925 ns
BM_format_string<wchar_t>/128 0.676 ns 0.693 ns
BM_format_string<wchar_t>/256 0.658 ns 0.685 ns
BM_format_string<wchar_t>/512 0.556 ns 0.531 ns
BM_format_string<wchar_t>/1024 0.428 ns 0.402 ns
BM_format_string<wchar_t>/2048 0.328 ns 0.319 ns
BM_format_string<wchar_t>/4096 0.276 ns 0.274 ns
BM_format_string<wchar_t>/8192 0.252 ns 0.251 ns
BM_format_string<wchar_t>/16384 0.248 ns 0.246 ns
BM_format_string<wchar_t>/32768 0.229 ns 0.232 ns
BM_format_string<wchar_t>/65536 0.248 ns 0.246 ns
BM_format_string<wchar_t>/131072 0.250 ns 0.240 ns
BM_format_string<wchar_t>/262144 3.03 ns 3.03 ns
BM_format_string<wchar_t>/524288 3.14 ns 3.15 ns
BM_format_string<wchar_t>/1048576 3.60 ns 3.61 ns
BM_string_without_formatting<char> 32.2 ns 0.470 ns
BM_string_without_formatting<wchar_t> 38.8 ns 10.2 ns
```
Commit: 5d15c7b6647c6b5a7e774a139ca30d689400b7c4
https://github.com/llvm/llvm-project/commit/5d15c7b6647c6b5a7e774a139ca30d689400b7c4
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_cmath.h
M clang/test/Headers/__clang_hip_cmath-return_types.hip
Log Message:
-----------
[HIP] Fix return type in __clang_hip_cmath.h (#139697)
Before, some functions like `isgreater(float, double)` would return a
`double` instead of a `bool`.
Stumbled upon this bug while trying to adapt
[`External/CUDA/cmath.cu`](https://github.com/llvm/llvm-test-suite/blob/main/External/CUDA/cmath.cu)
to HIP.
```
/_llvm-test-suite/External/HIP/../CUDA/math_h.cu:617:20: error: static assertion failed due to requirement 'std::is_same<double, bool>::value':
617 | static_assert((std::is_same<decltype(isgreater((float)0, (double)0)), bool>::value), "");
```
Commit: 4f92dc1d6389589fe100f1462b2abb7f87fae7a5
https://github.com/llvm/llvm-project/commit/4f92dc1d6389589fe100f1462b2abb7f87fae7a5
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
Log Message:
-----------
[SPIR-V] Fix LIT tests, improve ICmpInst's type inference (#139726)
1. There are failed LIT tests at the moment due to type inference
errors.
```
Failed Tests (3):
LLVM :: CodeGen/SPIRV/pointers/ptr-eq-types.ll
LLVM :: CodeGen/SPIRV/validate/sycl-hier-par-basic.ll
LLVM :: CodeGen/SPIRV/validate/sycl-tangle-group-algorithms.ll
```
This PR improves type inference to fix the errors.
2. The following tests start passing:
```
Unexpectedly Passed Tests (2):
LLVM :: CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
LLVM :: CodeGen/SPIRV/pointers/resource-addrspacecast.ll
```
This PR removes XFAILS in those two test cases.
Commit: 854179f0c0e993f283927ca63694dbb6f8ca8677
https://github.com/llvm/llvm-project/commit/854179f0c0e993f283927ca63694dbb6f8ca8677
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/long-pointer-distance.ll
Log Message:
-----------
[LAA/SLP] Don't truncate APInt in getPointersDiff (#139941)
Change getPointersDiff to return an std::optional<int64_t>, and fill
this value with using APInt::trySExtValue. This simple change requires
changes to other functions in LAA, and major changes in SLPVectorizer
changing types from 32-bit to 64-bit.
Fixes #139202.
Commit: ef08c651b3f97265f73152b9ca73d8e683fbd64e
https://github.com/llvm/llvm-project/commit/ef08c651b3f97265f73152b9ca73d8e683fbd64e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/pr63108.ll
Log Message:
-----------
[X86] pr63108.ll - regenerate test checks
Commit: ed9c3c08bc3bc84c5303981e57a0dc18ee14919b
https://github.com/llvm/llvm-project/commit/ed9c3c08bc3bc84c5303981e57a0dc18ee14919b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
Log Message:
-----------
[X86] machine-combiner-int-vec.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: a924d2b35be4717ab0a115069f1e0ccc63da38ce
https://github.com/llvm/llvm-project/commit/a924d2b35be4717ab0a115069f1e0ccc63da38ce
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/avg-mask.ll
Log Message:
-----------
[X86] avg-mask.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: d69dd979d02ae35e5368e830640d5b651a1175df
https://github.com/llvm/llvm-project/commit/d69dd979d02ae35e5368e830640d5b651a1175df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/avgfloors.ll
Log Message:
-----------
[X86] avgfloors.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: f61a1c9fbe4babc73a06b80152e6b3b555803dcd
https://github.com/llvm/llvm-project/commit/f61a1c9fbe4babc73a06b80152e6b3b555803dcd
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb][lldb-dap] Migrate ScopesRequest to structured types (#138116)
Migrate ScopesRequest To use the Protocol Types
Commit: 9b341435eb6b2981d9dd25f1b671da7009e29fd4
https://github.com/llvm/llvm-project/commit/9b341435eb6b2981d9dd25f1b671da7009e29fd4
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lld/COFF/COFFLinkerContext.h
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/test/COFF/arm64ec-entry-mangle.test
M lld/test/COFF/arm64ec-hybmp.s
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-patchable-thunks.test
M lld/test/COFF/arm64ec-range-thunks.s
M lld/test/COFF/arm64ec.test
M lld/test/COFF/arm64x-altnames.s
M lld/test/COFF/arm64x-buildid.s
M lld/test/COFF/arm64x-comm.s
M lld/test/COFF/arm64x-crt-sec.s
M lld/test/COFF/arm64x-ctors-sec.s
M lld/test/COFF/arm64x-guardcf.s
M lld/test/COFF/arm64x-import.test
M lld/test/COFF/arm64x-symtab.s
M lld/test/COFF/arm64x-wrap.s
M lld/test/COFF/autoimport-arm64ec-data.test
Log Message:
-----------
[LLD][COFF] Add support for including native ARM64 objects in ARM64EC images (#137653)
MSVC linker accepts native ARM64 object files as input with
`-machine:arm64ec`, similar to `-machine:arm64x`. Its usefulness is very
limited; for example, both exports and imports are not reflected in the
PE structures and can't work. However, their symbol tables are otherwise
functional.
Since we already have handling of multiple symbol tables implemented for
ARM64X, the required changes are mostly about adjusting relevant checks
to account for them on the ARM64EC target.
Delay-load helper handling is a bit of a shortcut. The patch never pulls
it for native object files and just ensures that the code is fine with
that. In general, I think it would be nice to adjust the driver to pull
it only when it's actually referenced, which would allow applying the
same logic to the native symbol table on ARM64EC without worrying about
pulling too much.
Commit: 3b02844052b294e5f6c5744e4d14da536fa2f031
https://github.com/llvm/llvm-project/commit/3b02844052b294e5f6c5744e4d14da536fa2f031
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/aarch64/chkstk.S
M compiler-rt/lib/builtins/aarch64/lse.S
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
M compiler-rt/lib/builtins/clear_cache.c
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64.h
M compiler-rt/lib/builtins/fp_compare_impl.inc
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/builtins/udivmodti4.c
M compiler-rt/test/builtins/Unit/enable_execute_stack_test.c
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
[compiler-rt] Add initial ARM64EC builtins support (#139279)
Use the aarch64 variants of assembly functions.
Co-authored-by: Billy Laws <blaws05 at gmail.com>
Commit: 3360b458c777dd789185ad057a6dc5b49bc8c8ef
https://github.com/llvm/llvm-project/commit/3360b458c777dd789185ad057a6dc5b49bc8c8ef
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[AMDGPU] Simplify getIns64. NFCI. (#139981)
This big switch is unmaintainable and buggy. In particular it
unconditionally
adds clamp if there is omod to VOP3.
Commit: 62379b1001b08c3df4ae65e3bb948085727692af
https://github.com/llvm/llvm-project/commit/62379b1001b08c3df4ae65e3bb948085727692af
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[NFC][lldb][lldb-dap] fix C++20 extension warning (#140031)
warning for designated initializers
introduced in commit 4ba8f4e
Commit: a5558027dd8d410ff644957c840e2880ca542750
https://github.com/llvm/llvm-project/commit/a5558027dd8d410ff644957c840e2880ca542750
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
A lld/test/COFF/arm64x-sameaddress.test
Log Message:
-----------
[LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631)
Make it a no-op for now, which is sufficient for non-hybrid images.
Fixes #131712.
Commit: 6e5dd66e946abd02cee3b8c0b52776f02843e954
https://github.com/llvm/llvm-project/commit/6e5dd66e946abd02cee3b8c0b52776f02843e954
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
Log Message:
-----------
[NVPTX] Add TMA Bulk Copy Intrinsics (#138679)
This patch adds a new variant of TMA Bulk Copy
intrinsics introduced in sm100+. This variant
has an additional byte_mask to select the bytes
for the copy operation.
* Selection is all done through table-gen now.
So, this patch removes the corresponding
SelectCpAsyncBulkS2G() function.
* lit tests are verified with a cuda-12.8 ptxas
executable.
PTX Spec link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-bulk-copy
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 7b1d73725838fd6147c7b83ee4045a044c390e15
https://github.com/llvm/llvm-project/commit/7b1d73725838fd6147c7b83ee4045a044c390e15
Author: David Green <david.green at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
Log Message:
-----------
[AArch64] Add a test case for the coerced arguments. NFC
Commit: abd0284a9a943e6453d5b01ace9845bfdda580cd
https://github.com/llvm/llvm-project/commit/abd0284a9a943e6453d5b01ace9845bfdda580cd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix discarded LValueToRValueBitCasts (#140034)
We handle discarding fine, but we used to ignore all discarded cast
expressions. Handle bitcasts differently.
Commit: 0699a3d29cb8f5cdcb9ea962937e3b6cd153611b
https://github.com/llvm/llvm-project/commit/0699a3d29cb8f5cdcb9ea962937e3b6cd153611b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Verify dominance for incoming values of phi-like recipes. (#124838)
Update the verifier to verify dominance for incoming values for phi-like
recipes. The defining recipe must dominate the incoming block for the
incoming value.
Builds on top of https://github.com/llvm/llvm-project/pull/138472 to
retrieve incoming values & corresponding blocks for phi-like recipes.
PR: https://github.com/llvm/llvm-project/pull/124838
Commit: 9b9c9013e1b1a1bb6889f79cd36d76933572e7b5
https://github.com/llvm/llvm-project/commit/9b9c9013e1b1a1bb6889f79cd36d76933572e7b5
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
Log Message:
-----------
Complete the Implementation of DAP modules explorer. (#139934)
This extends the TreeView to show the module property as a tree item instead of
rendering it through the markdown tooltip.
Commit: 2de4c7c0a4f65ebdebf2c8eec182c582987ec06f
https://github.com/llvm/llvm-project/commit/2de4c7c0a4f65ebdebf2c8eec182c582987ec06f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenMP/target.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Improve use_device_* handling (#137198)
This patch updates MLIR op verifiers for operations taking arguments
that must always be defined by an `omp.map.info` operation to check this
requirement.
It also modifies Flang lowering for `use_device_{addr, ptr}`, as well as
the custom MLIR printer and parser for these clauses, to support
initializing it to `OMP_MAP_RETURN_PARAM` and represent this in the MLIR
representation as `return_param`. This internal mapping flag is what
eventually is used for variables passed via these clauses into the
target region when translating to LLVM IR, so making it explicit in
Flang and MLIR removes an inconsistency in the current representation.
Commit: e873de0692d6858d8e19c5a761f2552b9266d5ce
https://github.com/llvm/llvm-project/commit/e873de0692d6858d8e19c5a761f2552b9266d5ce
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Assert on map translation functions, NFC (#137199)
This patch adds assertions to map-related MLIR to LLVM IR translation
functions and utils to explicitly document whether they are intended for
host or device compilation only.
Over time, map-related handling has increased in complexity. This is
compounded by the fact that some handling is device-specific and some is
host-specific. By explicitly asserting on these functions on the
expected compilation pass, the flow should become slighlty easier to
follow.
Commit: 4b6bc334db7ccdf611d57a19e39ffecea76521ad
https://github.com/llvm/llvm-project/commit/4b6bc334db7ccdf611d57a19e39ffecea76521ad
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Update check line in verifier unit test w/o assertions.
Should fix failures with assertions disabled, including
https://lab.llvm.org/buildbot/#/builders/2/builds/24015.
Commit: 2c337f9330619d6ccf65594559f9670fd213bfbb
https://github.com/llvm/llvm-project/commit/2c337f9330619d6ccf65594559f9670fd213bfbb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
Log Message:
-----------
[LoopUnroll] Add tests with multiple exiting/latches and small BTCs.
Extra test coverage for cases mentioned during review of
https://github.com/llvm/llvm-project/pull/139551.
Commit: a0ee93d2c19d210ea188ca454c2e5d1ee5ea361f
https://github.com/llvm/llvm-project/commit/a0ee93d2c19d210ea188ca454c2e5d1ee5ea361f
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Docs] Correct Radeon Pro 5600M ISA (#140041)
As observed by LLVM Discord user "buck", the Radeon Pro 5600M is gfx1011
and the entry in the gfx1010 category was probably meant to be Radeon RX
5600M which indeed is gfx1010.
Commit: 5cdc82f0dcb5f873953ab0c2f5aab25327feab1a
https://github.com/llvm/llvm-project/commit/5cdc82f0dcb5f873953ab0c2f5aab25327feab1a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/TableGen/X86RecognizableInstr.cpp
Log Message:
-----------
[NFC][TableGen][X86] Use StringSwitch to map from string -> enum (#139929)
Use StringSwitch instead of macro to map from a string to enum values in
X86RecognizableInstr.cpp.
Commit: 93fd8d40211adb7f5cfe02c7c553c8544eae9cd2
https://github.com/llvm/llvm-project/commit/93fd8d40211adb7f5cfe02c7c553c8544eae9cd2
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][test] Define print_possible_return_addresses on SPARC (#138523)
Parts of the `openmp` testsuite currently don't build on SPARC due to
the lack of a `print_possible_return_addresses` definition.
This patch provides one. With it, the vast majority of tests `PASS` on
Solaris/sparcv9 and, with an additional patch, on Linux/sparc64.
The current definition was obtained empirically.
Tested on `sparcv9-sun-solaris2.11`, `sparc64-unknown-linux-gnu`,
`amd64-pc-solaris2.11`, and `x86_64-pc-linux-gnu`.
Commit: 518169a9386baa0861c10d673d6e29e957f7133e
https://github.com/llvm/llvm-project/commit/518169a9386baa0861c10d673d6e29e957f7133e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/AST/ASTConcept.h
M clang/lib/AST/ASTConcept.cpp
Log Message:
-----------
[NFC][Clang] Adopt simplified `getTrailingObjects` in ASTConcept (#139974)
Use non-templated form of `getTrailingObjects` when using a single
trailing type in `TrailingObjects`.
Commit: 06aa28afb71d776b1472bd67cd152d12525e1031
https://github.com/llvm/llvm-project/commit/06aa28afb71d776b1472bd67cd152d12525e1031
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[NFC][Clang] Adopt simplified `getTrailingObjects` in Decl/DeclTemplate (#139977)
Adopt simplied `getTrailingObjects` variants that are not templated
and/or return ArrayRef in Decl/DeclTemplate .h/.cpp files.
Commit: 2ab2121e2cb5c246c780339884399f45d7c176ba
https://github.com/llvm/llvm-project/commit/2ab2121e2cb5c246c780339884399f45d7c176ba
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check destructors for temporaries (#140039)
Also, increase the EvalID in isPotentialConstantExpr(), since this is
its own evaluation.
Commit: 301f78696698ce515c18bbc90e2684ff07b6ba59
https://github.com/llvm/llvm-project/commit/301f78696698ce515c18bbc90e2684ff07b6ba59
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[llvm][OpenMP] Add "SourceLanguages" property to Directive (#139960)
The official languages that OpenMP recognizes are C/C++ and Fortran.
Some OpenMP directives are language-specific, some are C/C++-only, some
are Fortran-only.
Add a property to the TableGen definition of Directive that will be the
list of languages that allow the directive.
The TableGen backend will then generate a bitmask-like enumeration
SourceLanguages, and a function
SourceLanguages getDirectiveLanguages(Directive D);
Commit: 9bea4a11bc3f3aa69d4651799afea6a1b6103e4a
https://github.com/llvm/llvm-project/commit/9bea4a11bc3f3aa69d4651799afea6a1b6103e4a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
A clang/test/OpenMP/openmp_non_c_directives.c
R clang/test/OpenMP/openmp_workshare.c
Log Message:
-----------
[clang][OpenMP] Improve handling of non-C/C++ directives (#139961)
The PR139793 added handling of the Fortran-only "workshare" directive,
however there are more such directives, e.g. "allocators". Use the
genDirectiveLanguages function to detect non-C/C++ directives instead of
enumerating them.
Commit: 5d2d227cad65424003b90506d67d8fe4d32c0d18
https://github.com/llvm/llvm-project/commit/5d2d227cad65424003b90506d67d8fe4d32c0d18
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M bolt/test/X86/callcont-fallthru.s
Log Message:
-----------
[BOLT][test] Fix disabling of the PLT check in callcont-fallthru (#140026)
PR #139953 used `DONTRUN` to disable some run lines, but that didn't
work. Now switching to `RUN-DISABLED` for disabling the tests until
llvm-nm support is landed (#138232).
Commit: 95dd702f4c97c754a196be34b21675c564c02390
https://github.com/llvm/llvm-project/commit/95dd702f4c97c754a196be34b21675c564c02390
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp
A llvm/test/Transforms/ForcedFunctionAttrs/open-file-error.ll
Log Message:
-----------
ForceFunctionAttrs: Use reportFatalUsageError (#139473)
Commit: 3fd08e54e0f4758811b99eb75237324b02241c2a
https://github.com/llvm/llvm-project/commit/3fd08e54e0f4758811b99eb75237324b02241c2a
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/CodeGen/AArch64/fp8-init-list.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/arm-mfp8.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Add fp8 variants for untyped NEON intrinsics (#128019)
This patch adds fp8 variants to existing intrinsics, whose operation
doesn't depend on arguments being a specific type.
It also changes mfloat8 type representation in memory from `i8` to
`<1xi8>`
Commit: 6056623cd0b83c2948fcaf83d15784a00f81689d
https://github.com/llvm/llvm-project/commit/6056623cd0b83c2948fcaf83d15784a00f81689d
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Add `inline_ptx` op (#139923)
This op allows using PTX directly within the NVVM dialect, while greatly
simplifying llvm.inline_asm generation.
**Example 1: Read-only Parameters**
Sets `"l,r"` automatically.
```
nvvm.inline_ptx "mbarrier.init.b64 [$0], $1;" (%barrier_gen, %count) : !llvm.ptr, i32
// Lowers to:
llvm.inline_asm has_side_effects asm_dialect = att
"mbarrier.init.b64 [$0], $1;", "l,r" %arg0, %arg2 : (!llvm.ptr, i32) -> ()
```
**Example 2: Read-only and Write-only Parameters**
Sets `=f,f"` automatically. `=` is set because there is store.
```
%0 = nvvm.inline_ptx "ex2.approx.ftz.f32 $0, $1;" (%input) : f32 -> f32
// Lowers to:
%0 = llvm.inline_asm has_side_effects asm_dialect = att "ex2.approx.ftz.f32 $0, $1;", "=f,f" %arg0 : (f32) -> f32
```
**Example 3: Predicate Usage**
Now `@$2` is set automatically for predication.
```
nvvm.inline_ptx "mbarrier.init.b64 [$0], $1;" (%barrier_gen, %count), predicate = %pred : !llvm.ptr, i32, i1
// Lowers to:
llvm.inline_asm has_side_effects asm_dialect = att "@$2 mbarrier.init.b64 [$0], $1;", "l,r,b" %arg0, %arg2, %arg3 : (!llvm.ptr, i32, i1) -> ()
```
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: ff2fffd7736a6c6a721013f9a4a8881fb7cfe454
https://github.com/llvm/llvm-project/commit/ff2fffd7736a6c6a721013f9a4a8881fb7cfe454
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix deduction of explicit object member functions (#140030)
When taking the address of an overload set containing an explicit object
member, we should not take the
explicit object parameter into account.
Commit: 3692a8909c675109c03164996a1fdb97c3f704ce
https://github.com/llvm/llvm-project/commit/3692a8909c675109c03164996a1fdb97c3f704ce
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Frontend/CommandLineSourceLoc.h
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeCompletion/source-loc-zero.cpp
A clang/test/Refactor/source-loc-zero.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
Log Message:
-----------
[clang] Enforce 1-based indexing for command line source locations (#139457)
Fixes #139375
Clang expects command line source locations to be provided using 1-based
indexing.
Currently, Clang does not reject zero as invalid argument for column or
line number, which can cause Clang to crash.
This commit extends validation in `ParsedSourceLocation::FromString` to
only accept (unsinged) non-zero integers.
Commit: 87910ee1ac1e08f5cc28c36f97991a3adeaf9e72
https://github.com/llvm/llvm-project/commit/87910ee1ac1e08f5cc28c36f97991a3adeaf9e72
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check dtor calls for one-past-end pointers (#140047)
Commit: f1a184c849d10480fe624240de51bff93262c9af
https://github.com/llvm/llvm-project/commit/f1a184c849d10480fe624240de51bff93262c9af
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[InstCombine] Fix incorrect number of iterations (#140004)
Commit: afc1d0fa06c715a19a77120b7c245ab2c35c36a9
https://github.com/llvm/llvm-project/commit/afc1d0fa06c715a19a77120b7c245ab2c35c36a9
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[NFC][AutoUpgrade] Use `ConstantPointerNull::get` instead of `Constant::getNullValue` for known pointer types (#139984)
This is a preparation change for upcoming PRs that will update the
semantics of
`ConstantPointerNull`, making it to represent an actual `nullptr` rather
than a
zero-valued pointer.
Commit: 4cd7641681456db54348523528d3ee874088fee8
https://github.com/llvm/llvm-project/commit/4cd7641681456db54348523528d3ee874088fee8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Fix a warning
This patch fixes:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7506:17: error:
unused variable 'NoFPClass' [-Werror,-Wunused-variable]
Commit: 88b6a96832e237ef44cf5b2c29556989efab10e7
https://github.com/llvm/llvm-project/commit/88b6a96832e237ef44cf5b2c29556989efab10e7
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/include/flang/Semantics/symbol.h
Log Message:
-----------
[flang] Add missing copy assignment operator (#139966)
On Clang 17 the implicit copy assignment operator was issuing a warning because of the user-declared copy constructor. Declare the copy assignment operator as default.
Commit: 9f939f502832fa30b9209ab0b0a19a9f02e4d81d
https://github.com/llvm/llvm-project/commit/9f939f502832fa30b9209ab0b0a19a9f02e4d81d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking][NFC] Drop outdated TODO in canCreateUndefOrPoison (#139915)
The inrange constexpr GEP case is handled since 425cbbc602c9.
Commit: fe3803065d3675367cdcecb80d85a9c6d129f0f7
https://github.com/llvm/llvm-project/commit/fe3803065d3675367cdcecb80d85a9c6d129f0f7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Use llvm::unique (NFC) (#139910)
While I am at it, this patch removes the "if" statement.
std::vector::erase(first, last) doesn't do anything when
first == last.
Commit: d345c1f942f8b300b9d5dbe29a41ee41c075122b
https://github.com/llvm/llvm-project/commit/d345c1f942f8b300b9d5dbe29a41ee41c075122b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb] Use std::optional::value_or (NFC) (#140011)
Commit: 52b1f7a6ca8aa04ea047893ba9a57a1efd027a56
https://github.com/llvm/llvm-project/commit/52b1f7a6ca8aa04ea047893ba9a57a1efd027a56
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Quant/IR/QuantOps.cpp
Log Message:
-----------
[mlir] Use llvm::is_contained (NFC) (#140012)
Commit: 3ed832243f35e2c96c3872dfa5132ec81230c3da
https://github.com/llvm/llvm-project/commit/3ed832243f35e2c96c3872dfa5132ec81230c3da
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
Log Message:
-----------
[llvm] Use std::optional::value_or (NFC) (#140014)
Commit: 86fafd528ba49ef82c96f5ff63b399027004df16
https://github.com/llvm/llvm-project/commit/86fafd528ba49ef82c96f5ff63b399027004df16
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/docs/CodingGuidelines.rst
M libcxx/docs/DesignDocs/FileTimeType.rst
M libcxx/docs/TestingLibcxx.rst
Log Message:
-----------
[libc++] Fix typos in documentation (#139853)
Commit: 6c61c2ea764a4287309d1efcda95bd6fab671d11
https://github.com/llvm/llvm-project/commit/6c61c2ea764a4287309d1efcda95bd6fab671d11
Author: James Newling <james.newling at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Address linearization comments (post commit) (#138075)
This PR adds some documentation to address comments in
https://github.com/llvm/llvm-project/pull/136581
This PR adds a test for linearization across scf.for. This new test
might be considered redundant by more experienced MLIRers, but might
help newer users understand how to linearize scf/cf/func operations
easily
The documentation added in this PR also tightens our definition of
linearization, to now exclude unrolling (which creates multiple ops from
1 op). We hadn't really specified what linearization meant before.
Commit: a96fd4f05d31dc5d2c1516bca2416052d0ef17c3
https://github.com/llvm/llvm-project/commit/a96fd4f05d31dc5d2c1516bca2416052d0ef17c3
Author: Akash Banerjee <Akash.Banerjee at amd.com>
Date: 2025-05-19 (Mon, 19 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/OpenMP/derived-type-map.f90
Log Message:
-----------
[OpenMP][Flang] Emit default declare mappers implicitly for derived types
This patch adds support to emit default declare mappers for implicit mapping of derived types when not supplied by user. This especially helps tackle mapping of allocatables of derived types.
This supports nested derived types as well.
Compare: https://github.com/llvm/llvm-project/compare/ffeecb8836b0%5E...a96fd4f05d31
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list