[all-commits] [llvm/llvm-project] 3d7602: [AArch64] When printing SYS aliases, use explicit ...

[Jonathan Thackray via All-commits]

  Branch: refs/heads/users/jthackray/use-needsreg
  Home:   https://github.com/llvm/llvm-project
  Commit: 3d760293ceeb82d3177ffa936c68d4231acdb8fd
      https://github.com/llvm/llvm-project/commit/3d760293ceeb82d3177ffa936c68d4231acdb8fd
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2025-05-18 (Sun, 18 May 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

  Log Message:
  -----------
  [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC)

Currently, when printing SYS aliases, the first instruction operand
is compared with the string constant "all" to decide if a register
needs to be parsed as the next operand.

For example, `TLBI VMALLE1IS` contains "all" so no register is expected,
but `TLBI IPAS2E1IS` doesn't match, so a register is expected.

Future AArch64 SYS aliases won't match this pattern, so use the (already
provided) explicit `NeedsReg` bit flag provided in tablegen to check if a
register is required to be parsed. This is already used by the code in
`AArch64InstPrinter.cpp`, so now we are consistent in this source file too.

No test files have been changed, since this is a non-functional change,
and all AArch64 test cases continue to pass after this change.



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