[all-commits] [llvm/llvm-project] 78af0f: [mlir][NFC] Use `llvm::sort` (#140261)
Qinkun Bao via All-commits
all-commits at lists.llvm.org
Fri May 16 15:55:11 PDT 2025
Branch: refs/heads/users/qinkunbao/spr/nfc-run-code-formatter-on-diagnostichcpp-profilelistcpp-specialcaselistcpp
Home: https://github.com/llvm/llvm-project
Commit: 78af0f3ab8e6fcd52337b7ba5873deea5d2bfe7d
https://github.com/llvm/llvm-project/commit/78af0f3ab8e6fcd52337b7ba5873deea5d2bfe7d
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferDeallocationOpInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenEnv.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
Log Message:
-----------
[mlir][NFC] Use `llvm::sort` (#140261)
Commit: 04fde85057cb4da2e560da629df7a52702eac489
https://github.com/llvm/llvm-project/commit/04fde85057cb4da2e560da629df7a52702eac489
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Rename isUniform(AfterVectorization) to isSingleScalar (NFC). (#140134)
Update the naming in VPReplicateRecipe and vputils to the more accurate
isSingleScalar, as the functions check for cases where only a single
scalar is needed, either because it produces the same value for all
lanes or has only their first lane used.
Discussed in https://github.com/llvm/llvm-project/pull/139150.
PR: https://github.com/llvm/llvm-project/pull/140134
Commit: 6ebb84869e6cf1a643b053e53931c6075b2cc8ae
https://github.com/llvm/llvm-project/commit/6ebb84869e6cf1a643b053e53931c6075b2cc8ae
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
langref updates for aarch64 trampoline (#139740)
Add clarifying comments to the langref from the review of #126743
Commit: 087a5d2ec7897cd99d3787820711fec76a8e1792
https://github.com/llvm/llvm-project/commit/087a5d2ec7897cd99d3787820711fec76a8e1792
Author: John Harrison <harjohn at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/restart/TestDAP_restart.py
M lldb/test/API/tools/lldb-dap/stop-hooks/TestDAP_stop_hooks.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAPError.cpp
M lldb/tools/lldb-dap/DAPError.h
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
Log Message:
-----------
[lldb-dap] Adding additional asserts to unit tests. (#140107)
Adding an assert that the 'continue' request succeeds caused a number of
tests to fail. This showed a number of tests that were not specifying if
they should be stopped or not at key points in the test. This is likely
contributing to these tests being flaky since the debugger is not in the
expected state.
Additionally, I spent a little time trying to improve the readability of
the dap_server.py and lldbdap_testcase.py.
Commit: 63a4cae56cf896abd12ecf8dbd50f7f5fb9549e1
https://github.com/llvm/llvm-project/commit/63a4cae56cf896abd12ecf8dbd50f7f5fb9549e1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
M mlir/test/Target/LLVMIR/arm-sve.mlir
Log Message:
-----------
[MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to `svdupq_lane` (#135633)
Commit: 71d1b4c77c39201b0d533c2eccb2f5cbc1561b22
https://github.com/llvm/llvm-project/commit/71d1b4c77c39201b0d533c2eccb2f5cbc1561b22
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/include/llvm/Demangle/ItaniumDemangle.h
Log Message:
-----------
[ItaniumDemangle] Make it independent of LLVM again. NFC
Commit: be6c1684c058ff40b5cb29e7eb88f06f72dd50df
https://github.com/llvm/llvm-project/commit/be6c1684c058ff40b5cb29e7eb88f06f72dd50df
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
Log Message:
-----------
[AMDGPU] Automate creation of byte_sel dags. NFCI. (#140155)
Commit: e30301aaecd24141cbdcd740aa4c16c0d9b05307
https://github.com/llvm/llvm-project/commit/e30301aaecd24141cbdcd740aa4c16c0d9b05307
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
Log Message:
-----------
[MachineCopyPropagation] Make use of lane mask info in basic block liveins (#140248)
Commit: 82bad53bda39bd7a7bbdab81e72887dea8479a47
https://github.com/llvm/llvm-project/commit/82bad53bda39bd7a7bbdab81e72887dea8479a47
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/unittests/ProfileData/DataAccessProfTest.cpp
Log Message:
-----------
[StaticDataLayout][PGO] Remove inclusion of private gmock header
This one is supposed to be included via gmock.h
Commit: 589e7abea570a813ef8a2e8b8f130fd40cd07141
https://github.com/llvm/llvm-project/commit/589e7abea570a813ef8a2e8b8f130fd40cd07141
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/MagicNumbersCheck.cpp
Log Message:
-----------
[clang-tidy] Use std::binary_search (NFC) (#140263)
Commit: 9adcb4fe125e5b2bdf894fb35c7d91e10c10e1ea
https://github.com/llvm/llvm-project/commit/9adcb4fe125e5b2bdf894fb35c7d91e10c10e1ea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/include/clang/Basic/JsonSupport.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/unittests/Driver/ToolChainTest.cpp
Log Message:
-----------
[clang] Use llvm::replace (NFC) (#140264)
Commit: fa2263b3097c4e5f361505ce564a246a7f289172
https://github.com/llvm/llvm-project/commit/fa2263b3097c4e5f361505ce564a246a7f289172
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
Log Message:
-----------
[CIR][NFC] Use arrangeFunctionDeclaration to build function types (#139787)
This change replaces the simplified call that we were previously using
to convert the function type provided by a global declaration to the CIR
function type. We now go through 'arrangeGlobalDeclaration' which builds
the function type in a more complicated manner. This change has no
observable differences for the currently upstreamed CIR support, but it
is necessary to prepare for C++ member function calls, which require the
extra handling.
Commit: 2f5a24d0c555832ec6e5747cc7bad814ed97cbdc
https://github.com/llvm/llvm-project/commit/2f5a24d0c555832ec6e5747cc7bad814ed97cbdc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
Log Message:
-----------
[CIR][NFC] Fix warning about unhandled Decl (#140159)
This fixes a warning about an unhandled Decl that was recently
introduced. While adding the new decl, I noticed that one of the others
that was in the "NYI" group belonged in the "unreachable" group, so I
moved it also.
Commit: c72c0b298c13ebc4d374e84b8ea20f8ca4f5ace2
https://github.com/llvm/llvm-project/commit/c72c0b298c13ebc4d374e84b8ea20f8ca4f5ace2
Author: nd <dmitry.neverov at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
Fix race condition during iteration through modules (#139283) (#139862)
Use the locking iterator to ensure module don't change during iteration.
Commit: 7fe1b43122230b556481b56210bc72466c1076d5
https://github.com/llvm/llvm-project/commit/7fe1b43122230b556481b56210bc72466c1076d5
Author: James Y Knight <jyknight at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M utils/bazel/configure.bzl
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
NFC: reformat bazel files with buildifier.
Commit: e9c9c33fa4e26b7e18947dfefa960f68945d1899
https://github.com/llvm/llvm-project/commit/e9c9c33fa4e26b7e18947dfefa960f68945d1899
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
M mlir/test/Dialect/ArmSVE/roundtrip.mlir
M mlir/test/Target/LLVMIR/arm-sve.mlir
Log Message:
-----------
[MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to svusmmla (#135634)
Commit: 23a674d2ecc428a96d28c9772cc5178eaf763863
https://github.com/llvm/llvm-project/commit/23a674d2ecc428a96d28c9772cc5178eaf763863
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
Log Message:
-----------
[libcxxabi] Update ItaniumDemangle.h from LLVM (#140273)
76ba29bfd8e8aaf5b0267598d18434a0d13945a2 landed changes in
ItaniumDemangle.h on the LLVM side that were not propagated over to the
libcxxabi side. This patch fixes that.
Commit: 7f4a9105df26a1c481d6b6d390a9d24e8ea987d1
https://github.com/llvm/llvm-project/commit/7f4a9105df26a1c481d6b6d390a9d24e8ea987d1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
A llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
Log Message:
-----------
[RISCV] Add Zilsd/Zclsd support to RISCVMakeCompressible. (#140136)
Commit: dcd62f3674907b0d31a303b95ea5aa844ffd8238
https://github.com/llvm/llvm-project/commit/dcd62f3674907b0d31a303b95ea5aa844ffd8238
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)
This matches the underlying function in MachineMemOperand and how it is
printed when BaseAlign differs from Align.
Commit: ea4bf3456f775360cbf5de40edb2899a19b33456
https://github.com/llvm/llvm-project/commit/ea4bf3456f775360cbf5de40edb2899a19b33456
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
A llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
Log Message:
-----------
[RISCV] Add Zilsd to RISCVMergeBaseOffset. (#140157)
I only tested a simple case for folding the addi from medany codemodel.
I assume everything else should just work.
Commit: ec44c74fe7444c521c82e1ebef0d6a4e7be33252
https://github.com/llvm/llvm-project/commit/ec44c74fe7444c521c82e1ebef0d6a4e7be33252
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/switch_flat_op.cpp
A clang/test/CIR/IR/switch-flat.cir
A clang/test/CIR/Transforms/switch.cir
Log Message:
-----------
[CIR] Upstream support for FlattenCFG switch and SwitchFlatOp (#139154)
This PR adds support for the `FlattenCFG` transformation on `switch`
statements. It also introduces the `SwitchFlatOp`, which is necessary
for subsequent lowering to LLVM.
Commit: 52af23f950bc9585c623bfff6ac2a7d4fbe5e18a
https://github.com/llvm/llvm-project/commit/52af23f950bc9585c623bfff6ac2a7d4fbe5e18a
Author: Raphael Moreira Zinsly <rzinsly at ventanamicro.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
Log Message:
-----------
[RISCV] Add stack probing in eliminateCallFramePseudoInstr (#139731)
Stack clash protection code was missing from
RISCVFrameLowering::eliminateCallFramePseudoInstr, calling allocateStack
fixes it.
This patch also fixes the tests in stack-probing-dynamic.ll that should
be testing the stack allocation before a function call.
Commit: ebb15353d2a1edefb40faa0ad56e661b7aee3134
https://github.com/llvm/llvm-project/commit/ebb15353d2a1edefb40faa0ad56e661b7aee3134
Author: peremyach <akhabutdinov at meta.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
Log Message:
-----------
Reduce llvm-gsymutil memory usage (#139907)
For large binaries gsymutil ends up using too much memory. This diff
adds DIE tree cleanup per compile unit to reduce memory usage.
P. S. Not sure about formatting. Maybe it hasn't been run in a while, or
I have misconfigured something.
`$ git clang-format HEAD~1
clang-format did not modify any files
$ clang-format --version
clang-format version 21.0.0git
(git at github.com:peremyach/llvm-project.git
8d945c8357e1bd9872a34f92620d4916bfd27482)
`
Co-authored-by: Arslan Khabutdinov <akhabutdinov at fb.com>
Commit: 7674d6fa9e45c1748d0dd49430aa472028d44a2d
https://github.com/llvm/llvm-project/commit/7674d6fa9e45c1748d0dd49430aa472028d44a2d
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
Log Message:
-----------
[LLVM][TableGen] Simplify `DagInit::get` (#140056)
- Add `DagInit::get` overloads that do not need ValName to be specified.
- Fix some calls to either not create temporary arrays for DAG args or
use the std::pair<> overload.
Commit: d79d9b8fbfc7e8411aeaf2f5e1be9d4247594fee
https://github.com/llvm/llvm-project/commit/d79d9b8fbfc7e8411aeaf2f5e1be9d4247594fee
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
A llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP]Change the insertion point for outside-block-used nodes and prevec phi operand gathers
Need to set the insertion point for (non-schedulable) vector node after
the last instruction in the node to avoid def-use breakage. But it also
causes miscompilation with gather/buildvector operands of the phi nodes,
used in the same phi only in the block.
These nodes supposed to be inserted at the end of the block and after
changing the insertion point for the non-schedulable vec block, it also
may break def-use dependencies. Need to prevector such nodes, to emit
them as early as possible, so the vectorized nodes are inserted before
these nodes.
Fixes #139728
Reviewers: hiraditya, HanKuanChen, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/139917
Commit: 818893177807663f438155f8d962d32a9473ae99
https://github.com/llvm/llvm-project/commit/818893177807663f438155f8d962d32a9473ae99
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Rename getOriginalAlign->getBaseAlign after #139930
Commit: e620f10f57bf698b7446f134528bb2585fdf1f28
https://github.com/llvm/llvm-project/commit/e620f10f57bf698b7446f134528bb2585fdf1f28
Author: Dan Blackwell <danblackwell95 at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_report_path_test.cpp
Log Message:
-----------
[compiler-rt][sanitizer_common] Alter sanitizer_set_report_path_test to not assume a fixed file path (#139282)
Currently, `Posix/sanitizer_set_report_path_test.cpp` contains the
following check: `// CHECK: ERROR: Can't create directory:
{{.*}}Posix/Output/sanitizer_set_report_path_test.cpp.tmp`. This makes
an assumption that the test file resides in `Posix/Output`, however when
testing on a remote device, an alternative temporary directory path is
used. This patch instead checks that the path in the error message
matches the requested path dynamically.
Commit: aec685ea77e97bcc6892b12e970857fb1b049528
https://github.com/llvm/llvm-project/commit/aec685ea77e97bcc6892b12e970857fb1b049528
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/DataLayout.h
Log Message:
-----------
[DataLayout] Introduce DataLayout::getAddressSize(AS)
This function can be used to retrieve the number of bits that can be used
for arithmetic in a given address space (i.e. the range of the address
space). For most in-tree targets this should not make any difference
but differentiating between the size of a pointer in bits and the address
range is extremely important e.g. for CHERI-enabled targets, where pointers
carry additional metadata such as bounds and permissions and only a subset
of the pointer bits is used as the address.
The address size is defined to be the same as the index size.
We considered adding a separate property since targets exist where indexing
and address range actually use different sizes (AMDGPU fat pointers with
160 representation, 48 bit address and 32 bit index), but for the purposes
of LLVM semantics, differentiating them does not add much value and it
introduces a lot of complexity in ensure the correct bits are used. See
the reasoning by @nikic on https://discourse.llvm.org/t/clarifiying-the-semantics-of-ptrtoint/83987/38https://discourse.llvm.org/t/clarifiying-the-semantics-of-ptrtoint/83987/49
Originally uploaded as https://reviews.llvm.org/D135158
Reviewed By: davidchisnall, krzysz00
Pull Request: https://github.com/llvm/llvm-project/pull/139347
Commit: 4b104c68530581cb72da687b6edf61f5e799b5c1
https://github.com/llvm/llvm-project/commit/4b104c68530581cb72da687b6edf61f5e799b5c1
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M libcxx/include/__flat_set/utils.h
A libcxx/test/libcxx/containers/container.adaptors/flat.multiset/insert_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.set/insert_range.pass.cpp
Log Message:
-----------
[libc++] Fix flat_{multi}set insert_range (#137462)
Fixes #136656
Commit: 85fe4ab8a3faa58317c247051df2195c89bed0fa
https://github.com/llvm/llvm-project/commit/85fe4ab8a3faa58317c247051df2195c89bed0fa
Author: Mariusz Kwiczala <70530507+sfc-gh-mkwiczala at users.noreply.github.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
A llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
R llvm/include/llvm/DebugInfo/GSYM/GsymDIContext.h
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
A llvm/lib/DebugInfo/GSYM/GsymContext.cpp
R llvm/lib/DebugInfo/GSYM/GsymDIContext.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
Log Message:
-----------
Rename GsymDIContext to GsymContext (#140227)
Renaming based on suggestion here:
https://github.com/llvm/llvm-project/pull/139686#discussion_r2089538528
Commit: 0de8ff6d9c7cd661f3938d15d370141174afb60f
https://github.com/llvm/llvm-project/commit/0de8ff6d9c7cd661f3938d15d370141174afb60f
Author: David Green <david.green at arm.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-store.ll
Log Message:
-----------
[AArch64] Reduce the cost of repeated sub-shuffle (#139331)
Given a larger-than-legal shuffle we will split into multiple sub-parts.
This adds a check to the computed costs of sub-shuffles so that repeated
sequences are not accounted for multiple times. This especially reduces
the cost of broadcasts/splats.
Commit: 976b00654a37ada462fc19df11a1d2468c1c463c
https://github.com/llvm/llvm-project/commit/976b00654a37ada462fc19df11a1d2468c1c463c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
Log Message:
-----------
[RISCV] Disable combineToVCPOP for illegal scalable vector types. (#140195)
This transform creates target specific instructions which must have
legal types. We were checking this for fixed vectors, but not scalable
vectors. This caused a crash with <vscale x 1 x i1> which isn't legal
for Zve32x.
Commit: 4e01a07cffc43f720ed527969ba70c396940ce2e
https://github.com/llvm/llvm-project/commit/4e01a07cffc43f720ed527969ba70c396940ce2e
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
Log Message:
-----------
[AArch64] Fixes for Windows varargs handling. (#139972)
Omit spills when va_start is not present, like we do on other targets.
In most situations this is just an optimization, but for thunks in
arm64ec, we need this because it's illegal to reference varargs in a
thunk.
Fix the bug that prevented omitting vararg spills from working properly:
we need to avoid interfering with musttail handling. (This is not a
Windows-only issue, but it mostly affects Windows because musttail
thunks are mostly used for the Microsoft C++ ABI.)
On arm64ec, don't set x4 and x5 for musttail thunks; forward them from
the caller.
Fixes #139856 .
Commit: 48587f30d63689816f3d5a1d199dba42ff332247
https://github.com/llvm/llvm-project/commit/48587f30d63689816f3d5a1d199dba42ff332247
Author: Grigory Pastukhov <99913765+grigorypas at users.noreply.github.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCXX/warn-nrvo.cpp
Log Message:
-----------
[clang] Add new warning: not eliding copy on return (missed NRVO) (#139973)
Commit: 00c5cd8a7a3f7e363d8f0d172ea88af91612c7fa
https://github.com/llvm/llvm-project/commit/00c5cd8a7a3f7e363d8f0d172ea88af91612c7fa
Author: Bill Wendling <morbo at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M libc/config/config.json
Log Message:
-----------
[libc] Fix typo: Configue -> Configure (#140166)
Commit: efa28338d858e1ea2bf705d50a0404bc602c8fe1
https://github.com/llvm/llvm-project/commit/efa28338d858e1ea2bf705d50a0404bc602c8fe1
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #140073 (#140288)
Pointer to data member don't decay, assuming they do caused an assertion
failure.
Commit: dd4a73069c289985afc1ccfd0c512e5791ede404
https://github.com/llvm/llvm-project/commit/dd4a73069c289985afc1ccfd0c512e5791ede404
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/ProfileList.cpp
M clang/lib/Basic/SanitizerSpecialCaseList.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFCI][Sanitizer] Convert SpecialCaseList::Sections from StringMap to vector.
As discussed in https://github.com/llvm/llvm-project/pull/139772, SpecialCaseList::Sections can keep the order of Sections when parsing the case list.
Reviewers: thurstond, vitalybuka
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/140127
Commit: a18607ab311bf894e2094a378119be5f2b82a6b4
https://github.com/llvm/llvm-project/commit/a18607ab311bf894e2094a378119be5f2b82a6b4
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/MagicNumbersCheck.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/JsonSupport.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Sema/Overload.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/CIR/CodeGen/switch_flat_op.cpp
A clang/test/CIR/IR/switch-flat.cir
A clang/test/CIR/Transforms/switch.cir
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
A clang/test/SemaCXX/warn-nrvo.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_report_path_test.cpp
M libc/config/config.json
M libcxx/include/__flat_set/utils.h
A libcxx/test/libcxx/containers/container.adaptors/flat.multiset/insert_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.set/insert_range.pass.cpp
M libcxxabi/src/demangle/ItaniumDemangle.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/Target/Target.cpp
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/restart/TestDAP_restart.py
M lldb/test/API/tools/lldb-dap/stop-hooks/TestDAP_stop_hooks.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAPError.cpp
M lldb/tools/lldb-dap/DAPError.h
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
A llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
R llvm/include/llvm/DebugInfo/GSYM/GsymDIContext.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/DataLayout.h
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
A llvm/lib/DebugInfo/GSYM/GsymContext.cpp
R llvm/lib/DebugInfo/GSYM/GsymDIContext.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-store.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
A llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
A llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
A llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/unittests/ProfileData/DataAccessProfTest.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferDeallocationOpInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenEnv.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
M mlir/test/Dialect/ArmSVE/roundtrip.mlir
M mlir/test/Target/LLVMIR/arm-sve.mlir
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M utils/bazel/configure.bzl
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6
[skip ci]
Commit: 2e49d81b4e339d81b39070722ffa8abc3517b763
https://github.com/llvm/llvm-project/commit/2e49d81b4e339d81b39070722ffa8abc3517b763
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-05-16 (Fri, 16 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/MagicNumbersCheck.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/JsonSupport.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Sema/Overload.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/CIR/CodeGen/switch_flat_op.cpp
A clang/test/CIR/IR/switch-flat.cir
A clang/test/CIR/Transforms/switch.cir
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
A clang/test/SemaCXX/warn-nrvo.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_report_path_test.cpp
M libc/config/config.json
M libcxx/include/__flat_set/utils.h
A libcxx/test/libcxx/containers/container.adaptors/flat.multiset/insert_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.set/insert_range.pass.cpp
M libcxxabi/src/demangle/ItaniumDemangle.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/Target/Target.cpp
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/restart/TestDAP_restart.py
M lldb/test/API/tools/lldb-dap/stop-hooks/TestDAP_stop_hooks.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAPError.cpp
M lldb/tools/lldb-dap/DAPError.h
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
A llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
R llvm/include/llvm/DebugInfo/GSYM/GsymDIContext.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/DataLayout.h
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
A llvm/lib/DebugInfo/GSYM/GsymContext.cpp
R llvm/lib/DebugInfo/GSYM/GsymDIContext.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-store.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
A llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
A llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
A llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/unittests/ProfileData/DataAccessProfTest.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferDeallocationOpInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenEnv.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
M mlir/test/Dialect/ArmSVE/roundtrip.mlir
M mlir/test/Target/LLVMIR/arm-sve.mlir
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M utils/bazel/configure.bzl
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
https://github.com/llvm/llvm-project/pull/140295
Created using spr 1.3.6
Compare: https://github.com/llvm/llvm-project/compare/41b09de695f0...2e49d81b4e33
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