[all-commits] [llvm/llvm-project] a608b4: [llvm] clang-format llvm/CodeGen/Passes.h (#139951)
Amir Ayupov via All-commits
all-commits at lists.llvm.org
Thu May 15 22:26:30 PDT 2025
Branch: refs/heads/users/aaupov/spr/boltheatmap-produce-zoomed-out-heatmap
Home: https://github.com/llvm/llvm-project
Commit: a608b4914209f4238fe83a6b5fa8fd7219f11115
https://github.com/llvm/llvm-project/commit/a608b4914209f4238fe83a6b5fa8fd7219f11115
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
Log Message:
-----------
[llvm] clang-format llvm/CodeGen/Passes.h (#139951)
Reformat a few header files under llvm/include/llvm/CodeGen/Passes.h
with clang-format in preparation for a codemod.
This is just a formatting change; no functionality is impacted.
Commit: 960afcc90e8fb75b725ed331f4bc60eb2398d6e5
https://github.com/llvm/llvm-project/commit/960afcc90e8fb75b725ed331f4bc60eb2398d6e5
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/InProcessModuleCache.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
[clang][modules] Timestamp-less validation API (#138983)
Timestamps are an implementation detail of the cross-process module
cache implementation. This PR hides it from the `ModuleCache` API, which
simplifies the in-process implementation.
Commit: 0dd2c9f7a3f42138da0b8ed4fea80470ea7a510f
https://github.com/llvm/llvm-project/commit/0dd2c9f7a3f42138da0b8ed4fea80470ea7a510f
Author: Thurston Dang <thurston at google.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
Fix-forward build error from #132489
Replace deprecated use of getDeclaration that was added in #132489
llvm/lib/IR/AutoUpgrade.cpp:1480:26: error: 'getDeclaration' is deprecated: Use getOrInsertDeclaration instead [-Werror,-Wdeprecated-declarations]
1480 | NewFn = Intrinsic::getDeclaration(
| ^~~~~~~~~~~~~~
| getOrInsertDeclaration
Commit: 21f1a616d60934953de3f304aafcad968e770b0a
https://github.com/llvm/llvm-project/commit/21f1a616d60934953de3f304aafcad968e770b0a
Author: James Newling <james.newling at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
Log Message:
-----------
[mlir][vector] Additional transpose folding (#138347)
Fold transpose with unit-dimensions. Seen in the wild:
```
%0 = vector.transpose %arg, [0, 2, 1, 3] : vector<6x1x1x4xi8> to vector<6x1x1x4xi8>
```
This transpose can be folded because (1) it preserves the shape and (2)
the shuffled dims are unit extent.
Also addresses comment about static vs anonymous namespace:
https://github.com/llvm/llvm-project/pull/135841#discussion_r2071869067
---------
Signed-off-by: James Newling <james.newling at gmail.com>
Commit: 847561e48f4e00f69ceaa3b25ca6ad2138fbbb83
https://github.com/llvm/llvm-project/commit/847561e48f4e00f69ceaa3b25ca6ad2138fbbb83
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
Log Message:
-----------
[NVPTX] Further refactor intrinsic definitions to remove redundancy (NFC) (#139924)
Note: the diff indicates this change has no impact on the intrinsic code
generated by table-gen.
Commit: 1043810769a5efcbf5d1f468dc48ddcc289c5b32
https://github.com/llvm/llvm-project/commit/1043810769a5efcbf5d1f468dc48ddcc289c5b32
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
R offload/test/offloading/gpupgo/pgo1.c
R offload/test/offloading/gpupgo/pgo2.c
A offload/test/offloading/gpupgo/pgo_atomic_teams.c
A offload/test/offloading/gpupgo/pgo_atomic_threads.c
A offload/test/offloading/gpupgo/pgo_device_and_host.c
A offload/test/offloading/gpupgo/pgo_device_only.c
Log Message:
-----------
[PGO][Offload] Update PGO GPU tests (#132262)
Commit: 1778d3b8245b9a7787bbd0b00f60f879ed4689c9
https://github.com/llvm/llvm-project/commit/1778d3b8245b9a7787bbd0b00f60f879ed4689c9
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir] [vector] Add linearization pattern for vector.create_mask (#138214)
This PR is a breakdown [3 / 4] of the PR #136193
The PR adds linearization patterns for vector.create_mask
Commit: d0a6b2f4c093f085f861f0f91767091e561bcec0
https://github.com/llvm/llvm-project/commit/d0a6b2f4c093f085f861f0f91767091e561bcec0
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
Log Message:
-----------
[gn] port 3bdfa6f3e8eb
Commit: 3a9992d248b510428d31a6ba644a673fe5c9683e
https://github.com/llvm/llvm-project/commit/3a9992d248b510428d31a6ba644a673fe5c9683e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn] port ec406e86745af
Commit: 87e6f1d7eba26e724c2824353edb48b3d9269957
https://github.com/llvm/llvm-project/commit/87e6f1d7eba26e724c2824353edb48b3d9269957
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 0ab67ec19167
Commit: 699a2f188d77a273312a68ae8bae60606559c860
https://github.com/llvm/llvm-project/commit/699a2f188d77a273312a68ae8bae60606559c860
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 14836597f5d8
Commit: 8b53ada2422a350397cbe4058f8cd8c21a5137a5
https://github.com/llvm/llvm-project/commit/8b53ada2422a350397cbe4058f8cd8c21a5137a5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 5b9246517f8f
Commit: 41fcd7e78be0dac2c8d984afce341b5223703a8a
https://github.com/llvm/llvm-project/commit/41fcd7e78be0dac2c8d984afce341b5223703a8a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/unittests/ADT/BitmaskEnumTest.cpp
Log Message:
-----------
[ADT] Add operator! to BitmaskEnum (#139958)
Add a logical (boolean) "not" operator.
Commit: 18b885f66babff3a10451bc811ffc077d61ed8ee
https://github.com/llvm/llvm-project/commit/18b885f66babff3a10451bc811ffc077d61ed8ee
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/InProcessModuleCache.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
Revert "[clang][modules] Timestamp-less validation API" (#139987)
Reverts llvm/llvm-project#138983
Commit: 34be80aa6edda60e240e4ea46f28b1b54ababf72
https://github.com/llvm/llvm-project/commit/34be80aa6edda60e240e4ea46f28b1b54ababf72
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/ExecutionEngine/JitRunner.cpp
R mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-entry-point.mlir
Log Message:
-----------
[mlir-runner] Check entry function does not expect arguments (#136825)
This PR fixes a crash if entry function has inputs. Fixes #136143.
Commit: 520773b47eba0df02730b929df073e1a38474bae
https://github.com/llvm/llvm-project/commit/520773b47eba0df02730b929df073e1a38474bae
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
Log Message:
-----------
[HLSL] Add resource constructor with implicit binding for global resources (#138976)
Adds constructor for resources with implicit binding and applies it to
all resources without binding at the global scope.
Adds Clang builtin function
`__builtin_hlsl_resource_handlefromimplicitbinding` that gets translated
to `llvm.dx|spv.resource.handlefromimplicitbinding` intrinsic calls.
Specific bindings are assigned in DXILResourceImplicitBinding pass.
Design proposals:
https://github.com/llvm/wg-hlsl/blob/main/proposals/0024-implicit-resource-binding.md
https://github.com/llvm/wg-hlsl/blob/main/proposals/0025-resource-constructors.md
One change from the proposals is that the `orderId` parameter is added
onto the constructor. Originally it was supposed to be generated in
codegen when the `llvm.dx|spv.resource.handlefromimplicitbinding` call
is emitted, but that is not possible because the call is inside a
constructor, and the constructor body is generated once per resource
type and not resource instance. So the only way to inject instance-based
data like `orderId` into the
`llvm.dx|spv.resource.handlefromimplicitbinding` call is that it must
come in via the constructor argument.
Closes #136784
Commit: 2a8960e48b178fb2533e71bbe164e9f383046114
https://github.com/llvm/llvm-project/commit/2a8960e48b178fb2533e71bbe164e9f383046114
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/xandesvdot-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Andes XAndesVDot (Andes Vector Dot Product) extension. (#139849)
The spec can be found at:
https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release.
This patch only supports assembler.
Intrinsics support will be added in a later patch.
Commit: ee786975195c9cab264c88db8c43980b78780167
https://github.com/llvm/llvm-project/commit/ee786975195c9cab264c88db8c43980b78780167
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
A llvm/include/llvm/IR/IntrinsicsRISCVXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
Log Message:
-----------
[RISCV] Support LLVM IR intrinsics for XAndesVPackFPH (#139860)
This patch adds LLVM IR intrinsic support for XAndesVPackFPH.
The document for the intrinsics can be found at:
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
and with policy variants
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/policy_funcs/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
The clang part will be added in a later patch.
Co-authored-by: Tony Chuan-Yue Yuan <yuan593 at andestech.com>
Commit: 4630d464c5cfd3f2ccdf3ac167694977736ce00e
https://github.com/llvm/llvm-project/commit/4630d464c5cfd3f2ccdf3ac167694977736ce00e
Author: Matt <msta at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Module.h
A clang/test/Modules/pr130712.cppm
Log Message:
-----------
[clang] Fix a segfault when M is a nullptr (#130712)
If `MM->getOwningModule` returns nullptr, then `isVisible` is called
with nullptr, which then calls `getImportLoc(nullptr)`
https://github.com/llvm/llvm-project/blob/077e0c134a31cc16c432ce685458b1de80bfbf84/clang/lib/Lex/PPMacroExpansion.cpp#L208
Commit: 1e503d08e1b6a285608e266acafd40eb2be5ca83
https://github.com/llvm/llvm-project/commit/1e503d08e1b6a285608e266acafd40eb2be5ca83
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-arch.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
A llvm/lib/Target/RISCV/RISCVInstrInfoQ.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/rv32q-invalid.s
A llvm/test/MC/RISCV/rv64q-invalid.s
A llvm/test/MC/RISCV/rv64q-valid.s
A llvm/test/MC/RISCV/rvq-aliases-valid.s
A llvm/test/MC/RISCV/rvq-pseudos.s
A llvm/test/MC/RISCV/rvq-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add support for Q extension (#139369)
Closes #130217.
https://github.com/riscv/riscv-isa-manual/blob/main/src/q-st-ext.adoc
Commit: 25e91ed202f0a0c4a8ad946fbbc0a507deff2b8b
https://github.com/llvm/llvm-project/commit/25e91ed202f0a0c4a8ad946fbbc0a507deff2b8b
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
A llvm/test/MC/RISCV/rv64zfa-only-valid.s
M llvm/test/MC/RISCV/zfa-invalid.s
A llvm/test/MC/RISCV/zfa-quad-invalid.s
M llvm/test/MC/RISCV/zfa-valid.s
Log Message:
-----------
[RISCV][MC] Add Q support for Zfa (#139508)
https://github.com/riscv/riscv-isa-manual/blob/main/src/zfa.adoc
Commit: 99e8d22d6944428d6e6632e9537bd338a650c453
https://github.com/llvm/llvm-project/commit/99e8d22d6944428d6e6632e9537bd338a650c453
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoQ.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
Log Message:
-----------
[RISCV][Scheduler] Add scheduler definitions for the Q extension (#139495)
Commit: 369c4093482210442bb42366c53fd55f4355dc8c
https://github.com/llvm/llvm-project/commit/369c4093482210442bb42366c53fd55f4355dc8c
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
M llvm/include/llvm/Support/FileOutputBuffer.h
M llvm/lib/Support/FileOutputBuffer.cpp
M llvm/unittests/Support/FileOutputBufferTest.cpp
Log Message:
-----------
Support,lld: Rename misnamed F_no_mmap to F_mmap
`F_no_mmap` introduced by https://reviews.llvm.org/D69294 is misnamed.
It oughts to be `F_mmap`
When the output is a regular file or do not exist,
`--no-mmap-output-file` is the default. Relands #134787 by fixing the
lld option default. Note: changing the default to --map-output-file
would likely fail on llvm-clang-x86_64-sie-win
(https://lab.llvm.org/buildbot/#/builders/46/builds/14847)
Pull Request: https://github.com/llvm/llvm-project/pull/139836
Commit: 40778822f7191d6f10fa36d9036133370a12bd9a
https://github.com/llvm/llvm-project/commit/40778822f7191d6f10fa36d9036133370a12bd9a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
[GVN][NFC] Add MSSA checks in tests 2/N (#137814)
The previous patch in this series is #130261
Commit: 690a30f3fd68a1a97bd3f8b13470abf9d34a61df
https://github.com/llvm/llvm-project/commit/690a30f3fd68a1a97bd3f8b13470abf9d34a61df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[llvm] Construct SmallVector with ArrayRef (NFC) (#139992)
Commit: 70ef89b9137e03b86cd49fd221cb8c0324984684
https://github.com/llvm/llvm-project/commit/70ef89b9137e03b86cd49fd221cb8c0324984684
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-14 (Wed, 14 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[AMDGPU] Use std::optional::value_or (NFC) (#140006)
Commit: 53f11dd4d60ad416cfeaabaf59a33d7754a8f1f1
https://github.com/llvm/llvm-project/commit/53f11dd4d60ad416cfeaabaf59a33d7754a8f1f1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/include/__fwd/pair.h
M libcxx/include/__memory/uses_allocator_construction.h
M libcxx/include/__node_handle
M libcxx/include/__tree
M libcxx/include/map
M libcxx/test/libcxx/containers/associative/tree_key_value_traits.pass.cpp
M libcxx/utils/gdb/libcxx/printers.py
Log Message:
-----------
[libc++] Avoid type-punning between __value_type and pair (#134819)
Before this patch, we were dereferencing pointers to objects which were
never constructed. Now we always assume that nodes store `pair<const
KeyT, ValueT>` for maps instead, as they actually do. This patch also
allows for significant follow-up simplifications, since
`__node_value_type` and `__container_value_type` are the same type now.
Commit: ab119add3573c834185810a15a8a3648b1819959
https://github.com/llvm/llvm-project/commit/ab119add3573c834185810a15a8a3648b1819959
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: Fix minimumnum/maximumnum nan handling phrasing (#139228)
Make this consistent with other operations with respect to
signaling nan quieting. This was specifying that quieting is
required, which is true for IEEE. Make this consistent with other
IR operations, and signaling nan quieting is possible but optional
in the case where there are two nan inputs.
This permits directly selecting the intrinsic to the hardware
instruction in the default floating-point environment for shaders.
Commit: 647db1b02d1c6702737378c0726deda234a23ec4
https://github.com/llvm/llvm-project/commit/647db1b02d1c6702737378c0726deda234a23ec4
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
A llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
Log Message:
-----------
Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)
SMECallAttrs is a new helper class that holds all the SMEAttrs for a
call. The interfaces to query actions needed for the call (e.g. change
streaming mode) have been moved to the SMECallAttrs class.
The main motivation for this change is to make the split between the
caller, callee, and callsite attributes more apparent.
Before this change, we would always merge callsite and callee
attributes. The main reason to do this was to handle indirect calls,
however, we also occasionally used callsite attributes on direct calls
in tests (mainly to avoid creating multiple function declarations). With
this patch, we now explicitly handle indirect calls and disallow
incompatible attributes on direct calls (so this patch is not entirely
an NFC).
Same as #137239, but with a change to avoid inferring SME attributes for
function definitions. This allows stubbing the SME ABI routines in C/C++
(and matches the old behaviour).
Commit: 85c3c986304a83b2e2fda2cefb62e0f456c14dac
https://github.com/llvm/llvm-project/commit/85c3c986304a83b2e2fda2cefb62e0f456c14dac
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/include/lldb/Core/Address.h
M lldb/source/Core/Address.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/test/Shell/Unwind/Inputs/basic-block-sections-with-dwarf.s
M lldb/test/Shell/Unwind/basic-block-sections-with-dwarf-static.test
Log Message:
-----------
[lldb] Fix offset computation in RegisterContextUnwind (#137155)
AddressFunctionScope was always returning the first address range of the
function (assuming it was the only one). This doesn't work for
RegisterContextUnwind (it's only caller), when the function doesn't
start at the lowest address because it throws off the 'how many bytes
"into" a function I am' computation. This patch replaces the result with
a call to (recently introduced)
SymbolContext::GetFunctionOrSymbolAddress.
Commit: 291fa641ec084ce32468d8a2a9205157d88b022d
https://github.com/llvm/llvm-project/commit/291fa641ec084ce32468d8a2a9205157d88b022d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A clang/test/Headers/__clang_hip_cmath-return_types.hip
Log Message:
-----------
Pre-Commit tests: [HIP] Fix return type in __clang_hip_cmath.h (#139891)
Tests related to https://github.com/llvm/llvm-project/pull/139697
Commit: aa9f8596b01fef013ab62c20e61fc96d165f60f7
https://github.com/llvm/llvm-project/commit/aa9f8596b01fef013ab62c20e61fc96d165f60f7
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-all-indirect-accesses.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
[AMDGPU] Add flag to prevent reruns of LowerModuleLDS (#129520)
FullLTO has to run this early before module splitting occurs otherwise
module splitting won't work as expected. There was a targeted fix for
fortran on another branch that disables the LTO run but that'd break
full LTO module splitting entirely.
Test changes are due to metadata indexes shifting.
See #122891
Commit: c15539cdc45dafbaca45cda83d0ca7a09d6b9d51
https://github.com/llvm/llvm-project/commit/c15539cdc45dafbaca45cda83d0ca7a09d6b9d51
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
Log Message:
-----------
[mlir][x86vector] Improve intrinsic operands creation (#138666)
Refactors intrinsic op interface to delegate initial operands mapping to
the dialect converter and allow intrinsic operands getters to only
perform last mile post-processing.
Commit: 780054d3ff18075a6bc433029f336931792b1d2d
https://github.com/llvm/llvm-project/commit/780054d3ff18075a6bc433029f336931792b1d2d
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
A llvm/test/CodeGen/AArch64/nofpclass.ll
A llvm/test/CodeGen/ARM/nofpclass.ll
A llvm/test/CodeGen/Mips/nofpclass.ll
A llvm/test/CodeGen/X86/nofpclass.ll
Log Message:
-----------
CodeGen: Add ISD::AssertNoFPClass (#138839)
It is used to mark a value that we are sure that it is not some fcType.
The examples include:
* An arguments of a function is marked with nofpclass
* Output value of an intrinsic can be sure to not be some type
So that the following operation can make some assumptions.
Commit: 0bc39937164f09823c906926d7eefd7a8bcb5161
https://github.com/llvm/llvm-project/commit/0bc39937164f09823c906926d7eefd7a8bcb5161
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[SelectionDAG] Add an ISD node for for get.active.lane.mask (#139084)
For now expansion still happens in SelectionDAGBuilder when
GET_ACTIVE_LANE_MASK is not legal on the target.
This patch also includes changes in AArch64ISelLowering to replace
handling of the get.active.lane.mask intrinsic to use the ISD node.
Tablegen patterns are added which match to whilelo for scalable types.
A follow up change will add support for more types to be lowered to
GET_ACTIVE_LANE_MASK by allowing splitting of the node.
Commit: eb5e66b82d09a5d084700fa5d8713c40d27ed1bd
https://github.com/llvm/llvm-project/commit/eb5e66b82d09a5d084700fa5d8713c40d27ed1bd
Author: Alexander Romanov <alexander.romanov at syntacore.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
Log Message:
-----------
[RISCV] Change type of Zicbop prefetch operand to GPRMem (#139888)
Prior to this commit PREFETCH_* instructions considered their operand
register to be a simple GPR which is not entirely correct as it is a
base address for possible prefetching operation (According to cmobase
v1.0.1)
Commit: c4f7ab1d2e27d7d742d89606eb40ffd547b448b1
https://github.com/llvm/llvm-project/commit/c4f7ab1d2e27d7d742d89606eb40ffd547b448b1
Author: George Chaltas <george.chaltas at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Initialize IR block pointers in ILV. (NFC) (#139807)
Setting unitialized pointers to nullptr in InnerLoopVectorizer()
constructor. These were noticed during a review of the code. Seems like
a good idea to clean them up.
Commit: ba5591e39d50973bf60fe2716d085465b62768e8
https://github.com/llvm/llvm-project/commit/ba5591e39d50973bf60fe2716d085465b62768e8
Author: Pablo Antonio Martinez <pablo.antonio.martinez at huawei.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
Log Message:
-----------
[mlir][Transform] Reuse bbArgs in FuseIntoContainingOp (#135066)
When fusing two ops with the same output operand using
FuseIntoContainingOp, the current implementation makes both ops write
into a different value pointing to the same tensor. This, in the end,
will bufferize into two different buffers, which is sub-optimal. The
current patch solves this problem, adding support to reuse the tensor by
both consumer and producer.
More precisely, before FuseIntoContainingOp is applied, we may have two
ops that write into the same output tensor. However, the consumer would
be tiled, thus the op would write into the loop iter_args (i.e., it does
not write directly into the original tensor). When the producer is fused
into the loop, the output tensor of the producer remains the same, so
the consumer and producer writes into two different values (consumer
writes into the iter_args and producer into the original tensor).
The current patch clones the consumer into the loop and checks if the
consumer is writing to the same value pointed by the loop inits, in
which case, it makes the output point to such tensor.
Commit: 947a52db7c88a6946e0d888851cc93faca6d726f
https://github.com/llvm/llvm-project/commit/947a52db7c88a6946e0d888851cc93faca6d726f
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-arith-saturating.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/fix-shuffle-vector-be-rev.ll
M llvm/test/CodeGen/AArch64/fp16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-bitcast.ll
M llvm/test/CodeGen/AArch64/neon-insert-sve-elt.ll
M llvm/test/CodeGen/AArch64/neon-insextbitcast.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/vector-fcvt.ll
Log Message:
-----------
[AArch64] Prefer using DUP instead of INS where possible (#138549)
Replace all instances of `INS(IMPLICIT_DEF, 0, v, idx)` with
`DUP(v, idx)` in instruction selection.
`INS` (e.g. `mov v0.s[0], v1.s[1]`) has a value dependency on its output
register, which becomes a false dependency when we're inserting into an
`IMPLICIT_DEF` register. We can break this false dependency by using
`DUP` (e.g. `mov s0, v1.s[1]`) instead.
Commit: fbdf38ed4397e1d24c31a4bd79f7c6f55939f34f
https://github.com/llvm/llvm-project/commit/fbdf38ed4397e1d24c31a4bd79f7c6f55939f34f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/src/.clang-tidy
M libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/libcxx/clang_tidy.sh.py
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] run clang-tidy on src/ in the CI (#121198)
This adds a new test to run clang-tidy on the `src/` directory and
temporarily disables and clang-tidy checks that currently fail. They
will be enabled in follow-up patches.
Commit: e7e4d99c586399758e6ddb76fb358c2dcccfae36
https://github.com/llvm/llvm-project/commit/e7e4d99c586399758e6ddb76fb358c2dcccfae36
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
Log Message:
-----------
[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. (#139904)
`SIMDScalarLShiftDTied` should be using `vecshiftL64` to match
the immediate argument rather than `vecshiftR64` as the latter
prevents the pattern from matching 0 (and allows 64 instead).
Fixes #139879.
Commit: 49bced456c50fbb4e06543115b34e15585c7864b
https://github.com/llvm/llvm-project/commit/49bced456c50fbb4e06543115b34e15585c7864b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/include/__format/format_functions.h
M libcxx/test/benchmarks/format/format.bench.cpp
Log Message:
-----------
[libc++] Add basic constant folding for std::format (#107197)
```
-------------------------------------------------------------------
Benchmark old new
-------------------------------------------------------------------
BM_format_string<char>/1 42.1 ns 7.67 ns
BM_format_string<char>/2 22.3 ns 3.84 ns
BM_format_string<char>/4 10.6 ns 1.92 ns
BM_format_string<char>/8 5.31 ns 0.815 ns
BM_format_string<char>/16 2.79 ns 0.480 ns
BM_format_string<char>/32 1.63 ns 0.550 ns
BM_format_string<char>/64 0.782 ns 0.276 ns
BM_format_string<char>/128 0.397 ns 0.145 ns
BM_format_string<char>/256 0.211 ns 0.066 ns
BM_format_string<char>/512 0.154 ns 0.035 ns
BM_format_string<char>/1024 0.146 ns 0.021 ns
BM_format_string<char>/2048 0.125 ns 0.033 ns
BM_format_string<char>/4096 0.097 ns 0.016 ns
BM_format_string<char>/8192 0.077 ns 0.012 ns
BM_format_string<char>/16384 0.066 ns 0.010 ns
BM_format_string<char>/32768 0.062 ns 0.016 ns
BM_format_string<char>/65536 0.062 ns 0.016 ns
BM_format_string<char>/131072 0.443 ns 0.015 ns
BM_format_string<char>/262144 0.629 ns 0.017 ns
BM_format_string<char>/524288 0.715 ns 0.020 ns
BM_format_string<char>/1048576 0.757 ns 0.020 ns
BM_format_string<wchar_t>/1 38.8 ns 34.0 ns
BM_format_string<wchar_t>/2 19.4 ns 16.9 ns
BM_format_string<wchar_t>/4 9.88 ns 8.45 ns
BM_format_string<wchar_t>/8 6.30 ns 6.47 ns
BM_format_string<wchar_t>/16 3.11 ns 3.21 ns
BM_format_string<wchar_t>/32 1.60 ns 1.63 ns
BM_format_string<wchar_t>/64 0.899 ns 0.925 ns
BM_format_string<wchar_t>/128 0.676 ns 0.693 ns
BM_format_string<wchar_t>/256 0.658 ns 0.685 ns
BM_format_string<wchar_t>/512 0.556 ns 0.531 ns
BM_format_string<wchar_t>/1024 0.428 ns 0.402 ns
BM_format_string<wchar_t>/2048 0.328 ns 0.319 ns
BM_format_string<wchar_t>/4096 0.276 ns 0.274 ns
BM_format_string<wchar_t>/8192 0.252 ns 0.251 ns
BM_format_string<wchar_t>/16384 0.248 ns 0.246 ns
BM_format_string<wchar_t>/32768 0.229 ns 0.232 ns
BM_format_string<wchar_t>/65536 0.248 ns 0.246 ns
BM_format_string<wchar_t>/131072 0.250 ns 0.240 ns
BM_format_string<wchar_t>/262144 3.03 ns 3.03 ns
BM_format_string<wchar_t>/524288 3.14 ns 3.15 ns
BM_format_string<wchar_t>/1048576 3.60 ns 3.61 ns
BM_string_without_formatting<char> 32.2 ns 0.470 ns
BM_string_without_formatting<wchar_t> 38.8 ns 10.2 ns
```
Commit: 9893f6bed3ab707383dc1901a237f0d4481049d6
https://github.com/llvm/llvm-project/commit/9893f6bed3ab707383dc1901a237f0d4481049d6
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_cmath.h
M clang/test/Headers/__clang_hip_cmath-return_types.hip
Log Message:
-----------
[HIP] Fix return type in __clang_hip_cmath.h (#139697)
Before, some functions like `isgreater(float, double)` would return a
`double` instead of a `bool`.
Stumbled upon this bug while trying to adapt
[`External/CUDA/cmath.cu`](https://github.com/llvm/llvm-test-suite/blob/main/External/CUDA/cmath.cu)
to HIP.
```
/_llvm-test-suite/External/HIP/../CUDA/math_h.cu:617:20: error: static assertion failed due to requirement 'std::is_same<double, bool>::value':
617 | static_assert((std::is_same<decltype(isgreater((float)0, (double)0)), bool>::value), "");
```
Commit: 8bd35ca41253ea36fff78d5acf59956a30b6555b
https://github.com/llvm/llvm-project/commit/8bd35ca41253ea36fff78d5acf59956a30b6555b
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
Log Message:
-----------
[SPIR-V] Fix LIT tests, improve ICmpInst's type inference (#139726)
1. There are failed LIT tests at the moment due to type inference
errors.
```
Failed Tests (3):
LLVM :: CodeGen/SPIRV/pointers/ptr-eq-types.ll
LLVM :: CodeGen/SPIRV/validate/sycl-hier-par-basic.ll
LLVM :: CodeGen/SPIRV/validate/sycl-tangle-group-algorithms.ll
```
This PR improves type inference to fix the errors.
2. The following tests start passing:
```
Unexpectedly Passed Tests (2):
LLVM :: CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
LLVM :: CodeGen/SPIRV/pointers/resource-addrspacecast.ll
```
This PR removes XFAILS in those two test cases.
Commit: c807395011a027caae9ac196edfac328fb90443a
https://github.com/llvm/llvm-project/commit/c807395011a027caae9ac196edfac328fb90443a
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/long-pointer-distance.ll
Log Message:
-----------
[LAA/SLP] Don't truncate APInt in getPointersDiff (#139941)
Change getPointersDiff to return an std::optional<int64_t>, and fill
this value with using APInt::trySExtValue. This simple change requires
changes to other functions in LAA, and major changes in SLPVectorizer
changing types from 32-bit to 64-bit.
Fixes #139202.
Commit: 7cc200529f5791ceed510a02c0fa5343d535267d
https://github.com/llvm/llvm-project/commit/7cc200529f5791ceed510a02c0fa5343d535267d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/pr63108.ll
Log Message:
-----------
[X86] pr63108.ll - regenerate test checks
Commit: 7983bdcaa57cb8647b7abede15ec91c89cc43bba
https://github.com/llvm/llvm-project/commit/7983bdcaa57cb8647b7abede15ec91c89cc43bba
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
Log Message:
-----------
[X86] machine-combiner-int-vec.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: 4f19a5c050b0f18703198d839f135a7800306eb5
https://github.com/llvm/llvm-project/commit/4f19a5c050b0f18703198d839f135a7800306eb5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/avg-mask.ll
Log Message:
-----------
[X86] avg-mask.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: 156985eb8803d72caeff2cbe0e9098286606847f
https://github.com/llvm/llvm-project/commit/156985eb8803d72caeff2cbe0e9098286606847f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/CodeGen/X86/avgfloors.ll
Log Message:
-----------
[X86] avgfloors.ll - regenerate test checks for TERNLOG comments
Reduces diffs in upcoming patch
Commit: 4ba8f4e213c97733e3b61e5856b0e85e3d7d6a7f
https://github.com/llvm/llvm-project/commit/4ba8f4e213c97733e3b61e5856b0e85e3d7d6a7f
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb][lldb-dap] Migrate ScopesRequest to structured types (#138116)
Migrate ScopesRequest To use the Protocol Types
Commit: 5b0572875cafb02fc144d1f6e6e51a34ef27d951
https://github.com/llvm/llvm-project/commit/5b0572875cafb02fc144d1f6e6e51a34ef27d951
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lld/COFF/COFFLinkerContext.h
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/test/COFF/arm64ec-entry-mangle.test
M lld/test/COFF/arm64ec-hybmp.s
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-patchable-thunks.test
M lld/test/COFF/arm64ec-range-thunks.s
M lld/test/COFF/arm64ec.test
M lld/test/COFF/arm64x-altnames.s
M lld/test/COFF/arm64x-buildid.s
M lld/test/COFF/arm64x-comm.s
M lld/test/COFF/arm64x-crt-sec.s
M lld/test/COFF/arm64x-ctors-sec.s
M lld/test/COFF/arm64x-guardcf.s
M lld/test/COFF/arm64x-import.test
M lld/test/COFF/arm64x-symtab.s
M lld/test/COFF/arm64x-wrap.s
M lld/test/COFF/autoimport-arm64ec-data.test
Log Message:
-----------
[LLD][COFF] Add support for including native ARM64 objects in ARM64EC images (#137653)
MSVC linker accepts native ARM64 object files as input with
`-machine:arm64ec`, similar to `-machine:arm64x`. Its usefulness is very
limited; for example, both exports and imports are not reflected in the
PE structures and can't work. However, their symbol tables are otherwise
functional.
Since we already have handling of multiple symbol tables implemented for
ARM64X, the required changes are mostly about adjusting relevant checks
to account for them on the ARM64EC target.
Delay-load helper handling is a bit of a shortcut. The patch never pulls
it for native object files and just ensures that the code is fine with
that. In general, I think it would be nice to adjust the driver to pull
it only when it's actually referenced, which would allow applying the
same logic to the native symbol table on ARM64EC without worrying about
pulling too much.
Commit: 3764ba23484afda683eea390407103e609ef4354
https://github.com/llvm/llvm-project/commit/3764ba23484afda683eea390407103e609ef4354
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/aarch64/chkstk.S
M compiler-rt/lib/builtins/aarch64/lse.S
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
M compiler-rt/lib/builtins/clear_cache.c
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64.h
M compiler-rt/lib/builtins/fp_compare_impl.inc
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/builtins/udivmodti4.c
M compiler-rt/test/builtins/Unit/enable_execute_stack_test.c
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
[compiler-rt] Add initial ARM64EC builtins support (#139279)
Use the aarch64 variants of assembly functions.
Co-authored-by: Billy Laws <blaws05 at gmail.com>
Commit: 849ecbc3ba1c95f41ee8dd5240c314e1a1980438
https://github.com/llvm/llvm-project/commit/849ecbc3ba1c95f41ee8dd5240c314e1a1980438
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[AMDGPU] Simplify getIns64. NFCI. (#139981)
This big switch is unmaintainable and buggy. In particular it
unconditionally
adds clamp if there is omod to VOP3.
Commit: e3867cb07ed1ed319609fbea0ce15f40e2a0efad
https://github.com/llvm/llvm-project/commit/e3867cb07ed1ed319609fbea0ce15f40e2a0efad
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[NFC][lldb][lldb-dap] fix C++20 extension warning (#140031)
warning for designated initializers
introduced in commit 4ba8f4e
Commit: d5da557782dd47395fb41e03d7663df6319d7ea6
https://github.com/llvm/llvm-project/commit/d5da557782dd47395fb41e03d7663df6319d7ea6
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
A lld/test/COFF/arm64x-sameaddress.test
Log Message:
-----------
[LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631)
Make it a no-op for now, which is sufficient for non-hybrid images.
Fixes #131712.
Commit: c507a0830df2e4fd0c234eee035aac2109de6d6e
https://github.com/llvm/llvm-project/commit/c507a0830df2e4fd0c234eee035aac2109de6d6e
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
Log Message:
-----------
[NVPTX] Add TMA Bulk Copy Intrinsics (#138679)
This patch adds a new variant of TMA Bulk Copy
intrinsics introduced in sm100+. This variant
has an additional byte_mask to select the bytes
for the copy operation.
* Selection is all done through table-gen now.
So, this patch removes the corresponding
SelectCpAsyncBulkS2G() function.
* lit tests are verified with a cuda-12.8 ptxas
executable.
PTX Spec link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-bulk-copy
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f8f11c541dec9bfc19f80918cf12da71d6ae7b99
https://github.com/llvm/llvm-project/commit/f8f11c541dec9bfc19f80918cf12da71d6ae7b99
Author: David Green <david.green at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
Log Message:
-----------
[AArch64] Add a test case for the coerced arguments. NFC
Commit: 767a203a9e61e307086be96288947d130367a267
https://github.com/llvm/llvm-project/commit/767a203a9e61e307086be96288947d130367a267
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix discarded LValueToRValueBitCasts (#140034)
We handle discarding fine, but we used to ignore all discarded cast
expressions. Handle bitcasts differently.
Commit: 8bbe0d050ae49062835a8a0729b3219ba1f6362b
https://github.com/llvm/llvm-project/commit/8bbe0d050ae49062835a8a0729b3219ba1f6362b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Verify dominance for incoming values of phi-like recipes. (#124838)
Update the verifier to verify dominance for incoming values for phi-like
recipes. The defining recipe must dominate the incoming block for the
incoming value.
Builds on top of https://github.com/llvm/llvm-project/pull/138472 to
retrieve incoming values & corresponding blocks for phi-like recipes.
PR: https://github.com/llvm/llvm-project/pull/124838
Commit: 42ee758bec885deaad08162cc8e97a87d2aba100
https://github.com/llvm/llvm-project/commit/42ee758bec885deaad08162cc8e97a87d2aba100
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
Log Message:
-----------
Complete the Implementation of DAP modules explorer. (#139934)
This extends the TreeView to show the module property as a tree item instead of
rendering it through the markdown tooltip.
Commit: 30b0946326354d247a92622f08be4722df58bb55
https://github.com/llvm/llvm-project/commit/30b0946326354d247a92622f08be4722df58bb55
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenMP/target.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Improve use_device_* handling (#137198)
This patch updates MLIR op verifiers for operations taking arguments
that must always be defined by an `omp.map.info` operation to check this
requirement.
It also modifies Flang lowering for `use_device_{addr, ptr}`, as well as
the custom MLIR printer and parser for these clauses, to support
initializing it to `OMP_MAP_RETURN_PARAM` and represent this in the MLIR
representation as `return_param`. This internal mapping flag is what
eventually is used for variables passed via these clauses into the
target region when translating to LLVM IR, so making it explicit in
Flang and MLIR removes an inconsistency in the current representation.
Commit: 0cd7e8aa911dd4d0d6f4c43bef28fd853cf929f5
https://github.com/llvm/llvm-project/commit/0cd7e8aa911dd4d0d6f4c43bef28fd853cf929f5
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Assert on map translation functions, NFC (#137199)
This patch adds assertions to map-related MLIR to LLVM IR translation
functions and utils to explicitly document whether they are intended for
host or device compilation only.
Over time, map-related handling has increased in complexity. This is
compounded by the fact that some handling is device-specific and some is
host-specific. By explicitly asserting on these functions on the
expected compilation pass, the flow should become slighlty easier to
follow.
Commit: 849990479f0ccc93b1f599167de6e90bdd3e219a
https://github.com/llvm/llvm-project/commit/849990479f0ccc93b1f599167de6e90bdd3e219a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Update check line in verifier unit test w/o assertions.
Should fix failures with assertions disabled, including
https://lab.llvm.org/buildbot/#/builders/2/builds/24015.
Commit: 310ed2b070432db3899473c4c2fd92f6a5e35067
https://github.com/llvm/llvm-project/commit/310ed2b070432db3899473c4c2fd92f6a5e35067
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
Log Message:
-----------
[LoopUnroll] Add tests with multiple exiting/latches and small BTCs.
Extra test coverage for cases mentioned during review of
https://github.com/llvm/llvm-project/pull/139551.
Commit: 124e547e83f3604ac634083542f5313d1badef9b
https://github.com/llvm/llvm-project/commit/124e547e83f3604ac634083542f5313d1badef9b
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Docs] Correct Radeon Pro 5600M ISA (#140041)
As observed by LLVM Discord user "buck", the Radeon Pro 5600M is gfx1011
and the entry in the gfx1010 category was probably meant to be Radeon RX
5600M which indeed is gfx1010.
Commit: 2110faaf5546c06fa4e06697eff8842f19302221
https://github.com/llvm/llvm-project/commit/2110faaf5546c06fa4e06697eff8842f19302221
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/utils/TableGen/X86RecognizableInstr.cpp
Log Message:
-----------
[NFC][TableGen][X86] Use StringSwitch to map from string -> enum (#139929)
Use StringSwitch instead of macro to map from a string to enum values in
X86RecognizableInstr.cpp.
Commit: df9a90cdc5d6a74a183e0c1a77bd7fceacf1df0c
https://github.com/llvm/llvm-project/commit/df9a90cdc5d6a74a183e0c1a77bd7fceacf1df0c
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][test] Define print_possible_return_addresses on SPARC (#138523)
Parts of the `openmp` testsuite currently don't build on SPARC due to
the lack of a `print_possible_return_addresses` definition.
This patch provides one. With it, the vast majority of tests `PASS` on
Solaris/sparcv9 and, with an additional patch, on Linux/sparc64.
The current definition was obtained empirically.
Tested on `sparcv9-sun-solaris2.11`, `sparc64-unknown-linux-gnu`,
`amd64-pc-solaris2.11`, and `x86_64-pc-linux-gnu`.
Commit: f1eebf9e94e3051e88e8f3d3365b663a88e1ca0a
https://github.com/llvm/llvm-project/commit/f1eebf9e94e3051e88e8f3d3365b663a88e1ca0a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/AST/ASTConcept.h
M clang/lib/AST/ASTConcept.cpp
Log Message:
-----------
[NFC][Clang] Adopt simplified `getTrailingObjects` in ASTConcept (#139974)
Use non-templated form of `getTrailingObjects` when using a single
trailing type in `TrailingObjects`.
Commit: 5f53ca30da249b2d46f61791e12e74efef9a8bb6
https://github.com/llvm/llvm-project/commit/5f53ca30da249b2d46f61791e12e74efef9a8bb6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[NFC][Clang] Adopt simplified `getTrailingObjects` in Decl/DeclTemplate (#139977)
Adopt simplied `getTrailingObjects` variants that are not templated
and/or return ArrayRef in Decl/DeclTemplate .h/.cpp files.
Commit: b26adacc8550bc8786ecba08ec87d0b228930bf4
https://github.com/llvm/llvm-project/commit/b26adacc8550bc8786ecba08ec87d0b228930bf4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check destructors for temporaries (#140039)
Also, increase the EvalID in isPotentialConstantExpr(), since this is
its own evaluation.
Commit: 8e2ac7d6194451cbe2b7203212f2bb4f278e6438
https://github.com/llvm/llvm-project/commit/8e2ac7d6194451cbe2b7203212f2bb4f278e6438
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[llvm][OpenMP] Add "SourceLanguages" property to Directive (#139960)
The official languages that OpenMP recognizes are C/C++ and Fortran.
Some OpenMP directives are language-specific, some are C/C++-only, some
are Fortran-only.
Add a property to the TableGen definition of Directive that will be the
list of languages that allow the directive.
The TableGen backend will then generate a bitmask-like enumeration
SourceLanguages, and a function
SourceLanguages getDirectiveLanguages(Directive D);
Commit: 9273091502994f9b68ca0d1fd04fadd02c0a36df
https://github.com/llvm/llvm-project/commit/9273091502994f9b68ca0d1fd04fadd02c0a36df
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
A clang/test/OpenMP/openmp_non_c_directives.c
R clang/test/OpenMP/openmp_workshare.c
Log Message:
-----------
[clang][OpenMP] Improve handling of non-C/C++ directives (#139961)
The PR139793 added handling of the Fortran-only "workshare" directive,
however there are more such directives, e.g. "allocators". Use the
genDirectiveLanguages function to detect non-C/C++ directives instead of
enumerating them.
Commit: 6090c0e0ee1ab8f1a9b6b2354fc5b204ebaebb99
https://github.com/llvm/llvm-project/commit/6090c0e0ee1ab8f1a9b6b2354fc5b204ebaebb99
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M bolt/test/X86/callcont-fallthru.s
Log Message:
-----------
[BOLT][test] Fix disabling of the PLT check in callcont-fallthru (#140026)
PR #139953 used `DONTRUN` to disable some run lines, but that didn't
work. Now switching to `RUN-DISABLED` for disabling the tests until
llvm-nm support is landed (#138232).
Commit: 43db72d56d6491e5b826172f9dea706aec92693c
https://github.com/llvm/llvm-project/commit/43db72d56d6491e5b826172f9dea706aec92693c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp
A llvm/test/Transforms/ForcedFunctionAttrs/open-file-error.ll
Log Message:
-----------
ForceFunctionAttrs: Use reportFatalUsageError (#139473)
Commit: 6fc031291955d5d3c69f7df9b9f7460c473d114a
https://github.com/llvm/llvm-project/commit/6fc031291955d5d3c69f7df9b9f7460c473d114a
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/CodeGen/AArch64/fp8-init-list.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/arm-mfp8.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Add fp8 variants for untyped NEON intrinsics (#128019)
This patch adds fp8 variants to existing intrinsics, whose operation
doesn't depend on arguments being a specific type.
It also changes mfloat8 type representation in memory from `i8` to
`<1xi8>`
Commit: d08b176edc82b8fbd417e0ead7b77abc5f45fce2
https://github.com/llvm/llvm-project/commit/d08b176edc82b8fbd417e0ead7b77abc5f45fce2
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Add `inline_ptx` op (#139923)
This op allows using PTX directly within the NVVM dialect, while greatly
simplifying llvm.inline_asm generation.
**Example 1: Read-only Parameters**
Sets `"l,r"` automatically.
```
nvvm.inline_ptx "mbarrier.init.b64 [$0], $1;" (%barrier_gen, %count) : !llvm.ptr, i32
// Lowers to:
llvm.inline_asm has_side_effects asm_dialect = att
"mbarrier.init.b64 [$0], $1;", "l,r" %arg0, %arg2 : (!llvm.ptr, i32) -> ()
```
**Example 2: Read-only and Write-only Parameters**
Sets `=f,f"` automatically. `=` is set because there is store.
```
%0 = nvvm.inline_ptx "ex2.approx.ftz.f32 $0, $1;" (%input) : f32 -> f32
// Lowers to:
%0 = llvm.inline_asm has_side_effects asm_dialect = att "ex2.approx.ftz.f32 $0, $1;", "=f,f" %arg0 : (f32) -> f32
```
**Example 3: Predicate Usage**
Now `@$2` is set automatically for predication.
```
nvvm.inline_ptx "mbarrier.init.b64 [$0], $1;" (%barrier_gen, %count), predicate = %pred : !llvm.ptr, i32, i1
// Lowers to:
llvm.inline_asm has_side_effects asm_dialect = att "@$2 mbarrier.init.b64 [$0], $1;", "l,r,b" %arg0, %arg2, %arg3 : (!llvm.ptr, i32, i1) -> ()
```
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: a2f156b84ab124ccfbbe2bd6cbbdb2f3bcbba0ce
https://github.com/llvm/llvm-project/commit/a2f156b84ab124ccfbbe2bd6cbbdb2f3bcbba0ce
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix deduction of explicit object member functions (#140030)
When taking the address of an overload set containing an explicit object
member, we should not take the
explicit object parameter into account.
Commit: 636628d8fde45fc2bb99a1016f7503d0e744ab89
https://github.com/llvm/llvm-project/commit/636628d8fde45fc2bb99a1016f7503d0e744ab89
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Frontend/CommandLineSourceLoc.h
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeCompletion/source-loc-zero.cpp
A clang/test/Refactor/source-loc-zero.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
Log Message:
-----------
[clang] Enforce 1-based indexing for command line source locations (#139457)
Fixes #139375
Clang expects command line source locations to be provided using 1-based
indexing.
Currently, Clang does not reject zero as invalid argument for column or
line number, which can cause Clang to crash.
This commit extends validation in `ParsedSourceLocation::FromString` to
only accept (unsinged) non-zero integers.
Commit: 9a26dff74834d6c3d9d72eac10e2f2479014ebca
https://github.com/llvm/llvm-project/commit/9a26dff74834d6c3d9d72eac10e2f2479014ebca
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check dtor calls for one-past-end pointers (#140047)
Commit: 6ee30e8dd8810f6ce49095a30a2caae683d92ff5
https://github.com/llvm/llvm-project/commit/6ee30e8dd8810f6ce49095a30a2caae683d92ff5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[InstCombine] Fix incorrect number of iterations (#140004)
Commit: 7314d38b72ea647c67ceab0de4755d2d61073dac
https://github.com/llvm/llvm-project/commit/7314d38b72ea647c67ceab0de4755d2d61073dac
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[NFC][AutoUpgrade] Use `ConstantPointerNull::get` instead of `Constant::getNullValue` for known pointer types (#139984)
This is a preparation change for upcoming PRs that will update the
semantics of
`ConstantPointerNull`, making it to represent an actual `nullptr` rather
than a
zero-valued pointer.
Commit: 9658c55116c2bb4757ca309b37028f06f5709526
https://github.com/llvm/llvm-project/commit/9658c55116c2bb4757ca309b37028f06f5709526
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Fix a warning
This patch fixes:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7506:17: error:
unused variable 'NoFPClass' [-Werror,-Wunused-variable]
Commit: ed572aaac8b142a7bf09a235f5497bc7e201f762
https://github.com/llvm/llvm-project/commit/ed572aaac8b142a7bf09a235f5497bc7e201f762
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/include/flang/Semantics/symbol.h
Log Message:
-----------
[flang] Add missing copy assignment operator (#139966)
On Clang 17 the implicit copy assignment operator was issuing a warning because of the user-declared copy constructor. Declare the copy assignment operator as default.
Commit: 059b0c2efbf30d986d812c4d2cf6d6c7876569fe
https://github.com/llvm/llvm-project/commit/059b0c2efbf30d986d812c4d2cf6d6c7876569fe
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking][NFC] Drop outdated TODO in canCreateUndefOrPoison (#139915)
The inrange constexpr GEP case is handled since 425cbbc602c9.
Commit: 1f570b1c2df6ec93a90ec8f0751fe8355644f1c6
https://github.com/llvm/llvm-project/commit/1f570b1c2df6ec93a90ec8f0751fe8355644f1c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Use llvm::unique (NFC) (#139910)
While I am at it, this patch removes the "if" statement.
std::vector::erase(first, last) doesn't do anything when
first == last.
Commit: 9f569fe2e7b68db856716a1ae3b0a6738a281d1e
https://github.com/llvm/llvm-project/commit/9f569fe2e7b68db856716a1ae3b0a6738a281d1e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb] Use std::optional::value_or (NFC) (#140011)
Commit: d9ab5bc82d7e5dc4d132d1e674b06ec683e019f9
https://github.com/llvm/llvm-project/commit/d9ab5bc82d7e5dc4d132d1e674b06ec683e019f9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Quant/IR/QuantOps.cpp
Log Message:
-----------
[mlir] Use llvm::is_contained (NFC) (#140012)
Commit: 3667f29dfd1100a0eda7bfc4584ba2cfb6880b94
https://github.com/llvm/llvm-project/commit/3667f29dfd1100a0eda7bfc4584ba2cfb6880b94
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
Log Message:
-----------
[llvm] Use std::optional::value_or (NFC) (#140014)
Commit: b7d6a54703823bfba2b437e4b764ceb16b73c2af
https://github.com/llvm/llvm-project/commit/b7d6a54703823bfba2b437e4b764ceb16b73c2af
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M libcxx/docs/CodingGuidelines.rst
M libcxx/docs/DesignDocs/FileTimeType.rst
M libcxx/docs/TestingLibcxx.rst
Log Message:
-----------
[libc++] Fix typos in documentation (#139853)
Commit: 3d6d5dfed2b303e9fba74586993df3fa85058991
https://github.com/llvm/llvm-project/commit/3d6d5dfed2b303e9fba74586993df3fa85058991
Author: James Newling <james.newling at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Address linearization comments (post commit) (#138075)
This PR adds some documentation to address comments in
https://github.com/llvm/llvm-project/pull/136581
This PR adds a test for linearization across scf.for. This new test
might be considered redundant by more experienced MLIRers, but might
help newer users understand how to linearize scf/cf/func operations
easily
The documentation added in this PR also tightens our definition of
linearization, to now exclude unrolling (which creates multiple ops from
1 op). We hadn't really specified what linearization meant before.
Commit: 6d942c5c16c384feca50c9f2a4262413410e7d9e
https://github.com/llvm/llvm-project/commit/6d942c5c16c384feca50c9f2a4262413410e7d9e
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[llvm] Fix test breakage in Vectorize/VPlanVerifierTest.cpp (#140079)
Fix test breakage in Vectorize/VPlanVerifierTest.cpp introduced in
change 849990479 (typo).
Commit: cd72777f09506a43daeae64dce587cde9c57a1f6
https://github.com/llvm/llvm-project/commit/cd72777f09506a43daeae64dce587cde9c57a1f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/zdinx-spill.ll
Log Message:
-----------
[RISCV] Add test for spilling and reloading a GPRPair for Zdinx+RV32. NFC (#139983)
I couldn't find any existing coverage for PseudoRV32ZdinxSD and
PseudoRV32ZdinxLD being emitted from
storeRegToStackSlot/loadRegFromStackSlot.
Commit: 426573332cb7c70ede293d13bac7564eb2c0b753
https://github.com/llvm/llvm-project/commit/426573332cb7c70ede293d13bac7564eb2c0b753
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Use RISCVRegisterInfo::isRVVRegClass to replace IsScalableVector in storeRegToStackSlot/loadRegFromStackSlot. NFC (#139979)
Commit: 540cf25a6df56fa1810a7411477dca9896aeed20
https://github.com/llvm/llvm-project/commit/540cf25a6df56fa1810a7411477dca9896aeed20
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
M llvm/test/CodeGen/RISCV/zdinx-memoperand.ll
Log Message:
-----------
[RISCV] Split f64 loads/stores for RV32+Zdinx during isel instead of post-RA. (#139840)
This avoids a bunch of complexity around making sure the offset doesn't
exceed 4093 so we can add 4 after splitting later. By splitting early,
the split loads/stores will get selected independently.
There's a bit of follow up work to do, particularly around splitting a
constant pool load. Overall I think this is cleaner with less edge
cases.
Commit: 381a649fb991eadb0c594de2d8b6166fcc11345a
https://github.com/llvm/llvm-project/commit/381a649fb991eadb0c594de2d8b6166fcc11345a
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTDiagnostic.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/SemaCXX/warn-implicit-unicode-conversions.cpp
M libcxx/include/print
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/localization/codecvt_unicode.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp
M libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char8_t/assign2.pass.cpp
M libcxx/utils/libcxx/test/features.py
M llvm/include/llvm/Support/ConvertUTF.h
M llvm/lib/Support/ConvertUTFWrapper.cpp
Log Message:
-----------
[Clang] Add warnings when mixing different charN_t types (#138708)
charN_t represent code units of different UTF encodings. Therefore the
values of 2 different charN_t objects do not represent the same
characters.
In order to avoid comparing apples and oranges, we add new warnings to
warn on:
- Implicit conversions
- Comparisons
- Other cases involving arithmetic conversions
We only produce the warning if we cannot establish the comparison would
be safe through constant evaluation.
The new `-Wimplicit-unicode-conversion` warning is enabled by default.
Note that this PR intentionally doesn;t touches char/wchar_t, but it
would be worth considering also warning on extending the new warnings to
these types (in a follow up)
Additionally most arithmetic operations on charN_t don't really make
sense (ie what does it mean to addition code units), so we could add
warnings for that.
Fixes #138526
Commit: 21d506414053d260ee78fa5a27b6bf3edc547088
https://github.com/llvm/llvm-project/commit/21d506414053d260ee78fa5a27b6bf3edc547088
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - remove VBMI2 limit for v32i16/v64i8 shuffle concatentation (#140077)
This is no longer required with the improvements to subvector load sharing with shouldReduceLoadWidth
Commit: d58d5d6e9d6761f88344f439e7fdf63d41c8c384
https://github.com/llvm/llvm-project/commit/d58d5d6e9d6761f88344f439e7fdf63d41c8c384
Author: Vincent <vincent0710 at outlook.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
Log Message:
-----------
[clang] Compound Literal Statement Constant Expression Assertion Fix (#139479)
Compound literals initializer-list should be a constant expression if it
is defined outside the body of a function.
Emit error instead of falling through tripping assertion error.
Fixes #139160
Commit: 5defe490c9b1356916245e1832859c361ac8d812
https://github.com/llvm/llvm-project/commit/5defe490c9b1356916245e1832859c361ac8d812
Author: Thurston Dang <thurston at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
Log Message:
-----------
[sanitizer][NFCI] Add 'SanitizerAnnotateDebugInfo' (#139965)
This generalizes the debug info annotation code from https://github.com/llvm/llvm-project/pull/139149 and moves it into a helper function, SanitizerAnnotateDebugInfo().
Future work can use 'ApplyDebugLocation ApplyTrapDI(*this, SanitizerAnnotateDebugInfo(Ordinal));' to add annotations to additional checks.
Commit: 0eb4bd27d1ab15ea6b078ac386be01ae13d261a9
https://github.com/llvm/llvm-project/commit/0eb4bd27d1ab15ea6b078ac386be01ae13d261a9
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprMember.cpp
M clang/test/Sema/atomic-expr.c
Log Message:
-----------
[C] Silence unreachable -Watomic-access diagnostics (#140064)
Accessing the member of a structure or union which is _Atomic-qualified
is undefined behavior in C. We currently diagnose that with a warning
that defaults to an error. In turn, this means we reject a valid program
if the access it not reachable because of the error. e.g.,
if (0)
SomeAtomicStruct.Member = 12; // Was diagnosed
This silences the diagnostic if the member access is not reachable.
Commit: 59c6d70ed8120b8864e5f796e2bf3de5518a0ef0
https://github.com/llvm/llvm-project/commit/59c6d70ed8120b8864e5f796e2bf3de5518a0ef0
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
A llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-reuse.ll
Log Message:
-----------
[CodeGenPrepare] Make sure instruction get from SunkAddrs is before MemoryInst (#139303)
Function optimizeBlock may do optimizations on a block for multiple
times. In the first iteration of the loop, MemoryInst1 may generate a
sunk instruction and store it into SunkAddrs. In the second iteration of
the loop, MemoryInst2 may use the same address and then it can reuse the
sunk instruction stored in SunkAddrs, but MemoryInst2 may be before
MemoryInst1 and the corresponding sunk instruction. In order to avoid
use before def error, we need to find appropriate insert position for the
sunk instruction.
Fixes #138208.
Commit: 15b20a13e6a35a8c5864080644f9bc39f6dbd573
https://github.com/llvm/llvm-project/commit/15b20a13e6a35a8c5864080644f9bc39f6dbd573
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[NFC][llvm-objdump] Add ostream param to control console prints (#139931)
Commit: 2bc9f43ba1116fb3989e28ecc3934209145a6250
https://github.com/llvm/llvm-project/commit/2bc9f43ba1116fb3989e28ecc3934209145a6250
Author: Alexander Peskov <apeskov at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/NVPTX/shift-opt.ll
Log Message:
-----------
[DAGCombiner] Fold pattern for srl-shl-zext (REAPPLIED) (#140038)
Fold (srl (lop x, (shl (zext y), c1)), c1) -> (lop (srl x, c1), (zext y)) where c1 <= leadingzeros(zext(y)).
This is equivalent of existing fold chain (srl (shl (zext y), c1), c1) -> (and (zext y), mask) -> (zext y), but logical op in the middle prevents it from combining.
Profit : Allow to reduce the number of instructions.
Original commit: #138290 / bbc5221
Previously reverted due to conflict in LIT test. Mainline changed
default version of load instruction to untyped version by this #137698 .
Updated test uses `ld.param.b64` instead of `ld.param.u64`.
Commit: d6b73da15211d2286c6b0750b68d139104d463b9
https://github.com/llvm/llvm-project/commit/d6b73da15211d2286c6b0750b68d139104d463b9
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[NFC] One-liner clang-format (#140104)
`InstrProfWriter::setOutputSparse` gets re-formatted when
InstrProfWriter.cpp is modified. So formatted this line.
Commit: f0d7fea98b4afc29dfca11bfc58c7411c794ccae
https://github.com/llvm/llvm-project/commit/f0d7fea98b4afc29dfca11bfc58c7411c794ccae
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
Log Message:
-----------
[IRBuilder] Use AAMDNodes helper class in CreateMem* routines [nfc-ish] (#139950)
I'm not 100% sure this is NFC because we have the possibility we're
propagating additional metadata we'd missed before. We don't see any
test changes resulting from this though.
Commit: 113898326b9cf3d9bb9edc3023e75fb3e4f82422
https://github.com/llvm/llvm-project/commit/113898326b9cf3d9bb9edc3023e75fb3e4f82422
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 3d6d5dfed2b303e9fba74586993df3fa85058991
Commit: 81d48e0f61f3e78cd6d6be9d3c8e48e7761a5ed5
https://github.com/llvm/llvm-project/commit/81d48e0f61f3e78cd6d6be9d3c8e48e7761a5ed5
Author: Fangyi Zhou <me at fangyi.io>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
A clang/test/Analysis/ftime-trace-no-init.cpp
Log Message:
-----------
[clang][analyzer] Fix a nullptr dereference when -ftime-trace is used (Reland) (#139980)
Fixes #139779.
The bug was introduced in #137355 in `SymbolConjured::getStmt`, when
trying to obtain a statement for a CFG initializer without an
initializer. This commit adds a null check before access.
Previous PR #139820, Revert #139936
Additional notes since previous PR:
When conjuring a symbol, sometimes there is no valid CFG element, e.g.
in the file causing the crash, there is no element at all in the CFG. In
these cases, the CFG element reference in the expression engine will be
invalid. As a consequence, there needs to be extra checks to ensure the
validity of the CFG element reference.
Commit: 682a976768b274c71ebd42198d1bbf0f27fec1e2
https://github.com/llvm/llvm-project/commit/682a976768b274c71ebd42198d1bbf0f27fec1e2
Author: Chengjun <chengjunp at Nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h
Log Message:
-----------
[AA] Change RunEarly to be a Boolean Flag in ExternalAAWrapper (#139158)
Change the previous runEarly virtual function in ExternalAAWrapper to be
a boolean flag.
Commit: 58b9b865feffede59616cfc05cefa956d5352314
https://github.com/llvm/llvm-project/commit/58b9b865feffede59616cfc05cefa956d5352314
Author: John Harrison <harjohn at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.h
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/DAPTest.cpp
A lldb/unittests/DAP/Handler/DisconnectTest.cpp
A lldb/unittests/DAP/TestBase.cpp
A lldb/unittests/DAP/TestBase.h
M lldb/unittests/DAP/TransportTest.cpp
Log Message:
-----------
[lldb-dap] Setup DAP for unit testing. (#139937)
This is a very simple case that currently only validates we can create a
DAP instance and send a message over the transport layer. More in-depth
tests will require additional helpers and possibly refactors of DAP to
make it more testable, however this is some ground work to have basic
support for unit tests.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: e2c1dd5f234664066adce6467a5e3f36834b971b
https://github.com/llvm/llvm-project/commit/e2c1dd5f234664066adce6467a5e3f36834b971b
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M third-party/unittest/googletest/README.LLVM
M third-party/unittest/googletest/include/gtest/gtest-printers.h
Log Message:
-----------
Fix CI after #138708 (#140111)
Silence a warning in gtest casting a char8_t/char16_t to char32_t.
Note that this cast, as well as the behavior of `PrintTo(char32_t)` is
incorrect when printing a code unit that does not represent a code
point. See https://github.com/google/googletest/issues/4762
Commit: 1acac5cd38210131c543e4635fcbfd4d597e15f5
https://github.com/llvm/llvm-project/commit/1acac5cd38210131c543e4635fcbfd4d597e15f5
Author: Sinkevich Artem <a.sinkevich at ispras.ru>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[sanitizer] Fix empty string in unsupported argument error for -fsanitize-trap (#136549)
When using `-fsanitize-trap` with a sanitizer group that doesn't support
trapping, an empty argument is passed to
`err_drv_unsupported_option_argument`. Use new `toStringWithGroups` for
the diagnostic.
Commit: bb10c3ba7f77d40a7fbfd4ac815015d3a4ae476a
https://github.com/llvm/llvm-project/commit/bb10c3ba7f77d40a7fbfd4ac815015d3a4ae476a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Transforms/Utils/LoopPeel.h
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
Log Message:
-----------
[LoopPeel] Implement initial peeling off the last loop iteration. (#139551)
Generalize countToEliminateCompares to also consider peeling off the
last iteration if it eliminates a compare.
At the moment, codegen for peeling off the last iteration is quite
restrictive and callers have to make sure that the exit condition can be
adjusted when peeling and that the loop executes at least 2 iterations.
Both will be relaxed in follow-ups.
PR: https://github.com/llvm/llvm-project/pull/139551
Commit: 2cdb7f3fc4c03df546dc61b67b1a5d2a6f03624d
https://github.com/llvm/llvm-project/commit/2cdb7f3fc4c03df546dc61b67b1a5d2a6f03624d
Author: Nuko Y. <or at dmc.chat>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/reserveXreg.ll
Log Message:
-----------
[AArch64] Disable machine-verifier for failing test, fix perf regression (#140005)
Disables machine-verifier on failing test for now for the test to pass
on expensive-checks. Also fixes performance regression
(https://llvm-compile-time-tracker.com/compare.php?from=64082912a500d004c53ad1b3425098b495572663&to=26f97ee9aa413db240c397f96ddd5b0553a57d30&stat=instructions:u)
mentioned in #138448 by not computing reserved registers every loop
iteration.
Commit: faf5d747f174cc9d714839f0d3bce1a783eac2ac
https://github.com/llvm/llvm-project/commit/faf5d747f174cc9d714839f0d3bce1a783eac2ac
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
Log Message:
-----------
[mlir] Fix DataLayoutPropagation foldings invalidating IR (#140103)
Fixes a bug in DataLayoutPropagation that was replacing generic op
destinations with tensor.empty() ops, even when the destination operand
was being used.
Addresses post-merge comment:
https://github.com/llvm/llvm-project/pull/138332/files/a9c1dccc3f73793bdd9e1f51ab3a6e15403a8338#r2091193712
Signed-off-by: Max Dawkins <maxdawkins19 at gmail.com>
Co-authored-by: Max Dawkins <maxdawkins19 at gmail.com>
Commit: 9457616527b50590e9c9d5e91723b35b26e447cd
https://github.com/llvm/llvm-project/commit/9457616527b50590e9c9d5e91723b35b26e447cd
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/pad-hollerith-arg.f
Log Message:
-----------
[flang] Pad Hollerith actual arguments (#139782)
For more compatible legacy behavior on old tests, extend Hollerith
actual arguments on the right with trailing blanks out to a multiple of
8 bytes. Fixes Fujitsu test 0343_0069.
Commit: 36ccfe29be3a5fec8c9c2e1d8354e304500afd9b
https://github.com/llvm/llvm-project/commit/36ccfe29be3a5fec8c9c2e1d8354e304500afd9b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang-rt/lib/runtime/assign.cpp
Log Message:
-----------
[flang] Clear obsolete type from reallocated allocatable (#139788)
When an assignment to a polymorphic allocatable changes its type to an
intrinsic type, be sure to reset its descriptor's derived type pointer
to null.
Fixes https://github.com/llvm/llvm-project/issues/136522.
Commit: c26e7520a939556bd23f7db3b7e0f4530b9d94a8
https://github.com/llvm/llvm-project/commit/c26e7520a939556bd23f7db3b7e0f4530b9d94a8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
A flang/test/Preprocessing/func-on-command-line.F90
Log Message:
-----------
[flang] Support -D for function-like macros (#139812)
Handle a command-line function-like macro definition like
"-Dfoo(a)=...".
TODO: error reporting for badly formed argument lists.
Commit: b7e13ab42929562d0fa78b623562341ef78617b4
https://github.com/llvm/llvm-project/commit/b7e13ab42929562d0fa78b623562341ef78617b4
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/docs/ModFiles.md
Log Message:
-----------
[flang][docs] Document technique for regenerating a module hermetically (#139975)
A flang-new module file is Fortran source, so it can be recompiled with
the `-fhermetic-module-files` option to convert it into a hermetic one.
Commit: 5c551cbe462ea1b22bfe7e42e248ca29ea5c334c
https://github.com/llvm/llvm-project/commit/5c551cbe462ea1b22bfe7e42e248ca29ea5c334c
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[NFC] Fix warning formatting for AMDGPUUsage.rst
Commit: 2661e995ceebd6fd083e5b62aeff21e67b28e9a4
https://github.com/llvm/llvm-project/commit/2661e995ceebd6fd083e5b62aeff21e67b28e9a4
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
M llvm/unittests/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[llvm] Ensure propagated constants in the vtable are aligned (#136630)
It's possible for virtual constant propagation in whole program
devirtualization to create unaligned loads. We originally saw this with
4-byte aligned relative vtables where we could store 8-byte values
before/after the vtable. But since the vtable is 4-byte aligned and we
unconditionally do an 8-byte load, we can't guarantee that the stored
constant will always be aligned to 8 bytes. We can also see this with
normal vtables whenever a 1-byte char is stored in the vtable because
the offset calculation for the GEP doesn't take into account the
original vtable alignment.
This patch introduces two changes to virtual constant propagation:
1. Do not propagate constants whose preferred alignment is larger than
the vtable alignment. This is required because if the constants are
stored in the vtable, we can only guarantee the constant will be stored
at an address at most aligned to the vtable's alignment.
2. Round up the offset used in the GEP before the load to ensure it's at
an address suitably aligned such that we can load from it.
This patch updates tests to reflect this alignment change and adds some
cases for relative vtables.
Commit: 18ecff4f65067adfd9fcd721d93bb29b646e4756
https://github.com/llvm/llvm-project/commit/18ecff4f65067adfd9fcd721d93bb29b646e4756
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CGData/StableFunctionMapRecord.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[llvm] Use llvm::stable_sort (NFC) (#140067)
Commit: 6033a4859a0131062bef4eb765b438e6110b40a2
https://github.com/llvm/llvm-project/commit/6033a4859a0131062bef4eb765b438e6110b40a2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
Log Message:
-----------
[CodeGen] Use std::tie to implement a comparison functor (NFC) (#140088)
std::tie simplifies the lexicographical comparison while making the
code a little more consistent within MIRPrinter.cpp as we have a very
similar comparison functor in MIRPrinter::convertCalledGlobals, about
30 lines below the code this patch touches.
Commit: f9dbfb1566043d744d66ff8b5415269c6ec59743
https://github.com/llvm/llvm-project/commit/f9dbfb1566043d744d66ff8b5415269c6ec59743
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M flang/test/Lower/OpenACC/acc-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-data.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-exit-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-exit-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M flang/test/Lower/OpenACC/acc-update.f90
M flang/test/Lower/OpenACC/acc-wait.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Conversion/OpenACCToSCF/convert-openacc-to-scf.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[flang][acc] Update assembly formats to include asyncOnly, async, and wait (#140122)
The async implementation is inconsistent in terms of the assembly
format. While renaming `UpdateOp`'s `async` to `asyncOnly`, this PR
handles `asyncOnly` along with async operands in every operation.
Regarding `EnterDataOp` and `ExitDataOp`, they do not accept device
types; thus, the async and the wait clauses without values lead to the
`async` and the `wait` attributes (not `asyncOnly` nor `waitOnly`). This
PR also processes them with async and wait operands all together.
Commit: a6ddfb387df7866afc8ac0f7e9d517cd37345e61
https://github.com/llvm/llvm-project/commit/a6ddfb387df7866afc8ac0f7e9d517cd37345e61
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/DeclCXX.cpp
Log Message:
-----------
[NFC][Clang] Adopt simplified `getTrailingObjects` in DeclCXX (#140078)
- Adopt non-templated and ArrayRef returning forms of
`getTrailingObjects`.
- Replace some initialization loop with std::uninitialized_fill_n.
- Remove unneeded `numTrailingObjects` for last trailing type.
Commit: 6c405694d134f708c064df37bf4ac79a84374c58
https://github.com/llvm/llvm-project/commit/6c405694d134f708c064df37bf4ac79a84374c58
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Get type from start value for VPWidenIntOrFpInduction (NFC).
NFC for now but this can cause verification failures in the future,
since after bf5627c85e697 wide induction may be narrowed. By using the
type from the start value, we will always return the correct type.
Commit: acdba28e148ac1e94d6c041f9911230e1e90e9cd
https://github.com/llvm/llvm-project/commit/acdba28e148ac1e94d6c041f9911230e1e90e9cd
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.h
M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision-1.ll
Log Message:
-----------
[DirectX] Set whole-module flags prior to evaluating per-function flags (#139967)
Fixes #139024 and #139954
- Refactor DXILShaderFlags to compute the flags that apply to a whole
module before computing flags that apply individually to each function
- Make DXILResourceMap const, since it is not modified in
DXILShaderFlags
- Per-function shader flag analysis now initially starts with the set of
flags that apply to the whole module instead of starting from no flags.
This change fixes the above linked issues
- Fix shader flag tests affected by the above change
Commit: 090f46d8d246762401c41c5486dde299382d6c90
https://github.com/llvm/llvm-project/commit/090f46d8d246762401c41c5486dde299382d6c90
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
Log Message:
-----------
[Clang] Fix an assertion in the resolution of perfect matches (#140073)
Function pointers can have an identity conversion to a pointer to member
function if they are resolved to a member function.
Fix a regression introduced by #136203
Commit: efae492ad1ba80764ec4a85f5622a8713646f970
https://github.com/llvm/llvm-project/commit/efae492ad1ba80764ec4a85f5622a8713646f970
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlan] Add VPTypeAnalysis constructor taking a VPlan (NFC).
Add constructor that retrieves the scalar type from the trip count
expression, if no canonical IV is available. Used in the verifier, in
preparation for late verification, when the canonical IV has been
dissolved.
Commit: 4f663cca15f2b53c2bc6a84d1b1f5bd81679356d
https://github.com/llvm/llvm-project/commit/4f663cca15f2b53c2bc6a84d1b1f5bd81679356d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
Log Message:
-----------
[LoopPeel] Make sure PeelLast is always initialized.
Make sure PeelLast is initialized on all paths.
Should fix MSan bootstrap failures
https://lab.llvm.org/buildbot/#/builders/164/builds/9992
https://lab.llvm.org/buildbot/#/builders/94/builds/7158
Fixup after https://github.com/llvm/llvm-project/pull/139551.
Commit: fc7857ca95bba93807959ad09f983221db8811e1
https://github.com/llvm/llvm-project/commit/fc7857ca95bba93807959ad09f983221db8811e1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
A clang/include/clang/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.h
A clang/include/clang/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.cpp
A clang/lib/CIR/Dialect/OpenACC/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.cpp
A clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/PointerLikeTest.cpp
M clang/unittests/CMakeLists.txt
Log Message:
-----------
[CIR] Add PointerLikeType interface support for cir::PointerType (#139768)
This adds code to attach the OpenACC PointerLikeType interface to
cir::PointerType, along with a unit test for the interface.
Commit: 2e6433b8293ac64923c737078e87dc39fc4bced6
https://github.com/llvm/llvm-project/commit/2e6433b8293ac64923c737078e87dc39fc4bced6
Author: Steven Perron <stevenperron at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
A clang/test/CodeGenHLSL/convergence/global_array.hlsl
Log Message:
-----------
[clang] Emit convergence tokens for loop in global array init (#140120)
When initializing a global array, a loop is generated, but no
convergence is emitted for the loop. This fixes that up.
Commit: a4eb0db062b646907a2c19d54f8240fe4bdd98ce
https://github.com/llvm/llvm-project/commit/a4eb0db062b646907a2c19d54f8240fe4bdd98ce
Author: Finn Plummer <canadienfinn at gmail.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/RootSignature.hlsl
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
Log Message:
-----------
[HLSL][RootSignature] Add metadata generation for descriptor tables (#139633)
- prereq: Modify `RootSignatureAttr` to hold a reference to the owned
declaration
- Define and implement `MetadataBuilder` in `HLSLRootSignature`
- Integrate and invoke the builder in `CGHLSLRuntime.cpp` to generate
the Root Signature for any associated entry functions
- Add tests to demonstrate functionality in `RootSignature.hlsl`
Resolves https://github.com/llvm/llvm-project/issues/126584
Note: this is essentially just
https://github.com/llvm/llvm-project/pull/125131 rebased onto the new
approach of constructing a root signature decl, instead of holding the
elements in `AdditionalMembers`.
Commit: f01f08292e894a565baa1b2741b31fbcf53a18cb
https://github.com/llvm/llvm-project/commit/f01f08292e894a565baa1b2741b31fbcf53a18cb
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
R llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
Log Message:
-----------
AMDGPU: Make v2f32 -> v2f16 legal when target supports v_cvt_pk_f16_f32 (#139956)
If targets support v_cvt_pk_f16_f32 instruction, v2f32 -> v2f16 should
be legal. However, SelectionDAG does not allow us to specify the source
type in the legalization rules. To workaround this, we make FP_ROUND
Custom for v2f16 then set up v2f32 -> v2f16 to be legal during custom
lowering.
Fixes: SWDEV-532608 -- expected v_cvt_pk_f16_f32 was not generated.
Commit: a3c4a5cb63df01ae63ae0a8c3e4c3e1fdbc3b70c
https://github.com/llvm/llvm-project/commit/a3c4a5cb63df01ae63ae0a8c3e4c3e1fdbc3b70c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M llvm/docs/MLGO.rst
Log Message:
-----------
[MLGO][Docs] Add documentation on corpus tooling (#139362)
This adds some documentation on the three corpus tools, some examples,
and fixes the TODO telling me to get this done.
Commit: 1833e09c08360264e93a739d7e7594cc5034a0a1
https://github.com/llvm/llvm-project/commit/1833e09c08360264e93a739d7e7594cc5034a0a1
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-05-15 (Thu, 15 May 2025)
Changed paths:
M bolt/test/X86/callcont-fallthru.s
M bolt/test/X86/heatmap-preagg.test
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTDiagnostic.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/arm_neon.td
A clang/include/clang/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.h
A clang/include/clang/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.h
M clang/include/clang/Frontend/CommandLineSourceLoc.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.cpp
A clang/lib/CIR/Dialect/OpenACC/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/__clang_hip_cmath.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
A clang/test/Analysis/ftime-trace-no-init.cpp
A clang/test/CodeCompletion/source-loc-zero.cpp
M clang/test/CodeGen/AArch64/fp8-init-list.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
A clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
A clang/test/CodeGenHLSL/RootSignature.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
A clang/test/CodeGenHLSL/convergence/global_array.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M clang/test/Driver/fsanitize.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-arch.c
A clang/test/Headers/__clang_hip_cmath-return_types.hip
A clang/test/Modules/pr130712.cppm
A clang/test/OpenMP/openmp_non_c_directives.c
R clang/test/OpenMP/openmp_workshare.c
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Refactor/source-loc-zero.cpp
M clang/test/Sema/atomic-expr.c
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
A clang/test/SemaCXX/warn-implicit-unicode-conversions.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
A clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/PointerLikeTest.cpp
M clang/unittests/CMakeLists.txt
M clang/utils/TableGen/NeonEmitter.cpp
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/aarch64/chkstk.S
M compiler-rt/lib/builtins/aarch64/lse.S
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
M compiler-rt/lib/builtins/clear_cache.c
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64.h
M compiler-rt/lib/builtins/fp_compare_impl.inc
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/builtins/udivmodti4.c
M compiler-rt/test/builtins/Unit/enable_execute_stack_test.c
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
M flang-rt/lib/runtime/assign.cpp
M flang/docs/ModFiles.md
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenACC/acc-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-data.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-exit-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-exit-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M flang/test/Lower/OpenACC/acc-update.f90
M flang/test/Lower/OpenACC/acc-wait.f90
M flang/test/Lower/OpenMP/target.f90
A flang/test/Preprocessing/func-on-command-line.F90
A flang/test/Semantics/pad-hollerith-arg.f
M libcxx/docs/CodingGuidelines.rst
M libcxx/docs/DesignDocs/FileTimeType.rst
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__format/format_functions.h
M libcxx/include/__fwd/pair.h
M libcxx/include/__memory/uses_allocator_construction.h
M libcxx/include/__node_handle
M libcxx/include/__tree
M libcxx/include/map
M libcxx/include/print
M libcxx/src/.clang-tidy
M libcxx/test/benchmarks/format/format.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/libcxx/clang_tidy.sh.py
M libcxx/test/libcxx/containers/associative/tree_key_value_traits.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/localization/codecvt_unicode.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp
M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp
M libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char8_t/assign2.pass.cpp
M libcxx/utils/ci/run-buildbot
M libcxx/utils/gdb/libcxx/printers.py
M libcxx/utils/libcxx/test/features.py
M lld/COFF/COFFLinkerContext.h
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
M lld/test/COFF/arm64ec-entry-mangle.test
M lld/test/COFF/arm64ec-hybmp.s
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-patchable-thunks.test
M lld/test/COFF/arm64ec-range-thunks.s
M lld/test/COFF/arm64ec.test
M lld/test/COFF/arm64x-altnames.s
M lld/test/COFF/arm64x-buildid.s
M lld/test/COFF/arm64x-comm.s
M lld/test/COFF/arm64x-crt-sec.s
M lld/test/COFF/arm64x-ctors-sec.s
M lld/test/COFF/arm64x-guardcf.s
M lld/test/COFF/arm64x-import.test
A lld/test/COFF/arm64x-sameaddress.test
M lld/test/COFF/arm64x-symtab.s
M lld/test/COFF/arm64x-wrap.s
M lld/test/COFF/autoimport-arm64ec-data.test
M lldb/include/lldb/Core/Address.h
M lldb/source/Core/Address.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/test/Shell/Unwind/Inputs/basic-block-sections-with-dwarf.s
M lldb/test/Shell/Unwind/basic-block-sections-with-dwarf-static.test
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/DAPTest.cpp
A lldb/unittests/DAP/Handler/DisconnectTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
A lldb/unittests/DAP/TestBase.cpp
A lldb/unittests/DAP/TestBase.h
M lldb/unittests/DAP/TransportTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/MLGO.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
A llvm/include/llvm/IR/IntrinsicsRISCVXAndes.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/Support/ConvertUTF.h
M llvm/include/llvm/Support/FileOutputBuffer.h
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/Utils/LoopPeel.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CGData/StableFunctionMapRecord.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/FileOutputBuffer.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.h
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
A llvm/lib/Target/RISCV/RISCVInstrInfoQ.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
M llvm/test/CodeGen/AArch64/arm64-arith-saturating.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/fix-shuffle-vector-be-rev.ll
M llvm/test/CodeGen/AArch64/fp16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-bitcast.ll
M llvm/test/CodeGen/AArch64/neon-insert-sve-elt.ll
M llvm/test/CodeGen/AArch64/neon-insextbitcast.ll
A llvm/test/CodeGen/AArch64/nofpclass.ll
M llvm/test/CodeGen/AArch64/reserveXreg.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/CodeGen/AArch64/vector-fcvt.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
R llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-all-indirect-accesses.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
A llvm/test/CodeGen/ARM/nofpclass.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision-1.ll
A llvm/test/CodeGen/Mips/nofpclass.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/shift-opt.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
M llvm/test/CodeGen/RISCV/zdinx-memoperand.ll
A llvm/test/CodeGen/RISCV/zdinx-spill.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
M llvm/test/CodeGen/X86/avg-mask.ll
M llvm/test/CodeGen/X86/avgfloors.ll
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
A llvm/test/CodeGen/X86/nofpclass.ll
M llvm/test/CodeGen/X86/pr63108.ll
A llvm/test/MC/RISCV/rv32q-invalid.s
A llvm/test/MC/RISCV/rv64q-invalid.s
A llvm/test/MC/RISCV/rv64q-valid.s
A llvm/test/MC/RISCV/rv64zfa-only-valid.s
A llvm/test/MC/RISCV/rvq-aliases-valid.s
A llvm/test/MC/RISCV/rvq-pseudos.s
A llvm/test/MC/RISCV/rvq-valid.s
A llvm/test/MC/RISCV/xandesvdot-valid.s
M llvm/test/MC/RISCV/zfa-invalid.s
A llvm/test/MC/RISCV/zfa-quad-invalid.s
M llvm/test/MC/RISCV/zfa-valid.s
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
A llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-reuse.ll
A llvm/test/Transforms/ForcedFunctionAttrs/open-file-error.ll
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-pointer-distance.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/ADT/BitmaskEnumTest.cpp
M llvm/unittests/Support/FileOutputBufferTest.cpp
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/IR/QuantOps.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/ExecutionEngine/JitRunner.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/OpenACCToSCF/convert-openacc-to-scf.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
R mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-entry-point.mlir
R offload/test/offloading/gpupgo/pgo1.c
R offload/test/offloading/gpupgo/pgo2.c
A offload/test/offloading/gpupgo/pgo_atomic_teams.c
A offload/test/offloading/gpupgo/pgo_atomic_threads.c
A offload/test/offloading/gpupgo/pgo_device_and_host.c
A offload/test/offloading/gpupgo/pgo_device_only.c
M openmp/runtime/test/ompt/callback.h
M third-party/unittest/googletest/README.LLVM
M third-party/unittest/googletest/include/gtest/gtest-printers.h
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
fix test
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/0bc316a2bcab...1833e09c0836
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