[all-commits] [llvm/llvm-project] dc9171: [RISCV] Add isel patterns for generating Xqcibi br...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc9171afc481f28865fc19ba7bc88c6596bb86e9
      https://github.com/llvm/llvm-project/commit/dc9171afc481f28865fc19ba7bc88c6596bb86e9
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    A llvm/test/CodeGen/RISCV/xqcibi.ll

  Log Message:
  -----------
  [RISCV] Add isel patterns for generating Xqcibi branch instructions (#139872)

Add ISEL patterns for generating the Xqcibi branch immediate
instructions. Similar to #135771 adds new CondCodes for the various
branch instructions and uses them to return the appropriate instruction.



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