[all-commits] [llvm/llvm-project] 4e63e0: [AMDGPU] Canonicalize G_ZEXT of the shift amount i...

[Pierre van Houtryve via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e63e0457cc1f768c628e71a0786fdb8a6ec271e
      https://github.com/llvm/llvm-project/commit/4e63e0457cc1f768c628e71a0786fdb8a6ec271e
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-amount-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll

  Log Message:
  -----------
  [AMDGPU] Canonicalize G_ZEXT of the shift amount in RegBankCombiner (#131792)

Canonicalize it to a G_AND instead so that ISel patterns can pick it
up and ignore it, as the shift instructions only read low bits.
G_ZEXT would be lowered to a v/s_and anyway in most cases.

I'm also looking at making a DAG version of this in a separate patch.



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