[all-commits] [llvm/llvm-project] a1e1a8: [NVPTX] Vectorize and lower 256-bit global loads/s...

[Drew Kersnar via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a1e1a84d2c8bb627945cda2a991539d39b034269
      https://github.com/llvm/llvm-project/commit/a1e1a84d2c8bb627945cda2a991539d39b034269
  Author: Drew Kersnar <dkersnar at nvidia.com>
  Date:   2025-05-13 (Tue, 13 May 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
    M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
    M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
    A llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
    A llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
    A llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
    A llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
    A llvm/test/Transforms/LoadStoreVectorizer/NVPTX/load-store-256-bit.ll

  Log Message:
  -----------
  [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (#139292)

PTX 8.8+ introduces 256-bit-wide vector loads/stores under certain
conditions. This change extends the backend to lower these loads/stores.
It also overrides getLoadStoreVecRegBitWidth for NVPTX, allowing the
LoadStoreVectorizer to create these wider vector operations.

See the spec for the three relevant PTX instructions here:
- https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-ld
- https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-ld-global-nc
- https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-st



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