[all-commits] [llvm/llvm-project] 382ad6: [GISel][AArch64] Added more efficient lowering of ...

jyli0116 via All-commits all-commits at lists.llvm.org
Tue May 13 03:22:12 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 382ad6f2e7050c4134300fbbe275bdbc1ff5442c
      https://github.com/llvm/llvm-project/commit/382ad6f2e7050c4134300fbbe275bdbc1ff5442c
  Author: jyli0116 <yu.li at arm.com>
  Date:   2025-05-13 (Tue, 13 May 2025)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
    M llvm/test/CodeGen/AArch64/bitreverse.ll

  Log Message:
  -----------
  [GISel][AArch64] Added more efficient lowering of Bitreverse (#139233)

GlobalISel was previously inefficient in handling bitreverses of vector
types. This deals with i16, i32, i64 vector types and converts them into
i8 bitreverses and rev instructions.



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