[all-commits] [llvm/llvm-project] 31b4c3: [𝘀𝗽𝗿] initial version

[Vitaly Buka via All-commits]

  Branch: refs/heads/users/vitalybuka/spr/revert-amdgpuscheduler-refactor-archvgpr-rematerialization-during-scheduling-125885
  Home:   https://github.com/llvm/llvm-project
  Commit: 31b4c3dfc5786b55e8c2a0615f7904698e83b94b
      https://github.com/llvm/llvm-project/commit/31b4c3dfc5786b55e8c2a0615f7904698e83b94b
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-05-09 (Fri, 09 May 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
    M llvm/lib/CodeGen/MachineRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.h
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    R llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
    M llvm/test/CodeGen/AMDGPU/mfma-loop.ll

  Log Message:
  -----------
  [𝘀𝗽𝗿] initial version

Created using spr 1.3.4



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