[all-commits] [llvm/llvm-project] 2b1409: [CodeGen] Parse nusw flag (#138856)
Kareem Ergawy via All-commits
all-commits at lists.llvm.org
Fri May 9 07:29:32 PDT 2025
Branch: refs/heads/users/ergawy/handle_users_with_repeated_args
Home: https://github.com/llvm/llvm-project
Commit: 2b140932880db4d7a220b1b76eff4eec15066c58
https://github.com/llvm/llvm-project/commit/2b140932880db4d7a220b1b76eff4eec15066c58
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
Log Message:
-----------
[CodeGen] Parse nusw flag (#138856)
Fixes #127781
Commit: 2668167e2cf935528f7d93cb3b12a651a29e52f6
https://github.com/llvm/llvm-project/commit/2668167e2cf935528f7d93cb3b12a651a29e52f6
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
Log Message:
-----------
[lldb] Disable some lldb-dap tests on Windows
Since https://github.com/llvm/llvm-project/pull/138981 / https://github.com/llvm/llvm-project/commit/aeeb9a3c09f40f42a1e8e5e3c8dbde3b260744bd
were landed and tests re-enabled, these tests have been failing
on our Windows on Arm bot:
https://lab.llvm.org/buildbot/#/builders/141/builds/8523
********************
Unresolved Tests (1):
lldb-api :: tools/lldb-dap/send-event/TestDAP_sendEvent.py
********************
Failed Tests (2):
lldb-api :: tools/lldb-dap/launch/TestDAP_launch.py
lldb-api :: tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
Commit: 2a32d738bb213a8a1e814b65beb61e39b7c66834
https://github.com/llvm/llvm-project/commit/2a32d738bb213a8a1e814b65beb61e39b7c66834
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/sections-predetermined-private.f90
Log Message:
-----------
[flang][OpenMP] fix predetermined privatization inside section (#138159)
This now produces code equivalent to if there was an explicit private
clause on the SECTIONS construct.
The problem was that each SECTION construct got its own DSP, which tried
to privatize the same symbol for that SECTION. Privatization for
SECTION(S) happens on the outer SECTION construct and so the outer
construct's DSP should be shared.
Fixes #135108
Commit: 18f89283ebac87a153708b8fe00056f96b83022a
https://github.com/llvm/llvm-project/commit/18f89283ebac87a153708b8fe00056f96b83022a
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix mul folder conformance to the spec (#137601)
Change the folder for mul with a shift such that the rounding happens
correctly according to the spec
pesudo-code.
Fixes:
https://discourse.llvm.org/t/tosa-mul-i32-shift-incorrect-result/86040
Partial cherry-pick from:
https://github.com/llvm/llvm-project/pull/128059
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: fc2ec06ccab498447914c076f1e7b4326dc321c2
https://github.com/llvm/llvm-project/commit/fc2ec06ccab498447914c076f1e7b4326dc321c2
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/DebugInfo/KeyInstructions/X86/parse.mir
Log Message:
-----------
[KeyInstr] Add MIR parser support (#133494)
RFC: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: a3f58f3c84901afe296718863aceca45e7a8a86a
https://github.com/llvm/llvm-project/commit/a3f58f3c84901afe296718863aceca45e7a8a86a
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
Log Message:
-----------
[NFC][DebugInfo] Expand coverage of a RISCV test
This is a pre-commit for a patch (#134677) -- the test behaviour is not
being changed, instead I've added "-v" to the llvm-dwarfdump commandline
for --debug-line. This prints out how the linetable is encoded, not just
what the linetable means, and it's important to illustrate that in the
upcoming patch. I've separated out the llvm-dwarfdump line for .debug_info
so that it's not affected by adding -v.
Commit: 2a88feb3947606679453f886d79db611cdaef9fc
https://github.com/llvm/llvm-project/commit/2a88feb3947606679453f886d79db611cdaef9fc
Author: Georgios Pinitas <georgios.pinitas at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Canonicalize slice over overlapped or inside a pad. (#138900)
Update the paddings and/or the slice parameters when a `tosa.slice`
after a `tosa.pad` is accessing only an overlapping or not region of the
padded tensor.
Signed-off-by: Georgios Pinitas <georgios.pinitas at arm.com>
Commit: 160abfb5e623a67014de311a6b50f12e4104f7c9
https://github.com/llvm/llvm-project/commit/160abfb5e623a67014de311a6b50f12e4104f7c9
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Add ISel for bfloat scalable vector compares. (#138707)
Commit: a385c47a59e64ce54eb7257f4ec161fa4e112c16
https://github.com/llvm/llvm-project/commit/a385c47a59e64ce54eb7257f4ec161fa4e112c16
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-cancel-distribute-parallel-loop.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] convert wsloop cancellation to LLVMIR (#137194)
Taskloop support will follow in a later patch.
Commit: 8338a3c92ba08cf409a75adbfb212aa06ca66f31
https://github.com/llvm/llvm-project/commit/8338a3c92ba08cf409a75adbfb212aa06ca66f31
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Convert omp.cancellation_point to LLVMIR (#137205)
This is basically identical to cancel except without the if clause.
taskgroup will be implemented in a followup PR.
Commit: 127f48668b719798770c36a20288ef5230669f42
https://github.com/llvm/llvm-project/commit/127f48668b719798770c36a20288ef5230669f42
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
Log Message:
-----------
[LV] Add test showing incorrect metadata merging when narrowing IGs.
Add test showing that incorrect tbaa metadata is added to the widened
loads and stores when narrowing interleave groups.
The widened loads/stores currently have the TBAA metadata of the first
load/store, even though the wide accesses also access data with types of
the second load/store.
Commit: ce7c1963b914931817dd983f488cc0b810187b3a
https://github.com/llvm/llvm-project/commit/ce7c1963b914931817dd983f488cc0b810187b3a
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/test/Lexer/char8_t.cpp
Log Message:
-----------
[Clang] Ignore -fchar8_t in C (#138716)
In C, `char8_t` is an alias to unsigned char, and should never be a
keyword.
Fixes #55373
Commit: e40200901cf1af860db9ded5c03b7b104396e429
https://github.com/llvm/llvm-project/commit/e40200901cf1af860db9ded5c03b7b104396e429
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/docs/OpenMPSupport.md
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] cancel(lation point) taskgroup LLVMIR (#137841)
A cancel or cancellation point for taskgroup is always nested inside of
a task inside of the taskgroup. For the task which is cancelled, it is
that task which needs to be cleaned up: not the owning taskgroup.
Therefore the cancellation branch handler is done in the conversion of
the task not in conversion of taskgroup.
I added a firstprivate clause to the test for cancel taskgroup to
demonstrate that the block being branched to is the same block where
mandatory cleanup code is added. Cancellation point follows exactly the
same code path.
Commit: 358ebddeb836d1c0ac665a8a2faa2e07fd89da63
https://github.com/llvm/llvm-project/commit/358ebddeb836d1c0ac665a8a2faa2e07fd89da63
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/unittests/ADT/DenseMapTest.cpp
Log Message:
-----------
[DenseMap] Introduce lookup_or (#138887)
Introduce lookup_or, a variant of lookup, for non-default-constructible
values.
Commit: 4eebc8d003f25adf52a75702d6ee24f69330d920
https://github.com/llvm/llvm-project/commit/4eebc8d003f25adf52a75702d6ee24f69330d920
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Mark various matchers const (NFC) (#138834)
Mark matchers const and remove an extraneous template parameter in
SCEVPatternMatch. Since SCEVPatternMatch is intertwined with
PatternMatch, also fix constness issues there.
Commit: 20169cb4ac328be419033eda26555d2d79898b84
https://github.com/llvm/llvm-project/commit/20169cb4ac328be419033eda26555d2d79898b84
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/unittests/ADT/DenseMapTest.cpp
Log Message:
-----------
[DenseMap] Introduce emplace_or_assign (#138886)
Introduce emplace_or_assign, a variant of insert_or_assign that has
slightly better characteristics.
Commit: b3ef15aa00c94aa937cb40cd7f9483140c62514d
https://github.com/llvm/llvm-project/commit/b3ef15aa00c94aa937cb40cd7f9483140c62514d
Author: Kirill Radkin <116365474+kr-sc at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/CodeGen/RISCV/riscv-v-debuginfo.c
Log Message:
-----------
[RISCV] Fix generation of DWARF info for vector segmented types (#137941)
In DWARF info RISC-V Vector types are presented as DW_TAG_array_type
with tags DW_AT_type (what elements does this array consist of) and
DW_TAG_subrange_type. DW_TAG_subrange_type have DW_AT_upper_bound tag
which contain upper bound value for this array.
For now, it's generate same DWARF info about length of segmented types
and their corresponding non-tuple types.
For example, vint32m4x2_t and vint32m4_t have DW_TAG_array_type with
same DW_AT_type and DW_TAG_subrange_type, it means that this types have
same length, which is not correct
(vint32m4x2_t length is twice as big as vint32m4_t)
Commit: 356bd2c9605761121b49f318a187560ec306718e
https://github.com/llvm/llvm-project/commit/356bd2c9605761121b49f318a187560ec306718e
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Allow unsigned types for rescale ops during validation (#138253)
This commit allows unsigned types (ui8/ui16/ui32) when checking for
valid element types, only for rescale operators.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: cedeef6707fc702ed4ba197b3c841edbc688c78e
https://github.com/llvm/llvm-project/commit/cedeef6707fc702ed4ba197b3c841edbc688c78e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[LSR] Replace casts with an equivalent std::as_const (NFC) (#138980)
The casts / `std::as_const` are used here to select `const` overload of
`begin()`/`end()` so that the type of the returned iterator matches the
type of `J`, which is `const_iterator`.
Commit: 92cc31b0f7737408dffd38c2384dff825abb8e3a
https://github.com/llvm/llvm-project/commit/92cc31b0f7737408dffd38c2384dff825abb8e3a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.h
A llvm/lib/Target/ARC/ARCSelectionDAGInfo.cpp
A llvm/lib/Target/ARC/ARCSelectionDAGInfo.h
M llvm/lib/Target/ARC/ARCSubtarget.cpp
M llvm/lib/Target/ARC/ARCSubtarget.h
M llvm/lib/Target/ARC/CMakeLists.txt
M llvm/lib/Target/CSKY/CMakeLists.txt
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.h
A llvm/lib/Target/CSKY/CSKYSelectionDAGInfo.cpp
A llvm/lib/Target/CSKY/CSKYSelectionDAGInfo.h
M llvm/lib/Target/CSKY/CSKYSubtarget.cpp
M llvm/lib/Target/CSKY/CSKYSubtarget.h
M llvm/lib/Target/Lanai/CMakeLists.txt
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.h
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h
Log Message:
-----------
[ARC][CSKY][Lanai] TableGen-erate SDNode descriptions (#138874)
This consolidates node definitions into one place and enables automatic
node verification.
Part of #119709.
Commit: d9bdc2d6a2d3efcce81ecab151b393f19a81696b
https://github.com/llvm/llvm-project/commit/d9bdc2d6a2d3efcce81ecab151b393f19a81696b
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU][Disassembler][NFCI] Always defer immediate operands. (#138885)
Removes the need to parameterise decoders with OperandSemantics,
ImmWidth and MandatoryLiteral.
Likely allows further simplification of handling _DEFERRED immediates.
Tested to work downstream.
Commit: 1484f82cbc62eab9c4c8f393b84c2f521bf882f6
https://github.com/llvm/llvm-project/commit/1484f82cbc62eab9c4c8f393b84c2f521bf882f6
Author: Luke Lau <luke at igalia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
Log Message:
-----------
[VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (#129508)
Split off from #118638, this adds VPInstruction::StepVector, which
generates integer step vectors (0,1,2,...,VF). This is a step towards
eventually modelling all the separate parts of
VPWidenIntOrFpInductionRecipe in VPlan.
This is then used by VPWidenIntOrFpInductionRecipe, where we materialize
it just before unrolling so the operands stay in a fixed position.
The need for a separate operand in VPWidenIntOrFpInductionRecipe, as
well as the need to update it in
optimizeVectorInductionWidthForTCAndVFUF, should be removed with #118638
when everything is expanded in convertToConcreteRecipes.
Commit: c4f723a7c3bb12ce4e247bcaed755c8d927f73a4
https://github.com/llvm/llvm-project/commit/c4f723a7c3bb12ce4e247bcaed755c8d927f73a4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/pr125278.ll
Log Message:
-----------
[LV] Strip unmaintainable MinBWs assert (#136858)
tryToWiden attempts to replace an Instruction with a Constant from SCEV,
but forgets to erase the Instruction from the MinBWs map, leading to an
assert in VPlanTransforms::truncateToMinimalBitwidths. Going forward,
the assertion in truncateToMinimalBitwidths is unmaintainable, as LV
could simplify the expression at any point: fix the bug by stripping the
unmaintable assertion.
Fixes #125278.
Commit: 067caaafb58a156d0d77229422607782a639f5b5
https://github.com/llvm/llvm-project/commit/067caaafb58a156d0d77229422607782a639f5b5
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
Log Message:
-----------
[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#125885)
AMDGPU scheduler's `PreRARematStage` attempts to increase function
occupancy w.r.t. ArchVGPR usage by rematerializing trivial
ArchVGPR-defining instruction next to their single use. It first
collects all eligible trivially rematerializable instructions in the
function, then sinks them one-by-one while recomputing occupancy in all
affected regions each time to determine if and when it has managed to
increase overall occupancy. If it does, changes are committed to the
scheduler's state; otherwise modifications to the IR are reverted and
the scheduling stage gives up.
In both cases, this scheduling stage currently involves repeated queries
for up-to-date occupancy estimates and some state copying to enable
reversal of sinking decisions when occupancy is revealed not to
increase. The current implementation also does not accurately track
register pressure changes in all regions affected by sinking decisions.
This commit refactors this scheduling stage, improving RP tracking and
splitting the stage into two distinct steps to avoid repeated occupancy
queries and IR/state rollbacks.
- Analysis and collection (`canIncreaseOccupancyOrReduceSpill`). The
number of ArchVGPRs to save to reduce spilling or increase function
occupancy by 1 (when there is no spilling) is computed. Then,
instructions eligible for rematerialization are collected, stopping as
soon as enough have been identified to be able to achieve our goal
(according to slightly optimistic heuristics). If there aren't enough of
such instructions, the scheduling stage stops here.
- Rematerialization (`rematerialize`). Instructions collected in the
first step are rematerialized one-by-one. Now we are able to directly
update the scheduler's state since we have already done the occupancy
analysis and know we won't have to rollback any state. Register
pressures for impacted regions are recomputed only once, as opposed to
at every sinking decision.
In the case where the stage attempted to increase occupancy, and if both
rematerializations alone and rescheduling after were unable to improve
occupancy, then all rematerializations are rollbacked.
Commit: 5f1c55690969046676c049884d8411dde512c909
https://github.com/llvm/llvm-project/commit/5f1c55690969046676c049884d8411dde512c909
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir
Log Message:
-----------
[RISCV][test] Precommit test for #137973 simplifyInstruction support
Commit: 0d47a4548c17b320e02e33a1e250792626652e59
https://github.com/llvm/llvm-project/commit/0d47a4548c17b320e02e33a1e250792626652e59
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/include/lldb/DataFormatters/FormattersHelpers.h
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxTuple.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppTuple.cpp
M lldb/source/Plugins/Language/ObjC/NSArray.cpp
M lldb/source/Plugins/Language/ObjC/NSDictionary.cpp
M lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp
M lldb/source/Plugins/Language/ObjC/NSSet.cpp
Log Message:
-----------
[lldb][DataFormatters] Change ExtractIndexFromString to return std::optional (#138297)
This PR is in continuation of
https://github.com/llvm/llvm-project/pull/136693.
Commit: 534d221b63bb52f64e1f3ad3c40cfb87323d28ec
https://github.com/llvm/llvm-project/commit/534d221b63bb52f64e1f3ad3c40cfb87323d28ec
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-lowering-diags.ll
Log Message:
-----------
(reland) [GlobalISel] Diagnose inline assembly constraint lowering errors (#139049)
The initial patch (#135782 caused issues because it emits an error, and llc is sensitive to it.
It also caused compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp to fail.
Use warnings instead + reject lowering. That way, the fallback path is used without llc/clang returning a failure code.
If fallback isn't enabled then the warnings provide context as to why lowering failed.
Original commit description for #135782:
Instead of printing something to dbgs (which is not visible to all users),
emit a diagnostic like the DAG does. We still crash later because we fail to
select the inline assembly, but at least now users will know why it's crashing.
In a future patch we could also recover from the error like the DAG does, so the
lowering can keep going until it either crashes or gives a different error later.
Commit: 245def9def7b025644a8cf991ba24c53a50822c6
https://github.com/llvm/llvm-project/commit/245def9def7b025644a8cf991ba24c53a50822c6
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[Clang][NFC] Put potentially expensive check behind NDEBUG
Commit: 52b345d036677e6377ea5e2022a1b6bd403ed91e
https://github.com/llvm/llvm-project/commit/52b345d036677e6377ea5e2022a1b6bd403ed91e
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir
Log Message:
-----------
[RISCV][TII] Add and use new hook to simplify/canonicalize instructions after MachineCopyPropagation (#137973)
PR #136875 was posted as a draft PR that handled a subset of these
cases, using the CompressPat mechanism. The consensus from that
discussion (and a conclusion I agree with) is that it would be
beneficial doing this optimisation earlier on, and in a way that isn't
limited just to cases that can be handled by instruction compression.
The most common source for instructions that can be
optimized/canonicalized in this way is through tail duplication in
MachineBlockPlacement followed by machine copy propagation. For RISC-V,
choosing a more canonical instruction allows it to be compressed when it
couldn't be before. There is the potential that it would make other
MI-level optimisations easier.
This modifies ~910 instructions across an llvm-test-suite build
including SPEC2017, targeting rva22u64. Looking at the diff, it seems
there's room for eliminating instructions or further propagating after
this.
Coverage of instructions is based on observations from a script written
to find redundant or improperly canonicalized instructions (though I aim
to support all instructions in a 'group' at once, e.g. MUL* even if I
only saw some variants of MUL in practice).
Commit: d1783406720dc0fd30fec7bb354c37ec307c6e10
https://github.com/llvm/llvm-project/commit/d1783406720dc0fd30fec7bb354c37ec307c6e10
Author: Simi Pallipurath <simi.pallipurath at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[ARM][Compiler-RT] Add optional exclusion of libc provided ARM AEABI builtins from compiler-rt. (#137952)
This patch introduces a new optional CMake flag:
COMPILER_RT_EXCLUDE_LIBC_PROVIDED_ARM_AEABI_BUILTINS
When enabled, this flag excludes the following ARM AEABI memory function
implementations from the compiler-rt build:
__aeabi_memcmp
__aeabi_memset
__aeabi_memcpy
__aeabi_memmove
These functions are already provided by standard C libraries like glibc,
newlib, and picolibc, so excluding them avoids duplicate symbol
definitions and reduces unnecessary code duplication.
Note:
- libgcc does not define the __aeabi_* functions that overlap with those
provided by the C library. Enabling this option makes compiler-rt behave
consistently with libgcc.
- This prevents duplicate symbol errors when linking, particularly in
bare-metal configurations where compiler-rt is linked first.
- This flag is OFF by default, meaning all AEABI memory builtins will
still be built unless explicitly excluded.
This change is useful for environments where libc provides runtime
routines, supporting more minimal, conflict free builds.
Commit: ea7e23c909fe5e82f26665bdd0afdaa70d67721f
https://github.com/llvm/llvm-project/commit/ea7e23c909fe5e82f26665bdd0afdaa70d67721f
Author: Mikhail Zakharov <zmish1993 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/Shell/Expr/TestProcessModificationIdOnExpr.cpp
Log Message:
-----------
[lldb] Fixed TestProcessModificationIdOnExpr to work on both x86 and x64 architectures (#138941)
Original PR where test was introduced and improvements discussed:
https://github.com/llvm/llvm-project/pull/129092#issuecomment-2855337004
Co-authored-by: Mikhail Zakharov <mikhail.zakharov at jetbrains.com>
Commit: c290f48a45df5dc66c9cdc3f3b340cb0e3fc3937
https://github.com/llvm/llvm-project/commit/c290f48a45df5dc66c9cdc3f3b340cb0e3fc3937
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Remove unused operand types. (#139062)
Commit: 41321416815d74a4a7fd15c78fcfa5af457625bb
https://github.com/llvm/llvm-project/commit/41321416815d74a4a7fd15c78fcfa5af457625bb
Author: Ely Ronnen <elyronnen at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/include/lldb/API/SBThreadPlan.h
M lldb/source/API/SBThreadPlan.cpp
M lldb/test/API/functionalities/step_scripted/Steps.py
M lldb/test/API/functionalities/step_scripted/TestStepScripted.py
M lldb/test/API/functionalities/step_scripted/main.c
Log Message:
-----------
[lldb] Expose QueueThreadPlanForStepSingleInstruction function to SBThreadPlan (#137904)
Expose `QueueThreadPlanForStepSingleInstruction` function to
SBThreadPlan
Commit: 60d0bc1faeacb8be8ef38457bce0a4f0674bc575
https://github.com/llvm/llvm-project/commit/60d0bc1faeacb8be8ef38457bce0a4f0674bc575
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
A llvm/test/Transforms/CodeGenPrepare/X86/split-dbg.ll
Log Message:
-----------
Propagate DebugLocs on phis in BreakCriticalEdges (#133492)
The pull request discusses whether this change is needed or not. We leant
towards "it can't hurt" on the basis that it's at worst slightly unecessary
(but not incorret).
The motivation for the patch came from reviewing code duplication sites to
update for Key Instructions, finding this, trying to generate a test case and
seeing the DebugLocs aren't propagated.
Commit: 1d3f8f4871a1d46312902307f657f7a239cfa815
https://github.com/llvm/llvm-project/commit/1d3f8f4871a1d46312902307f657f7a239cfa815
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port 92cc31b0f7737408dffd38c2384dff825abb8e3a for Lanai
Commit: 5b290588b52c3adbe9bde7d22ed5ae13d299f88e
https://github.com/llvm/llvm-project/commit/5b290588b52c3adbe9bde7d22ed5ae13d299f88e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMP.cpp
Log Message:
-----------
[LLVM][OpenMP] Add older versions to llvm::omp::getOpenMPVersions (#138967)
Add 3.1 and 4.0 as versions. This will make flang's default OpenMP
version (3.1) be included in the list.
Commit: 382a085a95b0abeac77b150b7b644b372bd08e78
https://github.com/llvm/llvm-project/commit/382a085a95b0abeac77b150b7b644b372bd08e78
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
Log Message:
-----------
[AMDGPU] Regenerate mfma-loop.ll test
#125885 did not update the test.
Commit: 8fa3b52ac46cf71e13cc687c77a1a61662675f93
https://github.com/llvm/llvm-project/commit/8fa3b52ac46cf71e13cc687c77a1a61662675f93
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
A llvm/test/DebugInfo/KeyInstructions/X86/cgp-break-critical-edge.ll
A llvm/test/DebugInfo/KeyInstructions/X86/lit.local.cfg
Log Message:
-----------
[KeyInstr] Remap cloned PHIs in BreakCriticalEdges (#133493)
RFC: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: e9df48e8a49cbfc82c71c8951a85e11b0cd0102a
https://github.com/llvm/llvm-project/commit/e9df48e8a49cbfc82c71c8951a85e11b0cd0102a
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
R llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-lowering-diags.ll
Log Message:
-----------
Revert "(reland) [GlobalISel] Diagnose inline assembly constraint lowering errors (#139049)"
This reverts commit 534d221b63bb52f64e1f3ad3c40cfb87323d28ec.
Commit: d2fe8896766800a97462599fc7fb557c8d424fa4
https://github.com/llvm/llvm-project/commit/d2fe8896766800a97462599fc7fb557c8d424fa4
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/IR/BasicBlock.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
Log Message:
-----------
[KeyInstr] Don't propagate source atoms to new uncond br in splitBasicBlock (#139070)
splitBasicBlock inserts an unconditional branch in the "before" block to
the "after" block. It copies the DebugLoc from the split point. Prevent
it copying the source location atom.
Add unittest.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: da8d60fbfe4582edd415c8150832a84517f3713b
https://github.com/llvm/llvm-project/commit/da8d60fbfe4582edd415c8150832a84517f3713b
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/docs/UndefinedBehavior.rst
Log Message:
-----------
[docs][nfc] Fix code-formatting in UB docs (#139079)
Commit: 6b37eeed9fe7918f28c6c2fa14788818143c1f80
https://github.com/llvm/llvm-project/commit/6b37eeed9fe7918f28c6c2fa14788818143c1f80
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/BUILD.gn
Log Message:
-----------
[gn] port Lanai bits of 92cc31b0f773740 (-gen-sd-node-info)
(The GN port does not yet support the ARC and CSKY targets.)
Commit: be6c6e2f902c71f267f91852e3391a5301f949ac
https://github.com/llvm/llvm-project/commit/be6c6e2f902c71f267f91852e3391a5301f949ac
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/bf16_imm.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
Log Message:
-----------
[AMDGPU][True16][MC] run update script on a few disasm tests (#138988)
This is a NFC patch.
Added -mattr=-real-true16 on a few disasm tests and run update script.
This is preparing for the +real-true16 change
Commit: 30f7a6cc42856d2028bfd00321ddb1428e0c46aa
https://github.com/llvm/llvm-project/commit/30f7a6cc42856d2028bfd00321ddb1428e0c46aa
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocate-source-allocatables-2.f90
M flang/test/Lower/allocate-source-allocatables.f90
M flang/test/Lower/allocate-source-pointers.f90
A flang/test/Lower/volatile-allocatable.f90
Log Message:
-----------
[flang] Correctly prepare allocatable runtime call arguments (#138727)
When lowering allocatables, the generated calls to runtime functions
were not using the runtime::createArguments utility which handles the
required conversions. createArguments is where I added the implicit
volatile casts to handle converting volatile variables to the
appropriate type based on their volatility in the callee. Because the
calls to allocatable runtime functions were not using this function,
their arguments were not casted to have the appropriate volatility.
Add a test to demonstrate that volatile and allocatable
class/box/reference types are appropriately casted before calling into
the runtime library.
Instead of using a recursive variadic template to perform the
conversions in createArguments, map over the arguments directly so that
createArguments can be called with an ArrayRef of arguments. Some cases
in Allocatable.cpp already had a vector of values at the point where
createArguments needed to be called - the new overload allows calling
with a vector of args or the variadic version with each argument spelled
out at the callsite.
This change resulted in the allocatable runtime calls having their
arguments converted left-to-right, which changed some of the test
results. I used CHECK-DAG to ignore the order.
Add some missing handling of volatile class entities, which I previously
missed because I had not yet enabled volatile class entities in Lower.
Commit: 7548cec16f54d3abf2c1387d743372f589ce290f
https://github.com/llvm/llvm-project/commit/7548cec16f54d3abf2c1387d743372f589ce290f
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M CONTRIBUTING.md
M bolt/Maintainers.txt
M clang-tools-extra/Maintainers.txt
M clang/Maintainers.rst
M clang/www/menu.html.incl
M flang-rt/CODE_OWNERS.TXT
M libcxx/utils/ci/BOT_OWNERS.txt
M llvm/CREDITS.TXT
M llvm/docs/CodeOfConduct.rst
M llvm/docs/DiscourseMigrationGuide.md
Log Message:
-----------
[www][docs] Remove last mentions of IRC (#139076)
It's the end of an era. The IRC channel was previously where the
community gathered to discuss technical topics but is now a ghost town
where the primary activity is moderators (me) kickbanning the same
individual dozens of times a day for CoC violations and the secondary
activity is telling the occasional person to come to Discord for help.
The number of people engaging on IRC for the community's intended
purposes seems to be roughly one person a month.
So this removes all remaining mentions of IRC from our documentation so
that it no longer appears to be an "official" channel for communicating
with the community. It also removes IRC handles from the various
maintainers lists, since those would stand out as confusing
anachronisms.
The IRC channel topic already recommends people come to the Discord
server. There is no way to "shut down" an IRC channel such that it no
longer exists, so the channel will continue to exist on OFTC, but will
be unmoderated.
(This was previously discussed in https://discourse.llvm.org/c/llvm/5
but some mentions persisted.)
Commit: 6e654caabedebeaca599fcc2242a668db51fa9c8
https://github.com/llvm/llvm-project/commit/6e654caabedebeaca599fcc2242a668db51fa9c8
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[DAG] Add wrappers for insert and extract sub-vector [nfc] (#137230)
Mechanical change to introduce the new wrappers, and add enough users to
make the usage pattern clear. Once this lands, I'm going to do a further
pass to adjust more callsites as separate changes.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 7eafa5bdb78f371f3173d31df4479c8f7f23d8aa
https://github.com/llvm/llvm-project/commit/7eafa5bdb78f371f3173d31df4479c8f7f23d8aa
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/IR/BasicBlock.cpp
Log Message:
-----------
[KeyInstr] Fix #139070 for empty DebugLocs
Commit: b5674cb7be1b010be181883601a3674ceef38683
https://github.com/llvm/llvm-project/commit/b5674cb7be1b010be181883601a3674ceef38683
Author: Zax <44502668+hapeeeeee at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/include/lldb/Core/SourceManager.h
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/SourceManager.cpp
A lldb/test/Shell/Commands/command-list-reach-beginning-of-file.test
A lldb/test/Shell/Commands/command-list-reach-end-of-file.test
Log Message:
-----------
[lldb] print a notice when `source list` paging reaches the end of th… (#137515)
Commit: 5f9fd475a03363db6da069b6ded1c503833a695c
https://github.com/llvm/llvm-project/commit/5f9fd475a03363db6da069b6ded1c503833a695c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/raise-memref.mlir
Log Message:
-----------
[mlir][affine] allow iter args as valid dims (#139069)
that is effectivevely a revert of
7aabf47522625e227433cc9603e0b6858c5dd66d for
mlir/lib/Dialect/Affine/IR/AffineOps.cpp
there are situations when iter args can be used as a dims. For example
in
https://github.com/google/heir/blob/main/lib/Dialect/Polynomial/Conversions/PolynomialToModArith/PolynomialToModArith.cpp#L1036
rootExp and batchSize are iter args that are being used as dims and from
the point of internal loops
they are fixed.
Commit: 3ed158fab432fd92b9d3d1386477ae12fa493132
https://github.com/llvm/llvm-project/commit/3ed158fab432fd92b9d3d1386477ae12fa493132
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/docs/OpenMPSupport.md
Log Message:
-----------
[flang][docs][OpenMP] array sections with DEPEND are supported (#139081)
This was added in
- https://github.com/llvm/llvm-project/pull/132230
- https://github.com/llvm/llvm-project/pull/132994
- https://github.com/llvm/llvm-project/pull/133892
Commit: eb5280938bf282053e1b3d281d45b522f1cdcc2e
https://github.com/llvm/llvm-project/commit/eb5280938bf282053e1b3d281d45b522f1cdcc2e
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
Log Message:
-----------
[NVPTX] Fixup AutoUpgrade of llvm.nvvm.atomic.load.{inc,dec}.32 (#138907)
The previous implementation failed to account for the fact that these
intrinsics have an overloaded pointer type. This version handles the
pointer type and adds tests for llvm.nvvm.atomic.load.add.{f32,f64}.
Commit: 78e573499eb3bc0200db462c356a6523e6ba8000
https://github.com/llvm/llvm-project/commit/78e573499eb3bc0200db462c356a6523e6ba8000
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicInst.h
Log Message:
-----------
[IR] Remove MemSetPatternIntrinsic class [nfc] (#138888)
This class appears to serve no purpose. It looks to be modeled after the
MemIntrinsic/MemTransferInst family of classes, but right now, we only
have a single intrinsic in this "family".
Commit: bbafa5214e8d5d5daf7cf428780500b13a7d6cbb
https://github.com/llvm/llvm-project/commit/bbafa5214e8d5d5daf7cf428780500b13a7d6cbb
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
Log Message:
-----------
[lldb] Fix asan failure in MinidumpFileBuilder
As per comment in https://github.com/llvm/llvm-project/pull/138698#issuecomment-2860369432
Commit: cb0b9614f8ca7ffcd5f091b1c9990adfd6cb7e33
https://github.com/llvm/llvm-project/commit/cb0b9614f8ca7ffcd5f091b1c9990adfd6cb7e33
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/functionalities/step_scripted/TestStepScripted.py
Log Message:
-----------
[lldb] Disable test using GetControlFlowKind on arm
This is only implemented for x86.
Originally introduced in: https://github.com/llvm/llvm-project/pull/137904
Commit: 55517f5f4495968d01100aa00d63db7842842270
https://github.com/llvm/llvm-project/commit/55517f5f4495968d01100aa00d63db7842842270
Author: Finn Plummer <canadienfinn at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/include/clang/Lex/HLSLRootSignatureTokenKinds.def
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
Log Message:
-----------
[HLSL][RootSignature] Add parsing for empty RootConstants (#137999)
- defines the empty RootConstants in-memory struct
- adds test harness for testing it
- adds missing parameter keywords to the lexer (`RootConstants`,
`num32BitConstants`)
First part of implementing:
https://github.com/llvm/llvm-project/issues/126576
Commit: 9c4c2426d5f3cf5128d544482c939f56c1f2911d
https://github.com/llvm/llvm-project/commit/9c4c2426d5f3cf5128d544482c939f56c1f2911d
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Fix bug introduced by restructuring in optional handling (#139092)
The restructuring of the context pruning patch in PR138792
(764614e6355e214c6b64c715d105007b1a4b97fd) introduced a bug under the
non-default -memprof-keep-all-not-cold-contexts handling.
Added more testing of this mode which would have caught the issue.
While here, fix the newly added function name to match code style.
Commit: 2ec08836d1fd78e9efcdfd6f1307f35c8ec633e7
https://github.com/llvm/llvm-project/commit/2ec08836d1fd78e9efcdfd6f1307f35c8ec633e7
Author: Kirill Stoimenov <kstoimenov at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
R clang/test/Driver/mips-cpus.c
M llvm/lib/Target/Mips/Mips.td
M llvm/test/CodeGen/Mips/msa/arithmetic.ll
Log Message:
-----------
Revert "[MIPS] Add FeatureMSA to i6400 and i6500 cores (#134985)"
This reverts commit 55a88cdf53948e7460d9c6892f6c481480faa021.
Breaks Sanitizer bot: https://lab.llvm.org/buildbot/#/builders/94/builds/6923
Commit: 155bf37ad995fa07baf99ad59294ec5fe2777635
https://github.com/llvm/llvm-project/commit/155bf37ad995fa07baf99ad59294ec5fe2777635
Author: John Harrison <harjohn at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
Log Message:
-----------
[lldb-dap] Migrate 'continue' request to new RequestHandler. (#138987)
This adds types for the 'continue' request and updates the existing
handler to the new base class.
Commit: 850d96e63a611c46313a5448cd49197d9295ce5f
https://github.com/llvm/llvm-project/commit/850d96e63a611c46313a5448cd49197d9295ce5f
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/CodeGen/CGObjC.cpp
M clang/test/CodeGenObjCXX/arc-rv-attr.mm
Log Message:
-----------
[ObjC] Also enable ARC attachedcall operand bundle for arm64_32. (#138677)
It was enabled for "aarch64", which covers arm64e but not arm64_32.
Co-authored-by: Ahmed Bougacha <ahmed at bougacha.org>
Commit: 2017831d449774e792692aac88721e409ba475e4
https://github.com/llvm/llvm-project/commit/2017831d449774e792692aac88721e409ba475e4
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
Log Message:
-----------
[clang][Unit Test] Updating Negative Stat Caching Diagnostic Unit Test (#138955)
This PR makes a minor modification to make it more stable. The only
change is adding a suffix to the path under test.
rdar://149147920
Commit: f2bc7b75dd3518b6d7dc764b34ca43c1fbc2c22d
https://github.com/llvm/llvm-project/commit/f2bc7b75dd3518b6d7dc764b34ca43c1fbc2c22d
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/rvmarker-pseudo-expansion-and-outlining.mir
Log Message:
-----------
[AArch64] Allow the clang.arc.attachedcall marker to be optional (#138694)
Now that the clang.arc.attachedcall bundle requires having an operand,
which we emit a call to in the RVMARKER sequence, we can achieve our
real goal: make the marker NOP optional.
The intention is that a new ObjC runtime call will be introduced, which
doesn't require the NOP to be present, but must be adjacent to the
possibly-autorelease-returning call (that the bundle is attached to).
This is achieved by having ISel embed whether the marker is necessary
with an additional boolean target immediate operand.
Co-authored-by: Ahmed Bougacha <ahmed at bougacha.org>
Commit: 37fecfaa63eef7bd9dff9c16d74e61c99e3ce70a
https://github.com/llvm/llvm-project/commit/37fecfaa63eef7bd9dff9c16d74e61c99e3ce70a
Author: Vivian Zhang <zhyuhang88 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/subtensor-of-padtensor.mlir
Log Message:
-----------
[mlir] Support rank-reduced extract_slice in ExtractSliceOfPadTensorSwapPattern (#138921)
This PR fixes `ExtractSliceOfPadTensorSwapPattern` to support
rank-reducing `tensor.extract_slice` ops, which were previously
unhandled and could cause crashes. To support this, an additional
`tensor.extract_slice` is inserted after `tensor.pad` to reduce the
result rank.
Commit: 9c88b6d6898812c01c82a6d5ec991fb331aef015
https://github.com/llvm/llvm-project/commit/9c88b6d6898812c01c82a6d5ec991fb331aef015
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/fp-undef.ll
M llvm/test/Transforms/InstSimplify/ConstProp/min-max.ll
Log Message:
-----------
[ConstantFolding] Fold maximumnum and minimumnum (#138700)
Add constant-folding support for the maximumnum and minimumnum
intrinsics, and extend the tests to show the qnan vs snan behavior
differences between maxnum/maximum/maximumnum.
Commit: 5b7ccdc2a29f3be4b01f0eadca8f52d5dcdd9846
https://github.com/llvm/llvm-project/commit/5b7ccdc2a29f3be4b01f0eadca8f52d5dcdd9846
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Step down as an `NVPTX` maintainer (#138936)
Commit: 64bb60a471a5ddc9c9bec413c65fdab730a1e4b0
https://github.com/llvm/llvm-project/commit/64bb60a471a5ddc9c9bec413c65fdab730a1e4b0
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
M clang/test/Modules/Inputs/submodules/module.modulemap
M clang/test/Modules/missing-header.m
Log Message:
-----------
[Modules] Don't fail when an unused textual header is missing. (#138227)
According to the documentation
> A header declaration that does not contain `exclude` nor `textual`
specifies a header that contributes to the enclosing module.
Which means that `exclude` and `textual` header don't contribute to the
enclosing module and their presence isn't required to build such a
module. The keywords tell clang how a header should be treated in a
context of the module but they don't add headers to the module.
When a textual header *is* used, clang still emits "file not found"
error pointing to the location where the missing file is included.
Commit: 5c6cbe25175be37ffa1c809f5163ab7aebecef1a
https://github.com/llvm/llvm-project/commit/5c6cbe25175be37ffa1c809f5163ab7aebecef1a
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/test/Driver/x86-mabi.c
Log Message:
-----------
[clang] UEFI default ABI (#138364)
Set MS ABI as default ABI for UEFI.
Commit: 45cd708184e114bb771330d51ec552f7f674ffa0
https://github.com/llvm/llvm-project/commit/45cd708184e114bb771330d51ec552f7f674ffa0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/source/Core/CoreProperties.td
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb] Change the statusline format to print "no target" (#139021)
Change the default statusline format to print "no target" when lldb is
launched without a target. Currently, the statusline is empty, which
looks rather odd.
Commit: 7c366b041cd0effdcf0b7e1f3a7ad4eb39800349
https://github.com/llvm/llvm-project/commit/7c366b041cd0effdcf0b7e1f3a7ad4eb39800349
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/is_fpclass.ll
Log Message:
-----------
[DirectX] Implement `llvm.is.fpclass` lowering for the fcNegZero FPClassTest and the `IsNaN`, `IsInf`, `IsFinite`, `IsNormal` DXIL ops (#138048)
Fixes #137209
This PR:
- Adds a case to `expandIntrinsic()` in `DXILIntrinsicExpansion.cpp` to
expand the `Intrinsic::is_fpclass` in the case of
`FPClassTest::fcNegZero`
- Defines the `IsNaN`, `IsFinite`, `IsNormal` DXIL ops in `DXIL.td`
- Adds a case to `lowerIntrinsics()` in `DXILOpLowering.cpp` to handle
the lowering of `Intrinsic::is_fpclass` to the DXIL ops `IsNaN`,
`IsInf`, `IsFinite`, `IsNormal` when the FPClassTest is `fcNan`,
`fcInf`, `fcFinite`, and `fcNormal` respectively
- Creates a test `llvm/test/CodeGen/DirectX/is_fpclass.ll` to exercise
the intrinsic expansion and DXIL op lowering of `Intrinsic::is_fpclass`
~~A separate PR will be made to remove the now-redundant `dx_isinf`
intrinsic to address #87777.~~
A proper implementation for the lowering of the `llvm.is.fpclass`
intrinsic to handle all possible combinations of FPClassTest can be
implemented in a separate PR. This PR's implementation focuses primarily
on addressing the current use-cases for DirectML and HLSL intrinsics.
Commit: 808a5f15d7855f78a837c20e866cf4d0b1b90ab2
https://github.com/llvm/llvm-project/commit/808a5f15d7855f78a837c20e866cf4d0b1b90ab2
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-store.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/zve32x.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/zvl32b.ll
Log Message:
-----------
[RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (#137045)
RISCVVectorPeepholePass would replace instructions with all-ones mask
with their unmask variant, so there isn't really a point to keep
separate versions of intrinsics.
Note that `riscv.segN.load/store.mask` does not take pointer type (i.e.
address space) as part of its overloading type signature, because RISC-V
doesn't really use address spaces other than the default one.
Commit: e9702ce18a4c40e226da9ac663a6767f8f64569f
https://github.com/llvm/llvm-project/commit/e9702ce18a4c40e226da9ac663a6767f8f64569f
Author: David Green <david.green at arm.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/icmp-or-load.ll
Log Message:
-----------
[AArch64] Add some tests for icmp eq chains of loads. NFC
Commit: 7f633b583eb8ae84190ff2142005222d36c38b6a
https://github.com/llvm/llvm-project/commit/7f633b583eb8ae84190ff2142005222d36c38b6a
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/bf16_imm.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
Log Message:
-----------
[AMDGPU][True16][MC] add true16 mode on a few disasm tests (#139094)
This is a NFC patch.
applied "+real-true16" on a few disasm test and run update script
Commit: cf2f558501ecd4b1985cd34a06d90796c2a891c6
https://github.com/llvm/llvm-project/commit/cf2f558501ecd4b1985cd34a06d90796c2a891c6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[DAG/RISCV] Continue mitgrating to getInsertSubvector and getExtractSubvector
Follow up to 6e654caab, use the new routines in more places. Note that
I've excluded from this patch any case which uses a getConstant index
instead of a getVectorIdxConstant index just to minimize room for
error. I'll get those in a separate follow up.
Commit: b0bf48d44e5502092c55ea7f353f8c4100635601
https://github.com/llvm/llvm-project/commit/b0bf48d44e5502092c55ea7f353f8c4100635601
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
A llvm/test/DebugInfo/Generic/discriminant-member.ll
Log Message:
-----------
Two DWARF variant part improvements (#138953)
This patch adds a couple of improvements to the LLVM emission of DWARF
variant parts. One of these is desirable for Ada, and the other is
required.
Currently, when emitting a discriminant, LLVM follows the precise letter
of the DWARF standard, which says:
If the variant part has a discriminant, the discriminant is
represented by a separate debugging information entry which is a
child of the variant part entry.
However, for Ada this does not really make sense. In Ada, the
discriminant field exists outside of any variant part, and it makes more
sense to emit it separately rather than redundantly emit the field once
for each variant part.
This extension was arrived at when this was implemented in GCC, and was
accepted for DWARF 6, see:
https://dwarfstd.org/issues/180123.1.html
Here the patch simply lifts this restriction: if the discriminant field
was already emitted, it isn't re-emitted. This approach allows the Ada
compiler to do what it needs without affecting the Rust output.
Second, this patch extends the discriminant to allow multiple values.
This is needed by Ada. Here, I chose to use a ConstantDataArray of pairs
of integers, with each pair representing a range, as Ada also allows
ranges here. This seemed like a reasonably convenient representation.
Commit: d1da41bf4d271fd9abb9aba37873755feb99e4b6
https://github.com/llvm/llvm-project/commit/d1da41bf4d271fd9abb9aba37873755feb99e4b6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/TestCases/override-callback.c
Log Message:
-----------
[ubsan_minimal] Add __ubsan_report_error_fatal (#138999)
Override may need to know if sanitizer in recover mode.
Commit: a2b28a68125c5e179df01ed62ca8549bcb9c73b1
https://github.com/llvm/llvm-project/commit/a2b28a68125c5e179df01ed62ca8549bcb9c73b1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[DAG/RISCV] Continue mitgrating to getInsertSubvector and getExtractSubvector
Follow up to 6e654caab and cf2f5585. I'd apparently missed two cases.
Commit: 3bc3b1c6c0f35bf223c595f8426f6726d64553e7
https://github.com/llvm/llvm-project/commit/3bc3b1c6c0f35bf223c595f8426f6726d64553e7
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[HLSL][NFC] Rename isImplicit() to hasRegisterStot() on HLSLResourceBindingAttr (#138964)
Renaming because the name `isImplicit` is ambiguous. It can mean
implicit attribute or implicit binding.
Commit: 81786b9185fc048a3ea83e57f825ec0284e988a8
https://github.com/llvm/llvm-project/commit/81786b9185fc048a3ea83e57f825ec0284e988a8
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Remove unused variable
Remove unused variable in RISCVTargetLowering
Commit: 339dc9500b90dba47e5c7bc9804a4d5f01d592ea
https://github.com/llvm/llvm-project/commit/339dc9500b90dba47e5c7bc9804a4d5f01d592ea
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Retain exit conditions and edges in initial VPlan (NFC). (#137709)
Update initial VPlan construction to include exit conditions and edges.
The loop region is now first constructed without entry/exiting. Those
are set after inserting the region in the CFG, to preserve the original
predecessor/successor order of blocks.
For now, all early exits are disconnected before forming the regions,
but a follow-up will update uncountable exit handling to also happen
here. This is required to enable VPlan predication and remove the
dependence any IR BBs
(https://github.com/llvm/llvm-project/pull/128420).
PR: https://github.com/llvm/llvm-project/pull/137709
Commit: 9692dff7b7624208f482007c3b76c838b12fda63
https://github.com/llvm/llvm-project/commit/9692dff7b7624208f482007c3b76c838b12fda63
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/TableGen/cc-assign-to-reg-tuple.td
M llvm/utils/TableGen/CallingConvEmitter.cpp
Log Message:
-----------
[TableGen][NFC] Use early exit to simplify large block in emitAction. (#138220)
Most of the processing in emitAction is in an unneeded else-block--
reduce indentation by exiting after the recursive call.
`XXXGenCallingConv.inc` are identical before and after this patch for
all targets.
Commit: 53e8ff13bd3c1061af01a1508881575db81ce900
https://github.com/llvm/llvm-project/commit/53e8ff13bd3c1061af01a1508881575db81ce900
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[MLIR] Fixing the memref linearization size computation for non-packed memref (#138922)
Credit to @krzysz00 who discovered this subtle bug in `MemRefUtils`. The
problem is in `getLinearizedMemRefOffsetAndSize()` utility. In
particular, how this subroutine computes the linearized size of a memref
is incorrect when given a non-packed memref.
### Background
As context, in a packed memref of `memref<8x8xf32>`, we'd compute the
size by multiplying the size of dimensions together. This is implemented
by composing an affine_map of `affine_map<()[s0, s1] -> (s0 * s1)>` and
then computing the result of size via `%size = affine.apply #map()[%c8,
%c8]`.
However, this is wrong for a non-packed memref of `memref<8x8xf32,
strided<[1024, 1]>>`. Since the previous computed multiplication map
will only consider the dimension sizes, it'd continue to conclude that
the size of the non-packed memref to be 64.
### Solution
This PR come up with a fix such that the linearized size computation
take strides into consideration. It computes the maximum of (dim size *
dim stride) for each dimension. We'd compute the size via the affine_map
of `affine_map<()[stride0, size0, stride1] -> ((stride0 * size0), 1 *
size1)>` and then computing the size via `%size = affine.max
#map()[%stride0, %size0, %size1]`. In particular for the new non-packed
memref, the size will be derived as max(1024\*8, 1\*8) = 8192 (rather
than the wrong size 64 computed by packed memref equation).
Commit: 0beb2f56f6f6eb5aab142334a47228cbbc86c22f
https://github.com/llvm/llvm-project/commit/0beb2f56f6f6eb5aab142334a47228cbbc86c22f
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
Log Message:
-----------
[HLSL][NFC] Stricter Overload Tests (clamp,max,min,pow) (#138993)
Partial implementation of #138016 to unblock other ongoing work. NFC
Commit: 09c80e2944967332c4d889ef19a001ebb4521782
https://github.com/llvm/llvm-project/commit/09c80e2944967332c4d889ef19a001ebb4521782
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/TokenKinds.def
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/attr-trivial-abi.cpp
M clang/test/SemaCXX/ptrauth-triviality.cpp
M clang/test/SemaCXX/type-traits-nonobject.cpp
Log Message:
-----------
Reland [Clang] Deprecate `__is_trivially_relocatable` (#139061)
The C++26 standard relocatable type traits has slightly different
semantics, so we introduced a new
``__builtin_is_cpp_trivially_relocatable``
when implementing trivial relocation in #127636.
However, having multiple relocatable traits would be confusing
in the long run, so we deprecate the old trait.
As discussed in #127636
`__builtin_is_cpp_trivially_relocatable` should be used instead.
Commit: 9d907a2bb1d2ce67ae4d203218df380a45abaf30
https://github.com/llvm/llvm-project/commit/9d907a2bb1d2ce67ae4d203218df380a45abaf30
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
Log Message:
-----------
AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (#128911)
Update the f64 to f16 lowering for targets which support f16 types.
For unsafe mode, lowered to two FP_ROUND. (This patch
https://reviews.llvm.org/D154528 stops from combining these two FP_ROUND
back). In safe mode, select LowerF64ToF16 (round-to-nearest-even
rounding mode)
Commit: 3a5af231fd3af4b5890ed28f7792b17e56386ffd
https://github.com/llvm/llvm-project/commit/3a5af231fd3af4b5890ed28f7792b17e56386ffd
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
Log Message:
-----------
[GlobalISel][AMDGPU] Fix handling of v2i128 type for AND, OR, XOR (#138574)
Current behavior crashes the compiler.
This bug was found using the AMDGPU Fuzzing project.
Fixes SWDEV-508816.
Commit: 7a6674622603c76274959a9797c0fafb4bc84c44
https://github.com/llvm/llvm-project/commit/7a6674622603c76274959a9797c0fafb4bc84c44
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribution.mlir
Log Message:
-----------
[mlir][xegpu] Handle scalar uniform ops in SIMT distribution. (#138593)
This PR adds support for moving scalar uniform (gpu index ops, constants
etc) outside the `gpu.warp_execute_on_lane0` op. These kinds of ops do
not require distribution and are safe to move out of the warp op. This
also avoid adding separate distribution patterns for these ops.
Example:
```
%1 = gpu.warp_execute_on_lane_0(%laneid) -> (index) {
...
%block_id_x = gpu.block_id x
gpu.yield %block_id_x
}
// use %1
```
To:
```
%block_id_x = gpu.block_id x
%1 = gpu.warp_execute_on_lane_0(%laneid) -> (index) {
...
gpu.yield %block_id_x
}
// use %1
```
Commit: 7feba5febf3a431caf97adc10829f781363e961c
https://github.com/llvm/llvm-project/commit/7feba5febf3a431caf97adc10829f781363e961c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/IR/vector.cir
Log Message:
-----------
[CIR] Upstream extract op for VectorType (#138413)
This change adds extract op for VectorType
Issue https://github.com/llvm/llvm-project/issues/136487
Commit: 71f8f2b1554b0a34abe4f14bcceadebfbf687739
https://github.com/llvm/llvm-project/commit/71f8f2b1554b0a34abe4f14bcceadebfbf687739
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU][NFC] Get rid of OPW constants. (#139074)
We can infer the widths from register classes and represent them as
numbers.
Commit: a7b5c303dceb5790b925ac8a019bd66344abb814
https://github.com/llvm/llvm-project/commit/a7b5c303dceb5790b925ac8a019bd66344abb814
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/include/mlir/IR/Builders.h
Log Message:
-----------
Remove unused forward decl (#139108)
Commit: b836f96b8f51daa76f6387de364603db0fe553a7
https://github.com/llvm/llvm-project/commit/b836f96b8f51daa76f6387de364603db0fe553a7
Author: Lei Wang <wlei at fb.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/ProfileList.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/profile-filter.c
M clang/test/Driver/fprofile-generate-cold-function-coverage.c
Log Message:
-----------
[Coverage] Support -fprofile-list for cold function coverage (#136333)
Add a new instrumentation section type `[sample-coldcov]` to
support`-fprofile-list` for sample pgo based cold function coverage.
Note that the current cold function coverage is based on sampling PGO
pipeline, which is incompatible with the existing [llvm] option(see
[PGOOptions](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/PGOOptions.h#L27-L43)),
so we can't reuse the IR-PGO(-fprofile-instrument=llvm) flag.
Commit: 254c13d872ea378f9e5569060e24c134d37a0ecb
https://github.com/llvm/llvm-project/commit/254c13d872ea378f9e5569060e24c134d37a0ecb
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/PatchEntries.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/test/AArch64/lite-mode.s
M bolt/unittests/Core/BinaryContext.cpp
Log Message:
-----------
[BOLT][AArch64] Patch functions targeted by optional relocs (#138750)
On AArch64, we create optional/weak relocations that may not be
processed due to the relocated value overflow. When the overflow
happens, we used to enforce patching for all functions in the binary via
--force-patch option. This PR relaxes the requirement, and enforces
patching only for functions that are target of optional relocations.
Moreover, if the compact code model is used, the relocation overflow is
guaranteed not to happen and the patching will be skipped.
Commit: c526683c7f2cf94c9e3a55cc810a0bb90e68c646
https://github.com/llvm/llvm-project/commit/c526683c7f2cf94c9e3a55cc810a0bb90e68c646
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Simplify unittest save and restore of options (#139117)
Address post-commit review feedback for PR139092 (and fix another
instance of the same code). Save and restore option values via a saved
bool value, instead of invoking cl::ResetAllOptionOccurrences.
Commit: 8c61befff8e8687e7848fb1044beb20b41503451
https://github.com/llvm/llvm-project/commit/8c61befff8e8687e7848fb1044beb20b41503451
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
Log Message:
-----------
GlobalISel: Translate minimumnum and maximumnum (#139106)
Commit: 54bb2295c31323a77e018ceb2c737d28bd0a5986
https://github.com/llvm/llvm-project/commit/54bb2295c31323a77e018ceb2c737d28bd0a5986
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Migrate getConstant indexed insert/extract subvector to new API (#139111)
Note that this change is possibly not NFC. The prior routines used
getConstant with XLenVT. The new wrappers will used getVectorIdxConstant
instead. Digging through the code, the type used for the index will be
the integer of pointer width from DL. For typical RV32 and RV64
configurations the pointer will be of equal width to XLEN, but you could
have a 32b pointer on an RV64 machine.
Commit: 652ab9800808c254bbd84d81d4583c13cd073abb
https://github.com/llvm/llvm-project/commit/652ab9800808c254bbd84d81d4583c13cd073abb
Author: David Sankel <camior at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lld/ELF/Options.td
Log Message:
-----------
[lld][NFC] Fix minor typo in docs (#138898)
Commit: 7f98e5a5ea12b986b8637da22b46544b95f831cf
https://github.com/llvm/llvm-project/commit/7f98e5a5ea12b986b8637da22b46544b95f831cf
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
Log Message:
-----------
[MLIR][LLVM] Fix llvm.mlir.global mismatching print and parser order (#138986)
`GlobalOp` was parsing `thread_local` after `unnamed_addr`, but printing in the reverse order.
While here, make `AliasOp` match the same behavior and share common parts of global and alias printing.
Commit: 5fe69fd95c4e2bc55a41a41047d08522a5f26d57
https://github.com/llvm/llvm-project/commit/5fe69fd95c4e2bc55a41a41047d08522a5f26d57
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/test/Transforms/DoConcurrent/basic_device.mlir
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
R flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
Log Message:
-----------
[flang][OpenMP] Update `do concurrent` mapping pass to use `fir.do_concurrent` op (#138489)
This PR updates the `do concurrent` to OpenMP mapping pass to use the
newly added `fir.do_concurrent` ops that were recently added upstream
instead of handling nests of `fir.do_loop ... unordered` ops.
Parent PR: https://github.com/llvm/llvm-project/pull/137928.
Commit: 21130d3f068ae5d9f3d11750f5a3bcf63ed36082
https://github.com/llvm/llvm-project/commit/21130d3f068ae5d9f3d11750f5a3bcf63ed36082
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] One last migration to getInsertSubvector [nfc]
Commit: ae6e1276233ca541fdb2be1dde3074eb78277859
https://github.com/llvm/llvm-project/commit/ae6e1276233ca541fdb2be1dde3074eb78277859
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/str-narrow-zero-merge.mir
Log Message:
-----------
[AArch64] Merge scaled and unscaled narrow zero stores (#136705)
Commit: 8a7b5012c26f6db060bf5c472fc9fb54f37ecf65
https://github.com/llvm/llvm-project/commit/8a7b5012c26f6db060bf5c472fc9fb54f37ecf65
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
Log Message:
-----------
[MemProf] Fix summary bitcode record description (NFC) (#139127)
Commit 776476c282bca71d5b856e80e0a88fbd6f3ccdd2 (PR117404), which
introduced the radix tree representation of allocation context summary
records, incorrectly changed the description of the
FS_COMBINED_CALLSITE_INFO record instead of the intended
FS_COMBINED_ALLOC_INFO record.
Commit: d7987f1ce9bdc57fe10de6eef25fbe0df725c68f
https://github.com/llvm/llvm-project/commit/d7987f1ce9bdc57fe10de6eef25fbe0df725c68f
Author: Aleksandar Zecevic <azecevic at tenstorrent.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.td
Log Message:
-----------
[mlir][memref] Fix typo in `BuiltinAttributeInterfaces` description (#136774)
Commit: 515b4a4fdd7ac97373b68850a2ffa72e2b8e9178
https://github.com/llvm/llvm-project/commit/515b4a4fdd7ac97373b68850a2ffa72e2b8e9178
Author: Ian Anderson <iana at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/DriverKit19.0.sdk/System/DriverKit/System/Library/SubFrameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/Library/Frameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/System/Library/Frameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/System/Library/SubFrameworks/.keep
A clang/test/Driver/darwin-framework-search-paths.c
R clang/test/Driver/darwin-subframeworks.c
M clang/test/Driver/driverkit-path.c
R clang/test/Preprocessor/cuda-macos-includes.cu
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/SearchPathTest.cpp
Log Message:
-----------
[clang][Darwin] Remove legacy framework search path logic in the frontend (#138234)
Move the Darwin framework search path logic from
InitHeaderSearch::AddDefaultIncludePaths to
DarwinClang::AddClangSystemIncludeArgs. Add a new -internal-iframework
cc1 argument to support the tool chain adding these paths.
Now that the tool chain is adding search paths via cc1 flag, they're
only added if they exist, so the Preprocessor/cuda-macos-includes.cu
test is no longer relevant.
Change Driver/driverkit-path.c and Driver/darwin-subframeworks.c to do
-### style testing similar to the darwin-header-search and
darwin-embedded-search-paths tests. Rename darwin-subframeworks.c to
darwin-framework-search-paths.c and have it test all framework search
paths, not just SubFrameworks.
Add a unit test to validate that the myriad of search path flags result
in the expected search path list.
Fixes https://github.com/llvm/llvm-project/issues/75638
Commit: 88e68872fd34da9c778e2969e9bf9200bc47fab6
https://github.com/llvm/llvm-project/commit/88e68872fd34da9c778e2969e9bf9200bc47fab6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 515b4a4fdd7a
Commit: 227e1ff73b6c0cbdd912c69405777f7121dc0760
https://github.com/llvm/llvm-project/commit/227e1ff73b6c0cbdd912c69405777f7121dc0760
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/do_concurrent.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang][fir] Add locality specifiers modeling to `fir.do_concurrent.loop` (#138506)
Commit: a861f50030a9dac28a35654506bb28d2bc239b56
https://github.com/llvm/llvm-project/commit/a861f50030a9dac28a35654506bb28d2bc239b56
Author: Ralender <Tyker1 at outlook.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/test/CodeGen/WinEH/wineh-asm.ll
A llvm/test/CodeGen/WinEH/wineh-asm2.ll
Log Message:
-----------
[WinEH] Fix asm in catchpad being turned into unreachable (#138392)
Commit: d06d43a9e8cb5db84e6ee3557b6244e14a291def
https://github.com/llvm/llvm-project/commit/d06d43a9e8cb5db84e6ee3557b6244e14a291def
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Add printPhiOperands to VPPhiAccessors, use for wide phis.
(NFC modulo debug output changes)
Add generic helper to print phi operands (incoming values) together with
their incoming blocks.
As more and more transforms are added, keeping the incoming blocks of
phis becomes more important. Print incoming blocks via VPPhiAcessors, to
make debugging easier.
Commit: 02f61ab46b1608c26fd72862d4b46cbb7b034889
https://github.com/llvm/llvm-project/commit/02f61ab46b1608c26fd72862d4b46cbb7b034889
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/test/Lower/HLFIR/designators-component-ref.f90
Log Message:
-----------
[flang] Use box for components with non-default lower bounds (#138994)
When designating an array component that has non-default lower bounds
the bridge was producing hlfir designates yielding reference types,
which did not preserve the bounds information. Then, when creating
components, unadjusted indices were used when initializing the
structure.
We could look at the declaration to get the shape parameter, but this
would not be preserved if the component were passed as a block argument.
These results must be boxed, but we also must not lose the contiguity
information either. To address contiguity, annotate these boxes with the
`contiguous` attribute during designation.
Note that other designated entities are handled inside the
HlfirDesignatorBuilder while component designators are built in
HlfirBuilder. I am not sure if this handling should be moved into the
designator builder or left in the general builder, so feedback is
welcome.
Also, I wouldn't mind finding a test that demonstrates a box-designated
component with the contiguous attribute really is determined to be
contiguous by any passes down the line checking for that. I don't have a
test like that yet.
Commit: 28156539a9df3fa0d9db47c405c0006fcee9f77f
https://github.com/llvm/llvm-project/commit/28156539a9df3fa0d9db47c405c0006fcee9f77f
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/functionalities/step_scripted/TestStepScripted.py
Log Message:
-----------
[lldb] Disable test using GetControlFlowKind on arm
Commit: e7dcf1b7e5574d03d1ce6e7520d5683cfea37706
https://github.com/llvm/llvm-project/commit/e7dcf1b7e5574d03d1ce6e7520d5683cfea37706
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribution.mlir
M mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir
Log Message:
-----------
[mlir][xegpu] Add SIMT distribution patterns for UpdateNdOffset and PrefetchNd ops. (#138033)
This PR adds support for SIMT distribution of UpdateNdOffset and
PrefetchNd ops.
For both these ops distribution will remove the layout attribute from
the tensor descriptor type. Everything else remains unchanged.
Example 1:
```
#lo0 = #xegpu.layout<wi_layout = [1, 8], wi_data = [1, 1]>
gpu.warp_execute_on_lane_0(%laneid) -> () {
...
xegpu.prefetch_nd %arg0 : !xegpu.tensor_desc<4x8xf32, #lo0>
}
```
To
```
%r:2 = gpu.warp_execute_on_lane_0(%laneid) -> (
!xegpu.tensor_desc<4x8xf32, #lo0>) {
gpu.yield %arg0: !xegpu.tensor_desc<4x8xf32, #lo0>
}
%1 = unrealized_conversion_cast %r#0: !xegpu.tensor_desc<4x8xf32,
#lo0> -> !xegpu.tensor_desc<4x8xf32>
xegpu.prefetch_nd %0 : !xegpu.tensor_desc<4x8xf32>
```
Example 2:
```
#lo0 = #xegpu.layout<wi_layout = [1, 8], wi_data = [1, 1]>
%r = gpu.warp_execute_on_lane_0(%laneid) ->
(!xegpu.tensor_desc<4x8xf32, #lo0>) {
...
%update = xegpu.update_nd_offset %arg0, [%c32, %c16]:
!xegpu.tensor_desc<4x8xf32, #lo0>
gpu.yield %update
}
...
```
To
```
%r:2 = gpu.warp_execute_on_lane_0(%laneid) -> (vector<4x1xf32>,
!xegpu.tensor_desc<4x8xf32, #lo0>) {
...
%dead = xegpu.update_nd_offset %arg0, [%c32, %c16]:
!xegpu.tensor_desc<4x8xf32, #lo0> gpu.yield %dead, %arg0
gup.yield %dead, %arg0, %c32, %c16
}
%0 = xegpu.unrealized_conversion_cast %r#1: !xegpu.tensor_desc<4x8xf32,
#lo0> -> !xegpu.tensor_desc<4x8xf32>
%1 = xegpu.update_nd_offset %0, [%c32, %c16]:
!xegpu.tensor_desc<4x8xf32>
...
```
Commit: c82e2f5c9ed08a270a1ec60bf7313af9c236ab98
https://github.com/llvm/llvm-project/commit/c82e2f5c9ed08a270a1ec60bf7313af9c236ab98
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Move VPPhiAccessors definition. (NFC)
Move up definition to allow re-use by additional recipes.
Commit: 45d493b680e3e79e4e9c19d665df83823c52a73a
https://github.com/llvm/llvm-project/commit/45d493b680e3e79e4e9c19d665df83823c52a73a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__expected/expected.h
M libcxx/include/__locale
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__split_buffer
A libcxx/include/__type_traits/is_replaceable.h
M libcxx/include/__utility/pair.h
M libcxx/include/__vector/vector.h
M libcxx/include/array
M libcxx/include/deque
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/string
M libcxx/include/tuple
M libcxx/include/variant
A libcxx/test/libcxx/type_traits/is_replaceable.compile.pass.cpp
Log Message:
-----------
[libc++] Add the __is_replaceable type trait (#132408)
That type trait represents whether move-assigning an object is
equivalent to destroying it and then move-constructing a new one from
the same argument. This will be useful in a few places where we may want
to destroy + construct instead of doing an assignment, in particular
when implementing some container operations in terms of relocation.
This is effectively adding a library emulation of P2786R12's
is_replaceable trait, similarly to what we do for trivial relocation.
Eventually, we can replace this library emulation by the real
compiler-backed trait.
This is building towards #129328.
Commit: dbe320efa19e52351a4819fc50d62219852cd381
https://github.com/llvm/llvm-project/commit/dbe320efa19e52351a4819fc50d62219852cd381
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/docs/InterfaceExportAnnotations.rst
Log Message:
-----------
[llvm] minor revisions to export annotation macro docs (#138761)
## Purpose
Make some minor tweaks and clarifications to the `LLVM_ABI` export
annotation docs.
## Overview
1. Minor cleanup on wording throughout
2. Clarification around class-level annotation requirements to export
vtable
## Validation
Manually inspected docs on [my fork
here](https://github.com/andrurogerz/llvm-project/blob/llvm-export-annotation-doc-update/llvm/docs/InterfaceExportAnnotations.rst).
Commit: f39ac3f569519a6f6c1618b23e20d47a74abef1e
https://github.com/llvm/llvm-project/commit/f39ac3f569519a6f6c1618b23e20d47a74abef1e
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
A libcxx/test/libcxx/containers/container.adaptors/flat.multiset/insert.temporary.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.set/insert.temporary.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat_helpers.h
Log Message:
-----------
[libc++] Add test for flat_set::insert not creating temporaries (#138387)
Fixes #119016
Commit: 741fef3a445339523500f614e0f752b9a74517a6
https://github.com/llvm/llvm-project/commit/741fef3a445339523500f614e0f752b9a74517a6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 45d493b680e3
Commit: 948bffa951cf143da5f4caa461b25ce76fa137d0
https://github.com/llvm/llvm-project/commit/948bffa951cf143da5f4caa461b25ce76fa137d0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M libcxx/include/__math/copysign.h
M libcxx/include/__math/exponential_functions.h
M libcxx/include/__math/fdim.h
M libcxx/include/__math/fma.h
M libcxx/include/__math/hypot.h
M libcxx/include/__math/inverse_trigonometric_functions.h
M libcxx/include/__math/min_max.h
M libcxx/include/__math/modulo.h
M libcxx/include/__math/remainder.h
M libcxx/include/__math/rounding_functions.h
M libcxx/include/__math/traits.h
M libcxx/include/__type_traits/promote.h
M libcxx/include/cmath
M libcxx/include/complex
M libcxx/test/libcxx/numerics/complex.number/cmplx.over.pow.pass.cpp
Log Message:
-----------
[libc++] Simplify __promote (#136101)
This avoids instantiating an extra class for every variant `__promote`
is used in.
Commit: a76cf062a57097ad7971325551854bd5f3d38d94
https://github.com/llvm/llvm-project/commit/a76cf062a57097ad7971325551854bd5f3d38d94
Author: Florian Mayer <fmayer at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
A llvm/test/Instrumentation/HWAddressSanitizer/personality-bti.ll
Log Message:
-----------
[HWASan] fix missing BTI attribute on personality function thunks (#139138)
This used to work because the BTI attribute was taken from the module in
the CodeGen.
e15d67cfc2e5775cc79281aa860f3ad3be628f39 changed that to actually look
at the function attributes. This led to crashes for BTI, because we did
not emit the proper landing pads for the thunk.
Commit: 2693a715bf2b343d6d4b196c6fb15474d3bc1377
https://github.com/llvm/llvm-project/commit/2693a715bf2b343d6d4b196c6fb15474d3bc1377
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Port 515b4a4fdd7ac97373b68850a2ffa72e2b8e9178 (#139155)
Commit: 47fb5bd494a9dd391abceafddb872e01a7d3492b
https://github.com/llvm/llvm-project/commit/47fb5bd494a9dd391abceafddb872e01a7d3492b
Author: Reid Kleckner <rnk at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/unittests/Support/TimeProfilerTest.cpp
Log Message:
-----------
[clang] Deflake the TimeProfile support tests (#138613)
These tests have been flaky since they were merged into the
AllClangUnitTests binary, but the flakiness is inherent to the nature of
timer-based tests.
Commit: 03896403d3bf330c8163aa9ae3fe2aa284e273be
https://github.com/llvm/llvm-project/commit/03896403d3bf330c8163aa9ae3fe2aa284e273be
Author: John Harrison <harjohn at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Migrate attach to typed RequestHandler. (#137911)
This updates the `attach` request to the typed
`RequestHandler<protocol::AttachRequestArguments,
protocol::AttachResponse>`.
Added a few more overlapping configurations to
`lldb_dap::protocol::Configuration` that are shared between launching
and attaching.
There may be some additional code we could clean-up that is no longer
referenced now that this has migrated to use well defined types.
Commit: 0df1a52852f570fb72c25f88f94f9b51e4689f1d
https://github.com/llvm/llvm-project/commit/0df1a52852f570fb72c25f88f94f9b51e4689f1d
Author: Ahmed Bougacha <ahmed at bougacha.org>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
A llvm/test/CodeGen/AArch64/fast-isel-atomic-fallback.ll
Log Message:
-----------
[AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands. (#133987)
This has been a latent bug for almost 10 years, but is relatively hard
to trigger, needing an address operand that isn't handled by
getRegForValue (in the test here, constexpr casts). When that happens,
it returns 0, which FastISel happily uses as a register operand, all the
way to asm, where we either get a crash on an invalid register, or a
silently corrupt instruction.
Unfortunately, FastISel is still enabled at -O0 for at least
ILP32/arm64_32.
Commit: 92d949229273a7c1dfb923a2b8fbac92fae04fd5
https://github.com/llvm/llvm-project/commit/92d949229273a7c1dfb923a2b8fbac92fae04fd5
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Address post-commit review feedback on 1ac489c8e
As noted by @s-barannikov, the last argument wasn't reflected in the type
profile for the SDNode, nor was it being used by the patterns.
Commit: 06d6623bc304d5fc2fe11b80b62b4c5d10f9eaa1
https://github.com/llvm/llvm-project/commit/06d6623bc304d5fc2fe11b80b62b4c5d10f9eaa1
Author: David Salinas <dsalinas at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.rst
A llvm/include/llvm/Object/OffloadBundle.h
M llvm/lib/Object/CMakeLists.txt
A llvm/lib/Object/OffloadBundle.cpp
A llvm/test/tools/llvm-objdump/Offloading/fatbin.test
M llvm/tools/llvm-objdump/OffloadDump.cpp
M llvm/tools/llvm-objdump/OffloadDump.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Object/CMakeLists.txt
A llvm/unittests/Object/OffloadingBundleTest.cpp
Log Message:
-----------
[llvm-objdump] Add support for HIP offload bundles (#114834)
Utilize the new extensions to the LLVM Offloading API to extend to
llvm-objdump to handle dumping fatbin offload bundles generated by HIP.
This extension to llvm-objdump adds the option --offload-fatbin.
Specifying this option will take the input object/executable and extract
all offload fatbin bundle entries into distinct code object files with
names reflecting the source file name combined with the Bundle Entry ID.
Users can also use the --arch-name option to filter offload fatbin
bundle entries by their target triple.
---------
Co-authored-by: dsalinas <dsalinas at MKM-L1-DSALINAS.amd.com>
Commit: 13b2f7c78574ce484c38d82769f8d4168cabd6ed
https://github.com/llvm/llvm-project/commit/13b2f7c78574ce484c38d82769f8d4168cabd6ed
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] add fake16 to gisel test (#138588)
This is a NFC patch.
Add '-mattr=-real-true16' to gfx11/gfx12 test.
GISEL is not fully supported in true16 mode yet. However we might want
to turn on true16 mode for SDAG as default first. This patch is
preparing for this mode shift in the short future so we can have a small
patch to turn it on
Commit: c336bd74fa47c5cd57b7ea9aaa1e78d3cc1cb522
https://github.com/llvm/llvm-project/commit/c336bd74fa47c5cd57b7ea9aaa1e78d3cc1cb522
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] added missing testlines for t16 test (#135823)
This is a NFC patch.
Update testlines for true16 mc inst including:
v_min_num_f16
v_max_num_f16
v_cvt_f16_f32
v_cmp_tru_f16
v_cmpx_tru_f16
v_min_num_f16
v_max_num_f16
v_cvt_pknorm_i16_f16
v_med3_f16
The functional change is done, but these are testlines that are not yet
up-to-date
Commit: 856632bfc1b8a60735113a8f55f8fb5ed5bc4cf4
https://github.com/llvm/llvm-project/commit/856632bfc1b8a60735113a8f55f8fb5ed5bc4cf4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
Log Message:
-----------
[NFC][ubsan_minimal] Clang-format a file (#139000)
Commit: 61b435ec4de6b2a4139afce5195a01717436184c
https://github.com/llvm/llvm-project/commit/61b435ec4de6b2a4139afce5195a01717436184c
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/lib/Basic/Attributes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/CXX/module/module.interface/p3.cpp
M clang/test/OpenMP/openmp_attribute_parsing.cpp
M clang/test/Parser/c2x-attributes.c
M clang/test/Parser/cxx0x-attributes.cpp
M clang/test/Sema/patchable-function-entry-attr.cpp
A clang/test/Sema/unknown-attributes.c
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
Log Message:
-----------
[Clang] show attribute namespace in diagnostics (#138519)
This patch enhances Clang's diagnosis of an unknown attribute by
printing the attribute's namespace in the diagnostic text. e.g.,
```cpp
[[foo::nodiscard]] int f(); // warning: unknown attribute 'foo::nodiscard' ignored
```
Commit: fa43e8f7de534984bc56b6319b72fd8ad422cbdf
https://github.com/llvm/llvm-project/commit/fa43e8f7de534984bc56b6319b72fd8ad422cbdf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn
Log Message:
-----------
[gn build] Port 06d6623bc304
Commit: 611d81bd9304768f3cdb101d37c81d36b9762723
https://github.com/llvm/llvm-project/commit/611d81bd9304768f3cdb101d37c81d36b9762723
Author: John Harrison <harjohn at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
A lldb/tools/lldb-dap/src-ts/debug-session-tracker.ts
M lldb/tools/lldb-dap/src-ts/disposable-context.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
Log Message:
-----------
[lldb-dap] Adding a modules explorer to lldb-dap ext. (#138977)
This creates a very basic module explorer for tracking and displaying
loaded modules, reported by lldb-dap for the active debug session.
This includes a basic session tracker that we can use to observe the
debug session and collect specific information for additional
visualizations in the lldb-dap ext.
Here is a screenshot of the current visualization in the tree view.
There is some unfortunate wrapping of the path, but it shows the basic
support that could be extended in the future.
<img width="1759" alt="Screenshot 2025-05-07 at 2 52 50 PM"
src="https://github.com/user-attachments/assets/588baa2f-61d5-4434-8692-b1d0cce42875"
/>
Commit: 6bb30196912daeaa92babc39519b2ae0bfce9771
https://github.com/llvm/llvm-project/commit/6bb30196912daeaa92babc39519b2ae0bfce9771
Author: jimingham <jingham at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
A lldb/test/API/macosx/branch-islands/Makefile
A lldb/test/API/macosx/branch-islands/TestBranchIslands.py
A lldb/test/API/macosx/branch-islands/foo.c
A lldb/test/API/macosx/branch-islands/main.c
A lldb/test/API/macosx/branch-islands/padding1.s
A lldb/test/API/macosx/branch-islands/padding2.s
A lldb/test/API/macosx/branch-islands/padding3.s
A lldb/test/API/macosx/branch-islands/padding4.s
Log Message:
-----------
Branch island debug (#139166)
This patch allows lldb to step in across "branch islands" which is the
Darwin linker's way of dealing with immediate branches to targets that
are too far away for the immediate slot to make the jump.
I submitted this a couple days ago and it failed on the arm64 bot. I was
able to match the bot OS and Tool versions (they are a bit old at this
point) and ran the test there but sadly it succeeded. The x86_64 bot
also failed but that was my bad, I did @skipUnlessDarwin when I should
have done @skipUnlessAppleSilicon.
So this resubmission is with the proper decoration for the test, and
with a bunch of debug output printed in case of failure. With any luck,
if this resubmission fails again I'll be able to see what's going on.
Commit: a25d38ddb74d6f7789daf2e7ead416054d2c6cd8
https://github.com/llvm/llvm-project/commit/a25d38ddb74d6f7789daf2e7ead416054d2c6cd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Correct the SDTypeProfile for RISCVISD::PROBED_ALLOCA (#139135)
Commit: e4b4a939f8852b2d5aab0d5b999890c7ef85be18
https://github.com/llvm/llvm-project/commit/e4b4a939f8852b2d5aab0d5b999890c7ef85be18
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
A llvm/test/CodeGen/SystemZ/pr137687.mir
Log Message:
-----------
[MCP] Disable BackwardCopyPropagateBlock for copies with implicit registers. (#137687)
If there's an implicit-def of a super register, the propagation
must preserve this implicit-def. Knowing how and when to do this
may require target specific knowledge so just disable it for now.
Prior to 2def1c4, we checked that the copy had explicit 2 operands
when that was removed we started allowing implicit operands through.
This patch adds a check for implicit operands, but still allows
extra explicit operands which was the goal of 2def1c4.
Fixes #131478.
Commit: 501dcab68ea978d8a3dbc46a8030b9227c4720de
https://github.com/llvm/llvm-project/commit/501dcab68ea978d8a3dbc46a8030b9227c4720de
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/pr139075.ll
Log Message:
-----------
[RISCV] Limit VLEN in getOptimalMemOpType to prevent creating invalid MVTs. (#139116)
We only guarantee that types that are 1024 bytes or smaller exist in the
MVT enum.
Fixes #139075.
Commit: 02139b140beff69edc376bd15a80e0670322085f
https://github.com/llvm/llvm-project/commit/02139b140beff69edc376bd15a80e0670322085f
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips32r6InstrInfo.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
Log Message:
-----------
MIPSr6: Set FMAXNUM and FMINNUM as Legal (#139009)
Now we define FMAXNUM and FMINNUM as IEEE754-2008 with +0.0>-0.0.
MIPSr6's fmax/fmin just follow this rules full.
FMAXNUM_IEEE and FMINNUM_IEEE will be removed in future once:
1. Fixes FMAXNUM/FMINNUM for all targets
2. The use of FMAXNUM_IEEE/FMINNUM_IEEE are not used by middle end
anymore.
Commit: abd5ee9355c2d3fd0df8bb0e57a0f2cf2f9fb435
https://github.com/llvm/llvm-project/commit/abd5ee9355c2d3fd0df8bb0e57a0f2cf2f9fb435
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
Log Message:
-----------
Revert "[Clang] Diagnose invalid function types in dependent contexts (#138731)" (#139176)
This reverts commit cf9b4d1e7961214deabd99a9fc3b1d4c9e78a71f.
Causes breakages as reported here:
https://github.com/llvm/llvm-project/pull/138731#issuecomment-2864298000
Commit: b6922b717045d3d1bd136b96f672533a498fd5aa
https://github.com/llvm/llvm-project/commit/b6922b717045d3d1bd136b96f672533a498fd5aa
Author: jimingham <jingham at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/test/API/macosx/branch-islands/TestBranchIslands.py
Log Message:
-----------
Add more logging so I can figure out why TestBranchIslands.py is (#139178)
failing but only on the bot.
Commit: 2299bada9f163df64083434754ebc4b353f562d5
https://github.com/llvm/llvm-project/commit/2299bada9f163df64083434754ebc4b353f562d5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.rst
R llvm/include/llvm/Object/OffloadBundle.h
M llvm/lib/Object/CMakeLists.txt
R llvm/lib/Object/OffloadBundle.cpp
R llvm/test/tools/llvm-objdump/Offloading/fatbin.test
M llvm/tools/llvm-objdump/OffloadDump.cpp
M llvm/tools/llvm-objdump/OffloadDump.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Object/CMakeLists.txt
R llvm/unittests/Object/OffloadingBundleTest.cpp
Log Message:
-----------
Revert "[llvm-objdump] Add support for HIP offload bundles (#114834)"
This reverts commit 06d6623bc304d5fc2fe11b80b62b4c5d10f9eaa1.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/145/builds/6871/steps/5/logs/stdio
Commit: c81341f7fd9a59bf6f960f9704dc7dc45c711a91
https://github.com/llvm/llvm-project/commit/c81341f7fd9a59bf6f960f9704dc7dc45c711a91
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn
Log Message:
-----------
[gn build] Port 2299bada9f16
Commit: b80c3c576f169326f55956985706816cf7b170eb
https://github.com/llvm/llvm-project/commit/b80c3c576f169326f55956985706816cf7b170eb
Author: jimingham <jingham at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/macosx/branch-islands/Makefile
Log Message:
-----------
Branch no lld (#139187)
I suspect the test may be failing because lld doesn't behave the same
way the native Darwin linker does. Trying that theory here...
Commit: 803fd732ae634b49c308e88e9b508fdbff664034
https://github.com/llvm/llvm-project/commit/803fd732ae634b49c308e88e9b508fdbff664034
Author: jimingham <jingham at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/test/API/macosx/branch-islands/TestBranchIslands.py
Log Message:
-----------
Branch island no dsym (#139191)
When we get to the branch island, we don't see the symbol for
it.
The only other thing I can think of that would be a dsymutil bug?
Let's try this just with dwarf, and then I'll have to revert all this
and see if I can reproduce this locally somehow.
Commit: 74120d0a389584bd8d74073fb0c0b80af29f0a4c
https://github.com/llvm/llvm-project/commit/74120d0a389584bd8d74073fb0c0b80af29f0a4c
Author: jimingham <jingham at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
R lldb/test/API/macosx/branch-islands/Makefile
R lldb/test/API/macosx/branch-islands/TestBranchIslands.py
R lldb/test/API/macosx/branch-islands/foo.c
R lldb/test/API/macosx/branch-islands/main.c
R lldb/test/API/macosx/branch-islands/padding1.s
R lldb/test/API/macosx/branch-islands/padding2.s
R lldb/test/API/macosx/branch-islands/padding3.s
R lldb/test/API/macosx/branch-islands/padding4.s
Log Message:
-----------
Revert branch island experiments (#139192)
This test is failing because when we step to what is the branch island
address and ask for its symbol, we can't resolve the symbol, and just
call it the last padding symbol plus a bajillion.
That has nothing to do with the changes in this patch, but I'll revert
this and keep trying to figure out why symbol reading on this bot is
wrong.
Commit: 035dcf6a2a706288c8abe1017c965a1033fca800
https://github.com/llvm/llvm-project/commit/035dcf6a2a706288c8abe1017c965a1033fca800
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/Driver/OffloadBundler.cpp
M clang/test/Driver/clang-offload-bundler-standardize.c
Log Message:
-----------
[HIP] fix bundle ID for amdgcnspirv (#139112)
Currently ROCm 6.4.0 only recognize spirv64-amd-amdhsa- in bundle ID.
spirv64-amd-amdhsa-unknown causes all HIP apps compiled for amdgcnspirv
to fail.
Previously we fixed a similar issue for
amdgcn-amd-amdhsa-unknown. This patch extends that to
spirv64-amd-amdhsa-unknown.
Commit: 8e895b50b9bc71bbdae92b1dea7189216b7764ab
https://github.com/llvm/llvm-project/commit/8e895b50b9bc71bbdae92b1dea7189216b7764ab
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
A llvm/docs/MLGO.rst
M llvm/docs/Reference.rst
Log Message:
-----------
[MLGO][Docs] Add initial skeleton of MLGO docs
This adds an initial skeleton of the MLGO docs. This is intended to be
fleshed out over the next couple days as we work on filling out the
relevant sections on the tooling/features that are available in upstream
LLVM.
Reviewers: efriedma-quic, mtrofin
Reviewed By: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/139177
Commit: 7c7ea1e0eb9fcaf39aefa05cb88f85b771afae25
https://github.com/llvm/llvm-project/commit/7c7ea1e0eb9fcaf39aefa05cb88f85b771afae25
Author: no92 <no92 at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/ADT/bit.h
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[llvm] Add managarm support (#138854)
This PR is part of a series to upstream managarm support, as laid out in
the
[RFC](https://discourse.llvm.org/t/rfc-new-proposed-managarm-support-for-llvm-and-clang-87845/85884/1).
This PR is a follow-up to #87845.
The intention here is to add the managarm target to the LLVM support
lib, in preparation for a follow-up that would add the missing clang
driver bits.
Commit: 4bcc083a72248bbf5bb4aaf70ba8008cfd9630e9
https://github.com/llvm/llvm-project/commit/4bcc083a72248bbf5bb4aaf70ba8008cfd9630e9
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/Format/DefinitionBlockSeparator.cpp
M clang/unittests/Format/DefinitionBlockSeparatorTest.cpp
Log Message:
-----------
[clang-format] Handle C# where clause in SeparateDefinitionBlocks (#139034)
Fix #61956
Commit: db2d5762ebf61b95b0e414b461db68ac49d06b8c
https://github.com/llvm/llvm-project/commit/db2d5762ebf61b95b0e414b461db68ac49d06b8c
Author: MingYan <99472920+NexMing at users.noreply.github.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/test/Fir/affine-promotion.fir
Log Message:
-----------
[flang][fir] Support promoting `fir.do_loop` with results to `affine.for`. (#137790)
Co-authored-by: yanming <ming.yan at terapines.com>
Commit: 78cc822aa6f5af0eda55089d22ba915b6d8e0216
https://github.com/llvm/llvm-project/commit/78cc822aa6f5af0eda55089d22ba915b6d8e0216
Author: lntue <lntue at google.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/acos.cpp
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/asin_utils.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/acos_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/acos_test.cpp
Log Message:
-----------
[libc][math] Implement double precision acos correctly rounded for all rounding modes. (#138308)
We reduce computation of `acos` to `asin` as follow:
When `|x| < 0.5`:
```math
acos(x) = \frac{\pi}{2} - asin(x).
```
For `0.5 <= |x| < 1`, let
```math
u = \frac{1 - \left| x \right|}{2},
```
then
```math
acos(x) = \begin{cases}
2 \cdot asin \left( \sqrt{u} \right) &, 0.5 \leq x < 1 \\
\pi - 2 \cdot asin \left( \sqrt{u} \right) &, -1 < x \leq 0.5
\end{cases}
```
Commit: 4190d6cc379a061e9d9ee9563a6f47a062a2ceef
https://github.com/llvm/llvm-project/commit/4190d6cc379a061e9d9ee9563a6f47a062a2ceef
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/mul.ll
Log Message:
-----------
[NFC][RISCV] Add more test cases for multiplication (#139195)
Commit: d915355ef88e24b1b06192b8f878e2079f9f6165
https://github.com/llvm/llvm-project/commit/d915355ef88e24b1b06192b8f878e2079f9f6165
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/mul-expand.ll
Log Message:
-----------
[NFC][RISCV] Pre-commit tests for RVI constant multiplication expansion (#139200)
Commit: d926ec35b73b3952806fb6ee6af6bf2990729c26
https://github.com/llvm/llvm-project/commit/d926ec35b73b3952806fb6ee6af6bf2990729c26
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/test/CodeGen/X86/asm-modifier.ll
Log Message:
-----------
[X86] Asm modifier %a: add (%rip) for 64-bit static relocation model
In GCC,
```
static int a;
int foo() {
asm("# %a0" : : "i"(&a));
}
```
lowers to `# a(%rip)` regardless of the PIC mode. This PR follow suits
for ELF -fno-pic, matching ELF -fpic (asm-modifier-pic.ll) and Mach-O
(which defaults to PIC).
Close https://github.com/llvm/llvm-project/issues/139001
Pull Request: https://github.com/llvm/llvm-project/pull/139040
Commit: 823b1a582258f1417c648b3117ba08edc4855c68
https://github.com/llvm/llvm-project/commit/823b1a582258f1417c648b3117ba08edc4855c68
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/include/clang/InstallAPI/DylibVerifier.h
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.h
M clang/lib/InstallAPI/DylibVerifier.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-installapi/Options.cpp
Log Message:
-----------
[clang-installapi] Store dylib attributes in the order they are passed on the command line. (#139087)
With the introduction of tbd-v5 holding rpaths, the order in which those
attributes are passed to `clang-installapi` must be represented in tbd
files. Previously, all dylib attributes were stored in a
non-deterministic `StringMap`. Instead, hold them in a custom collection
with an underlying vector to continue supporting searching by attribute.
This makes the order of all diagnostics related to load command
comparisons stable.
This approach resolves errors when building with reverse-iteration.
Commit: 74e5a3b61e87c8c2b830286796b72dda67942b6b
https://github.com/llvm/llvm-project/commit/74e5a3b61e87c8c2b830286796b72dda67942b6b
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M clang/lib/AST/DeclBase.cpp
A clang/test/Driver/attr-availability-erroneous-diags.c
Log Message:
-----------
[clang] Remove "unknown" from availability diags (#138610)
Previously, diagnostics like `error: 'fNew' is unavailable: introduced
in macOS 11 unknown` were getting emitted when the active target triple
didn't have an environment tied to it. Instead, add a guard against this
to avoid the `unknown`.
Commit: a1beb619403a781153c170f041f39a3bac1cebb7
https://github.com/llvm/llvm-project/commit/a1beb619403a781153c170f041f39a3bac1cebb7
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cos-1.ll
A llvm/test/Transforms/InstCombine/simplify-intrinsics.ll
Log Message:
-----------
[SimplifyLibCalls] Shrink sin, cos to sinf, cosf when allowed (#139082)
This optimization already exists, but for the libcall versions of these
functions and not for their intrinsic form.
Solves https://github.com/llvm/llvm-project/issues/139044.
There are probably more opportunities for other intrinsics, because the
switch-case in `LibCallSimplifier::optimizeCall` covers only `pow`,
`exp2`, `log`, `log2`, `log10`, `sqrt`, `memset`, `memcpy` and
`memmove`.
Commit: f7c01c40457c2f0fd20ab59244738ed61d4e989c
https://github.com/llvm/llvm-project/commit/f7c01c40457c2f0fd20ab59244738ed61d4e989c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
Log Message:
-----------
[clang][bytecode] Reorder type checks in classify() (#139046)
Move the member pointer check further below and remove Complex/Vector
type checks and instead rely on the final return to handle those.
Commit: c0f5b0a62b2a90883baabfb7d1fd0db560f9fc5d
https://github.com/llvm/llvm-project/commit/c0f5b0a62b2a90883baabfb7d1fd0db560f9fc5d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/Type.cpp
Log Message:
-----------
[clang][NFC] Use BuiltinType::isFloatingPoint() in Type::isFloatingType() (#139035)
They both used to do the same comparison of getKind() to Half and
Ibm128.
Commit: cfb057a2c49a78138d4e452d2ad518f2a7db8015
https://github.com/llvm/llvm-project/commit/cfb057a2c49a78138d4e452d2ad518f2a7db8015
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
Log Message:
-----------
[LoongArch] Lower [x]vshuf.d to [x]vshuf4i.d if possible. (#137918)
Commit: 3b9b377f6df78c390815a54786b742d96ccd11f0
https://github.com/llvm/llvm-project/commit/3b9b377f6df78c390815a54786b742d96ccd11f0
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/detach01.f90
A flang/test/Semantics/OpenMP/detach02.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang] [OpenMP] Add semantic checks for detach clause in task (#119172)
Fixes:
- Add semantic checks along with the tests
- Move the detach clause to allowedOnceClauses list in Task construct
Restrictions:\
OpenMP 5.0: Task construct
- At most one detach clause can appear on the directive.
- If a detach clause appears on the directive, then a mergeable clause
cannot appear on the same directive.
OpenMP 5.2: Detach contruct
- If a detach clause appears on a directive, then the encountering task
must not be a final task.
- A variable that appears in a detach clause cannot appear as a list
item on a data-environment attribute clause on the same construct.
- A variable that is part of another variable (as an array element or a
structure element) cannot appear in a detach clause.
- event-handle must not have the POINTER attribute.
Commit: d2c5fbe9ea14bdcd0008691b76a562ff69f04b99
https://github.com/llvm/llvm-project/commit/d2c5fbe9ea14bdcd0008691b76a562ff69f04b99
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
Log Message:
-----------
[AMDGPU] Legalize vector fminimum and fmaximum with VOP3P (#138971)
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: c38910bbb963c40e99d150ed456acdc10be4cd38
https://github.com/llvm/llvm-project/commit/c38910bbb963c40e99d150ed456acdc10be4cd38
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/test/Target/SPIRV/decorations.mlir
Log Message:
-----------
[mlir][spirv] Add support for RelaxedPrecision in function arguments (#138685)
With the current implementation only one attribute is attached to the
argument and the deserializer fails if more decorations are specified,
however I believe that the spec does not prohibit having both
`Aliased`/`Restrict` and `RelaxedPrecision`. I am not sure how to attach
multiple attributes to a single argument with the current code and at
the same time I do not have a use case for it, so I think the patch in
the current state is a good starting point and can be extended in the
future.
Commit: ad66b5a62d0e811f4a90df6becaa0ac36757b682
https://github.com/llvm/llvm-project/commit/ad66b5a62d0e811f4a90df6becaa0ac36757b682
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV][Peephole] Clear kill flags for registers after foldUndefPassthruVMV_V_V (#138847)
Without clearing kill flags, this pass will generate bad machine code.
```
*** Bad machine code: Using a killed virtual register ***
- function: main
- basic block: %bb.0 entry (0x437ef928)
- instruction: %12:vrn7m1 = INSERT_SUBREG %11:vrn7m1(tied-def 0), %0:vr, %subreg.sub_vrm1_0
- operand 2: %0:vr
```
Commit: 07f36f21e9bf4024b5fdbe12b0d815aef3fac914
https://github.com/llvm/llvm-project/commit/07f36f21e9bf4024b5fdbe12b0d815aef3fac914
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
Log Message:
-----------
AMDGPU: Add baseline tests for fneg with min/max intrinsics (#139132)
Copy the minnum and maxnum tests into versions with minimum/maximum
and minimumnum/maximumnum.
Commit: 912df60b08f6cbeaa1a5a27f7bc3628726842885
https://github.com/llvm/llvm-project/commit/912df60b08f6cbeaa1a5a27f7bc3628726842885
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
Log Message:
-----------
AMDGPU: Handle minimumnum/maximumnum in fneg combines (#139133)
Commit: 458e2416ca2cbe80bbdb0808811c3f6999c958f7
https://github.com/llvm/llvm-project/commit/458e2416ca2cbe80bbdb0808811c3f6999c958f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
A llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
Log Message:
-----------
AMDGPU: Add baseline tests for min3/max3 from minimumnum/maximumnum (#139136)
Commit: f13ff778424bb4e3c87d876a759d0a8a4bc61167
https://github.com/llvm/llvm-project/commit/f13ff778424bb4e3c87d876a759d0a8a4bc61167
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
Log Message:
-----------
AMDGPU: Form min3/max3 from minimumnum/maximumnum (#139137)
Commit: 6cf84e036e84bc134c05185477a2a3853e2d6140
https://github.com/llvm/llvm-project/commit/6cf84e036e84bc134c05185477a2a3853e2d6140
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
AMDGPU: Test more subtargets in minimumnum/maximumnum tests (#139144)
Commit: e4751d5cbcac9ec411a17d9bb02ead8b55bfefd3
https://github.com/llvm/llvm-project/commit/e4751d5cbcac9ec411a17d9bb02ead8b55bfefd3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (#139145)
With the IEEE bit disabled, the hardware instructions have the
same behavior as these operations.
Commit: 03d3e6dbe9e7a0c64e6c62b583bb187723421717
https://github.com/llvm/llvm-project/commit/03d3e6dbe9e7a0c64e6c62b583bb187723421717
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-05-08 (Thu, 08 May 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/ObjectYAML/DXContainer/RootSignature-Descriptor1.0.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-Descriptor1.1.yaml
M llvm/test/ObjectYAML/DXContainer/RootSignature-MultipleParameters.yaml
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (#137259)
closes: [126634](https://github.com/llvm/llvm-project/issues/126634)
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: d2b012e3913a56d3cb2d9798bf77dc2599148dfb
https://github.com/llvm/llvm-project/commit/d2b012e3913a56d3cb2d9798bf77dc2599148dfb
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
Log Message:
-----------
[Clang][CodeGen] Enable pointer overflow check for GCC workaround (#137849)
Do not suppress the pointer overflow check for the `(i8*) nullptr + N`
idiom.
Related issue: https://github.com/llvm/llvm-project/issues/137833
Commit: 52924a2d7255cdd280b2b82dad8616e01fe065da
https://github.com/llvm/llvm-project/commit/52924a2d7255cdd280b2b82dad8616e01fe065da
Author: jeremyd2019 <github at jdrake.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
A clang/lib/Driver/ToolChains/Cygwin.cpp
A clang/lib/Driver/ToolChains/Cygwin.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/bin/as
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/bin/ld
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/lib/.keep
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/lib/gcc/i686-pc-msys/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/lib/gcc/x86_64-pc-cygwin/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/bin/as
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/bin/ld
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/lib/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/include/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/lib/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/i686-pc-cygwin/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/i686-pc-cygwin/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/x86_64-pc-msys/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/x86_64-pc-msys/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/i686-pc-cygwin/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/i686-pc-cygwin/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/x86_64-pc-msys/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/x86_64-pc-msys/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/i686-pc-cygwin/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/x86_64-pc-msys/.keep
A clang/test/Driver/cygwin.cpp
Log Message:
-----------
[Clang] [Driver] add a Cygwin ToolChain (#135691)
Add a new Cygwin toolchain that just goes through the motions to
initialize the Generic_GCC base properly. This allows removing some old,
almost certainly wrong hard-coded paths from Lex/InitHeaderSearch.cpp.
MSYS2 (GCC triple (arch)-pc-msys) is a fork of Cygwin (GCC triple
(arch)-pc-cygwin), and this driver can be used for either.
Add a simple test for this driver.
Commit: 7439d7bdf5aa0069c91693ec590561f234d05c20
https://github.com/llvm/llvm-project/commit/7439d7bdf5aa0069c91693ec590561f234d05c20
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Slightly optimize integral casts of literals (#138879)
We often see initializers like
unsigned a = 10;
which take an integer literal and immediately cast it to another type.
Recognize this pattern and omit the cast, simply emitting the value as a
different type directly.
This reduces the instruction count by up to 0.13%:
http://llvm-compile-time-tracker.com/compare.php?from=303436c6d16518b35288d63a859506ffcc1681e4&to=648f5202f906d1606390b2d1081e4502dc74acc2&stat=instructions:u
Commit: d35ad58859c97521edab7b2eddfa9fe6838b9a5e
https://github.com/llvm/llvm-project/commit/d35ad58859c97521edab7b2eddfa9fe6838b9a5e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
[clang][ExprConst] Check for array size of initlists (#138673)
Fixes #138653
Commit: 145aa66f689c24c0cf2fffd995ba83678cfaa310
https://github.com/llvm/llvm-project/commit/145aa66f689c24c0cf2fffd995ba83678cfaa310
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 52924a2d7255
Commit: 5f530b134ca6a87f2a6cb0f29fadcd3fbd0cf962
https://github.com/llvm/llvm-project/commit/5f530b134ca6a87f2a6cb0f29fadcd3fbd0cf962
Author: Iris Shi <0.0 at owo.li>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Log Message:
-----------
[NFC] Cleanup dead code in `LoadStoreVectorizer.cpp` (#139211)
Closes #138691
Commit: cc281584a11af258107b5ea702a8837da8c465fd
https://github.com/llvm/llvm-project/commit/cc281584a11af258107b5ea702a8837da8c465fd
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
Revert "[clang][ExprConst] Check for array size of initlists (#138673)"
This reverts commit d35ad58859c97521edab7b2eddfa9fe6838b9a5e.
This breaks the clang build:
https://lab.llvm.org/buildbot/#/builders/132/builds/1033
/home/buildbot-worker/bbroot/clang-riscv-rva23-evl-vec-2stage/stage2/lib/Target/RISCV/RISCVGenGlobalISel.inc:1512:44: note: cannot allocate array; evaluated array bound 2431270 exceeds the limit (1048576); use '-fconstexpr-steps' to increase this limit
Commit: 60b62c65bd693fa104d913bb401de3b992902520
https://github.com/llvm/llvm-project/commit/60b62c65bd693fa104d913bb401de3b992902520
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Move the event and progress event threads into DAP (NFC) (#139167)
Commit: b0979b8c65d76cc1897e97b9ad091d8d99abdd18
https://github.com/llvm/llvm-project/commit/b0979b8c65d76cc1897e97b9ad091d8d99abdd18
Author: Lang Hames <lhames at apple.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcError.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcError.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/main-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/duplicate-definition-error.test
Log Message:
-----------
[ORC] Add optional context string to duplicate symbol definition errors.
The context string can be added to indicate the source of the duplicate
definition. E.g. if the context is set to "foo2.o", then:
"Duplicate definition of symbol 'foo'"
becomes
"In foo2.o, duplicate definition of symbol 'foo'".
The JITDylib::defineImpl method is updated to use the name of the
MaterializationUnit being added as the context string for duplicate definition
errors. The JITDylib::defineMaterializing method is updated to use
"defineMaterializing operation" as the conext string.
Commit: fff12fbdb9a20d353cc578076232dcb3f5c60586
https://github.com/llvm/llvm-project/commit/fff12fbdb9a20d353cc578076232dcb3f5c60586
Author: David Green <david.green at arm.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
Log Message:
-----------
[VectorCombine] Fix the type used in foldShuffleOfIntrinsics Cost. (#138419)
The shuffle needn't be twice the original number of vector elements, so
the intermediate type used between the shuffle and the intrinsic should
use the ShuffleDstTy number of elements.
I found this when looking at shuffle costs and do not have test where it
alters the output, but have added some cases where the shuffle output is
not twice the size of the input.
Commit: 9d5a5424f0356bd6ee01c751dd6957299783b41b
https://github.com/llvm/llvm-project/commit/9d5a5424f0356bd6ee01c751dd6957299783b41b
Author: Yuta Mukai <mukai.yuta at fujitsu.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[AArch64] Fix feature list for FUJITSU-MONAKA processor (#139212)
FEAT_FP8DOT4 and FEAT_FP8FMA are supported by FUJITSU-MONAKA. These were
previously enabled due to dependencies, but now require explicit
activation due to modifications in the dependencies.
Commit: 2e436b15d30689c4525da3c8d4467a1c70e509f5
https://github.com/llvm/llvm-project/commit/2e436b15d30689c4525da3c8d4467a1c70e509f5
Author: Martin Storsjö <martin at martin.st>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] [SEH] Implement parsing of aarch64 pdata/xdata (#137949)
This is needed for forced unwind, for some testcases in
libunwind/libcxxabi.
This adds an aarch64 case for extracting the LanguageHandler and
HandlerData fields from unwind info, in UnwindCursor::getInfoFromSEH,
corresponding to the existing case for x86_64.
This uses the struct IMAGE_ARM64_RUNTIME_FUNCTION_ENTRY_XDATA; this only
became available in WinSDK 10.0.19041.0 and mingw-w64 v11.0 (or a
mingw-w64 git snapshot after April 2023).
(This is only a build-time requirement though; the format for the unwind
data has been fixed since the start of Windows 10 on ARM64, so this
doesn't impose any runtime requirement.)
Commit: 458991197d252e28ce4720a0770ef7d183435eeb
https://github.com/llvm/llvm-project/commit/458991197d252e28ce4720a0770ef7d183435eeb
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEVPatternMatch] Extend with more matchers (#138836)
Commit: 68dccb9fa0b09b3485acfc0d436c1d66a4089b8f
https://github.com/llvm/llvm-project/commit/68dccb9fa0b09b3485acfc0d436c1d66a4089b8f
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Strip dead code in getStrideFromPointer (NFC) (#139140)
The SCEV multiply by 1 doesn't make sense, because SCEV would fold it:
therefore, the OrigPtr == Ptr branch effectively rejects a multiply.
However, in this branch, we have a pointer SCEV that cannot be a
multiply, and hence the code the code is dead. Strip it.
Commit: 08b3617b9f413c9225e9e985bc671fa46ff9e570
https://github.com/llvm/llvm-project/commit/08b3617b9f413c9225e9e985bc671fa46ff9e570
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/fp-max-min.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
Log Message:
-----------
LoongArch: Set FMAXNUM and FMINNUM as Legal (#139010)
Now we define FMAXNUM and FMINNUM as IEEE754-2008 with +0.0>-0.0.
LoongArch's fmax/fmin just follow this rules full.
FMAXNUM_IEEE and FMINNUM_IEEE will be removed in future once:
Fixes FMAXNUM/FMINNUM for all targets
The use of FMAXNUM_IEEE/FMINNUM_IEEE are not used by middle end anymore.
Commit: 76b3adabea10f5224109138e890770f18edbff48
https://github.com/llvm/llvm-project/commit/76b3adabea10f5224109138e890770f18edbff48
Author: David Green <david.green at arm.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/or-shift-chain.ll
Log Message:
-----------
[AggressiveInstCombine] Add test for shifts from or chains. NFC
Commit: 92d2e13b99ba1770e6307af7ed7ee877bfabde8c
https://github.com/llvm/llvm-project/commit/92d2e13b99ba1770e6307af7ed7ee877bfabde8c
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/include/flang/Frontend/CompilerInstance.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/multiple-fc1-input.f90
Log Message:
-----------
[flang][driver] do not crash when fc1 process multiple files (#138875)
This is a fix for the issue https://github.com/llvm/llvm-project/issues/137126
that turned out to be a driver issue.
FrontendActions has a loop to process multiple input files and `flang -fc1`
accept multiple files, but the semantic, lowering, and llvm codegen
actions were not re-entrant, and crash or weird behaviors occurred
when processing multiple files with `-fc1`.
This patch makes the actions reentrant by cleaning-up the contexts/modules
if needed on entry.
Commit: 95d440cc7c398dbba8ac27af8e1690460b4e88bf
https://github.com/llvm/llvm-project/commit/95d440cc7c398dbba8ac27af8e1690460b4e88bf
Author: fossdd <fossdd at pwned.life>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] skip reoptimization tests on ARM (#130178)
It failed on armv7 with "Architecture not supported" which is due to
StubTests being not supported on ARM
/builds/fossdd/aports/main/llvm20/src/llvm-project-20.1.0.src/llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp:140:
Failure
Value of: llvm::detail::TakeError(RM.takeError())
Expected: succeeded
Actual: failed (Architecture not supported) (of type
llvm::detail::ErrorHolder)
Commit: 36bb17aa6544c1f62309a6162555262f282e1d13
https://github.com/llvm/llvm-project/commit/36bb17aa6544c1f62309a6162555262f282e1d13
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/sve2-xar.ll
M llvm/test/CodeGen/AArch64/xar.ll
Log Message:
-----------
[AArch64] Utilize `XAR` for certain vector rotates (#137629)
Resolves #137162
For cases when there isn't any `XOR` in the transformation, replace with
a zero register.
Commit: cdde6a650a0773e672c81b61aa53d9af2c92d2b2
https://github.com/llvm/llvm-project/commit/cdde6a650a0773e672c81b61aa53d9af2c92d2b2
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[MISched] Add statistics for heuristics (#137981)
When diagnosing scheduling issues it can be useful to know which
heuristics are driving the scheduler. This adds pre-RA and post-RA
statistics for all heuristics.
Commit: 66d3980b53086f787d0236814c3cc34fc568e25e
https://github.com/llvm/llvm-project/commit/66d3980b53086f787d0236814c3cc34fc568e25e
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
Log Message:
-----------
[AMDGPU][NFC] Remove _DEFERRED operands. (#139123)
All immediates are deferred now.
Commit: 370aecb9572477f7b6bdd6243c80b53f384e0b84
https://github.com/llvm/llvm-project/commit/370aecb9572477f7b6bdd6243c80b53f384e0b84
Author: JP Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcError.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcError.cpp
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/main-ret-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/duplicate-definition-error.test
Log Message:
-----------
Revert "[ORC] Add optional context string to duplicate symbol definition errors."
Broke buildbots: https://lab.llvm.org/buildbot/#/builders/10/builds/5025
This reverts commit b0979b8c65d76cc1897e97b9ad091d8d99abdd18.
Commit: c255a313374384b8444c83ec33094d7c806d4b2a
https://github.com/llvm/llvm-project/commit/c255a313374384b8444c83ec33094d7c806d4b2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
Log Message:
-----------
GlobalISel: Handle fminimumnum/fmaximumnum in SelectionDAGCompat (#139148)
Commit: e854c381c6344b2ff8d1b58aa97008b4ecd9a9c5
https://github.com/llvm/llvm-project/commit/e854c381c6344b2ff8d1b58aa97008b4ecd9a9c5
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Manage noalias/alias_scope metadata in VPlan. (#136450)
Use VPIRMetadata added in
https://github.com/llvm/llvm-project/pull/135272
to also manage no-alias metadata added by versioning.
Note that this means we have to build the no-alias metadata up-front
once. If it is not used, it will be discarded automatically.
This also fixes a case where incorrect metadata was added to wide
loads/stores that got converted from an interleave group.
Compile-time impact is neutral:
https://llvm-compile-time-tracker.com/compare.php?from=38bf1af41c5425a552a53feb13c71d82873f1c18&to=2fd7844cfdf5ec0f1c2ce0b9b3ae0763245b6922&stat=instructions:u
Commit: 89d13f87c736d1a341959d03f3f9e5e65b95ebf5
https://github.com/llvm/llvm-project/commit/89d13f87c736d1a341959d03f3f9e5e65b95ebf5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/AssumeBundleQueries.h
M llvm/lib/Analysis/AssumeBundleQueries.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
Log Message:
-----------
Analysis: Remove no-AssumptionCache path in getKnowledgeForValue (#139232)
As requested in https://github.com/llvm/llvm-project/pull/138961#discussion_r2078483175
Commit: 234ae9bfd97e6942193d152ae57ebba5d1b7c584
https://github.com/llvm/llvm-project/commit/234ae9bfd97e6942193d152ae57ebba5d1b7c584
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.noglobals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.transitiveglobals.expected
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/update_test_checks.py
Log Message:
-----------
update_test_checks: indent dbg records (#139230)
LLVM prints debug records like `#dbg_value` indented 2 additional spaces.
Commit: fd8b84ea0fa1eb1da105257f419d926278dc0445
https://github.com/llvm/llvm-project/commit/fd8b84ea0fa1eb1da105257f419d926278dc0445
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M lldb/test/Shell/Commands/command-list-reach-beginning-of-file.test
M lldb/test/Shell/Commands/command-list-reach-end-of-file.test
Log Message:
-----------
[lldb][test] Skip beginning/end of file tests on Windows
Added in https://github.com/llvm/llvm-project/pull/137515,
as the source uses unistd.h which isn't present there.
| C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\Shell\Commands/Inputs/sigchld.c:4:10: fatal error: 'unistd.h' file not found
| 4 | #include <unistd.h>
| | ^~~~~~~~~~
| 1 error generated.
Commit: f9f2bf8e5e5c266a51b4ec6d23317a7e3dfeb670
https://github.com/llvm/llvm-project/commit/f9f2bf8e5e5c266a51b4ec6d23317a7e3dfeb670
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/MSP430/CMakeLists.txt
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.h
A llvm/lib/Target/MSP430/MSP430SelectionDAGInfo.cpp
A llvm/lib/Target/MSP430/MSP430SelectionDAGInfo.h
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.h
Log Message:
-----------
[MSP430] TableGen-erate SDNode descriptions (#138878)
This consolidates node definitions into one place and enables automatic
node verification.
Part of #119709.
Commit: 187a83f86caef2cbeb0b4aaa1f15e507c3f99763
https://github.com/llvm/llvm-project/commit/187a83f86caef2cbeb0b4aaa1f15e507c3f99763
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/tile_messages.cpp
Log Message:
-----------
[OpenMP] No long crash on an invalid sizes argument (#139118)
We were trying to get type information out of an expression node which
contained errors. That causes the type of the expression to be
dependent, which the code was not expecting. Now we handle error
conditions with an early return.
Fixes #139073
Commit: 4923cffc1d3333cf679dd304dd6a8e7232d77d54
https://github.com/llvm/llvm-project/commit/4923cffc1d3333cf679dd304dd6a8e7232d77d54
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Transforms/debug-107988.fir
M flang/test/Transforms/debug-96314.fir
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-assumed-rank-array.fir
M flang/test/Transforms/debug-assumed-shape-array-2.fir
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-char-type-1.fir
M flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-2.fir
M flang/test/Transforms/debug-extra-global.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-index-type.fir
M flang/test/Transforms/debug-line-table-existing.fir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table-inc-same-file.fir
M flang/test/Transforms/debug-line-table.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-1.fir
M flang/test/Transforms/debug-ptr-type.fir
M flang/test/Transforms/debug-ref-type.fir
M flang/test/Transforms/debug-tuple-type.fir
M flang/test/Transforms/debug-variable-array-dim.fir
M flang/test/Transforms/debug-variable-char-len.fir
M flang/test/Transforms/debug-vector-type.fir
Log Message:
-----------
[Flang] Add missing dependency to AddDebugInfo pass (#139099)
The `AddDebugInfo` pass currently has a dependency on the `DLTI` MLIR
dialect caused by a call to the `fir::support::getOrSetMLIRDataLayout()`
utility function.
This dependency is not captured in the pass definition. This patch adds
the dependency and simplifies several unit tests that had to explicitly
use the `DLTI` dialect to prevent the missing dependency from causing
compiler failures.
Commit: 61a8da9367dc7949f36916749f6038453ea4197f
https://github.com/llvm/llvm-project/commit/61a8da9367dc7949f36916749f6038453ea4197f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/Expr.cpp
A clang/test/CodeGen/glibc_ptr_align.c
Log Message:
-----------
[Clang][CodeGen] Add workaround for old glibc `__PTR_ALIGN` macro (#137851)
This patch adds a workaround for the old glibc `__PTR_ALIGN` macro:
```
((sizeof(long int) < sizeof(void *) ? (base) : (char *)0) +
(((pointer) - (sizeof(long int) < sizeof(void *) ? (base) : (char *)0) +
(align_mask)) &
~(align_mask)));
```
Closes https://github.com/llvm/llvm-project/issues/137833.
Commit: ca6c6f1dfb03571dda8d8bca15b8df7d2983d4dc
https://github.com/llvm/llvm-project/commit/ca6c6f1dfb03571dda8d8bca15b8df7d2983d4dc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenCXX/attr-x86-no_caller_saved_registers.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/default_calling_conv.cpp
M clang/test/CodeGenCXX/mangle-ms.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Sema/no-warn-missing-prototype.c
Log Message:
-----------
[clang] UEFI do not mangle main (#139179)
Entry point functions such as main, wmain etc. should not be mangled for
UEFI targets.
Commit: 7618ce880dc1bc1b5d1d47dba4dcc557e42c72df
https://github.com/llvm/llvm-project/commit/7618ce880dc1bc1b5d1d47dba4dcc557e42c72df
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] port f9f2bf8e5e5c266a51b4ec6d23317a7e3dfeb670
Commit: dd42112c82d7b12669513dca4048167664b211b2
https://github.com/llvm/llvm-project/commit/dd42112c82d7b12669513dca4048167664b211b2
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-numtasks.f90
Log Message:
-----------
[Flang][OpenMP] MLIR lowering support for grainsize and num_tasks clause (#128490)
- Added MLIR lowering for grainsize and num_tasks clauses of taskloop construct.
Commit: b291cfcad4815568dc1eaca58185d25dceed3f1c
https://github.com/llvm/llvm-project/commit/b291cfcad4815568dc1eaca58185d25dceed3f1c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Lower/OpenMP/optional-argument-map-2.f90
A offload/test/offloading/fortran/optional-mapped-arguments-2.f90
Log Message:
-----------
[Flang][OpenMP] Generate correct present checks for implicit maps of optional allocatables (#138210)
Currently, we do not generate the appropriate checks to check if an
optional
allocatable argument is present before accessing relevant components of
it,
in particular when creating bounds, we must generate a presence check
and we
must make sure we do not generate/keep an load external to the presence
check
by utilising the raw address rather than the regular address of the info
data structure.
Similarly in cases for optional allocatables we must treat them like
non-allocatable
arguments and generate an intermediate allocation that we can have as a
location
in memory that we can access later in the lowering without causing
segfaults when
we perform "mapping" on it, even if the end result is an empty
allocatable
(basically, we shouldn't explode if someone tries to map a non-present
optional,
similar to C++ when mapping null data).
Commit: 416cdcf3aa75ea6a6dd4fe6f76a8d7251e06e0b3
https://github.com/llvm/llvm-project/commit/416cdcf3aa75ea6a6dd4fe6f76a8d7251e06e0b3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
clang/OpenCL: Fix special casing OpenCL in call emission (#138864)
This essentially reverts 1bf1a156d673.
OpenCL's handling of address spaces has always been a mess, but it's
better than it used to be so this hack appears to be unnecessary now.
None of the code here should really depend on the language or language
address space. The ABI address space to use is already explicit in the
ABIArgInfo, so use that instead of guessing it has anything to do with
LangAS::Default or getASTAllocaAddressSpace.
The below usage of LangAS::Default and getASTAllocaAddressSpace are also
suspect, but appears to be a more involved and separate fix.
Commit: e8898a6275965a5277d4d3ee852b34507e81a77f
https://github.com/llvm/llvm-project/commit/e8898a6275965a5277d4d3ee852b34507e81a77f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
clang: Read the address space from the ABIArgInfo (#138865)
Do not assume it's the alloca address space, we have an explicit
address space to use for the argument already. Also use the original
value's type instead of assuming DefaultAS.
Commit: c64c64db7b4b30dc5c5fad3b854f567254d1a615
https://github.com/llvm/llvm-project/commit/c64c64db7b4b30dc5c5fad3b854f567254d1a615
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/memory/TestDAP_memory.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
Log Message:
-----------
[lldb][lldb-dap] Disable more tests on Windows (#139251)
These are currently failing on Windows on Arm:
https://lab.llvm.org/buildbot/#/builders/141/builds/8556
```
********************
Unresolved Tests (1):
lldb-api :: tools/lldb-dap/memory/TestDAP_memory.py
********************
Failed Tests (1):
lldb-api :: tools/lldb-dap/variables/TestDAP_variables.py
```
Commit: 5ae2aed218470783e6c7a2d255c7946f4549cb46
https://github.com/llvm/llvm-project/commit/5ae2aed218470783e6c7a2d255c7946f4549cb46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
Log Message:
-----------
clang: Remove dest LangAS argument from performAddrSpaceCast (#138866)
It isn't used and is redundant with the result pointer type argument.
A more reasonable API would only have LangAS parameters, or IR parameters,
not both. Not all values have a meaningful value for this. I'm also
not sure why we have this at all, it's not overridden by any targets and
further simplification is possible.
Commit: 7948b39d2bf76c2fd7e50c312e01afddb620f414
https://github.com/llvm/llvm-project/commit/7948b39d2bf76c2fd7e50c312e01afddb620f414
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/docs/TestSuiteGuide.md
Log Message:
-----------
[llvm][docs] Small improvements to llvm-test-suite doc (#139083)
* Mention earlier that the C++ compiler will be inferred from the C
compiler setting. It does say this later, but a mention earlier will
save people (aka me) from wondering why we don't set CMAKE_CXX_COMPILER.
* Mention earlier the compile only TEST_SUITE_RUN_BENCHMARKS=OFF
setting, as it's a common use case. We already say the consequences of
doing that, but not actually how to enable it until later in the doc.
* Reorder that text to make more sense.
* Make it into a proper Sphinx note block.
Commit: 6ade80ce18087b1e27505985a254c487679e16b8
https://github.com/llvm/llvm-project/commit/6ade80ce18087b1e27505985a254c487679e16b8
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M compiler-rt/lib/builtins/aarch64/sme-abi.S
M compiler-rt/lib/builtins/assembly.h
Log Message:
-----------
[compiler-rt] Use mangled function names on ARM64EC (#137960)
On ARM64EC, function names and calls (but not address-taking or data
symbol references) use symbols prefixed with "#". Since it's an unique
behavior, introduce a new `FUNC_SYMBOL` macro instead of reusing
something like `SYMBOL_NAME`, which is also used for data symbols.
Based on patch by Billy Laws.
Commit: ac4bb42b97a5a9e143754cf8949eaf763dd69e14
https://github.com/llvm/llvm-project/commit/ac4bb42b97a5a9e143754cf8949eaf763dd69e14
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.h
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[OpenACC][CIR] Implement 'gang' lowering for 'loop' (#138968)
This clause requires an entire additional collection to keep track of
the gang 'kind' or 'type'. That work is maintained in the OpenACC
dialect functions. Otherwise, this is effectively the same as the
worker/vectors.
Commit: 4c69f8248d240e8a10bdc999c9719c430b8cbd15
https://github.com/llvm/llvm-project/commit/4c69f8248d240e8a10bdc999c9719c430b8cbd15
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement basic lowering for combined constructs (#139119)
Combined constructs are emitted a little oddly, in that they are the
first ones where there are two operations for a single construct. First,
the compute variant is emitted with 'combined(loop)', then the loop
operation is emitted with 'combined(<variant>)'. Each gets its own
normal terminator.
This patch does not yet implement clauses at all, since that is going to
require special attention to make sure we get the emitting of them
correct, since certain clauses go to different locations, and need their
insertion-points set correctly. So this patch sets it up so that we will
emit the 'not implemented' diagnostic for all clauses.
Commit: 4b29ee407e6466364d70f7962104561553ea89cc
https://github.com/llvm/llvm-project/commit/4b29ee407e6466364d70f7962104561553ea89cc
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
M llvm/unittests/Frontend/OpenMPParsingTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[LLVM][OpenMP] Add "version" parameter to getOpenMPDirectiveName (#139114)
Some OpenMP directives have different spellings in different versions of
the OpenMP spec. To use the proper spelling for a given spec version
pass "version" as a parameter to getOpenMPDirectiveName.
This parameter won't be used at the moment, and will have a default
value to allow callers not to pass it, for gradual adoption in various
components.
RFC:
https://discourse.llvm.org/t/rfc-alternative-spellings-of-openmp-directives/85507
Commit: 6094080d27bc6dae4d85de207d4cf5586becf1aa
https://github.com/llvm/llvm-project/commit/6094080d27bc6dae4d85de207d4cf5586becf1aa
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (#139115)
The OpenMP version is stored in language options in ASTContext. If the
context is not available, use the fallback version.
RFC:
https://discourse.llvm.org/t/rfc-alternative-spellings-of-openmp-directives/85507
Commit: 41aa67488c3ca33334ec79fb5216145c3644277c
https://github.com/llvm/llvm-project/commit/41aa67488c3ca33334ec79fb5216145c3644277c
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/lib/Frontend/ParserActions.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
Log Message:
-----------
[flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (#139131)
The OpenMP version is stored in LangOptions in SemanticsContext. Use the
fallback version where SemanticsContext is unavailable (mostly in case
of debug dumps).
RFC:
https://discourse.llvm.org/t/rfc-alternative-spellings-of-openmp-directives/85507
Commit: c453da7b7c2d964352941484b9f06047d2cc919e
https://github.com/llvm/llvm-project/commit/c453da7b7c2d964352941484b9f06047d2cc919e
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unroll-runtime.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unroll.ll
Log Message:
-----------
[KeyInstr][LoopUnroll] Remap atoms while unrolling (#133489)
RFC: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: 40ac25e3096178ffe9d20ba4e14a159411ddf206
https://github.com/llvm/llvm-project/commit/40ac25e3096178ffe9d20ba4e14a159411ddf206
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-basic.ll
Log Message:
-----------
[KeyInstr][JumpThreading] Remap atoms after threading (#133487)
RFC: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: bb0a0782ea63e94154d2c8653e0064e4321a1f20
https://github.com/llvm/llvm-project/commit/bb0a0782ea63e94154d2c8653e0064e4321a1f20
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
Log Message:
-----------
AMDGPU: Use less surprising form of ConstantFP::get (#139248)
Commit: 89822ff5a8608570897c21a3c40fb450c53f603f
https://github.com/llvm/llvm-project/commit/89822ff5a8608570897c21a3c40fb450c53f603f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/lib/Frontend/ParserActions.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
Log Message:
-----------
Revert "[flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (#139131)"
This reverts commit 41aa67488c3ca33334ec79fb5216145c3644277c.
Breaks build: https://lab.llvm.org/buildbot/#/builders/140/builds/22826
Commit: fc83aaea06eb06f73ac53491dd16346b56ba5a2f
https://github.com/llvm/llvm-project/commit/fc83aaea06eb06f73ac53491dd16346b56ba5a2f
Author: Martin Storsjö <martin at martin.st>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] [SEH] Implement parsing of ARM pdata/xdata (#137950)
This is generally very similar to the aarch64 case.
Contrary to aarch64, the public headers don't contain any definition of
a struct for interpreting this data, so we provide our own.
Commit: 9c67ae861ccb0312fc680414a8441892d169d14a
https://github.com/llvm/llvm-project/commit/9c67ae861ccb0312fc680414a8441892d169d14a
Author: Martin Storsjö <martin at martin.st>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M libunwind/src/Unwind-seh.cpp
Log Message:
-----------
[libunwind] [SEH] Set NonVolatileRegisters before calling a personality function (#137951)
The CRT __C_specific_handler function uses this for restoring registers
before calling the filter function.
This fixes the libunwind/libcxxabi forced unwind testcases on ARM and
AArch64.
Commit: dbe561309a1cb35e11cc57e4b88096362a030e8a
https://github.com/llvm/llvm-project/commit/dbe561309a1cb35e11cc57e4b88096362a030e8a
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/docs/TestSuiteGuide.md
Log Message:
-----------
[llvm][docs] Fix text rendering in external suites section of Test suite guide
Since the "-" was the first character of a newline, it was rendered
as a bullet point when it was supposed to be punctuation.
Commit: a68f35a17db03a6633a660d310156f4e2f17197f
https://github.com/llvm/llvm-project/commit/a68f35a17db03a6633a660d310156f4e2f17197f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/lib/Frontend/ParserActions.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/tools/f18-parse-demo/f18-parse-demo.cpp
Log Message:
-----------
[flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (#139131)
The OpenMP version is stored in LangOptions in SemanticsContext. Use the
fallback version where SemanticsContext is unavailable (mostly in case
of debug dumps).
RFC:
https://discourse.llvm.org/t/rfc-alternative-spellings-of-openmp-directives/85507
Reland with a fix for build break in f18-parse-demo.
Commit: 806b49140142dea46d31646c438d936522bb2be7
https://github.com/llvm/llvm-project/commit/806b49140142dea46d31646c438d936522bb2be7
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/call.cpp
Log Message:
-----------
[CIR] LLVMIR lowering for cir.call (#138873)
Commit: d60eeda2e5179cbdb2af70a7531dd437082724aa
https://github.com/llvm/llvm-project/commit/d60eeda2e5179cbdb2af70a7531dd437082724aa
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M offload/libomptarget/PluginManager.cpp
Log Message:
-----------
[Offload] Do not load images from the same descriptor on the same device (#139147)
Summary:
Right now we generally assume that we have one image per device. The
binary descriptor represents a single 'compilation'. This means that
each image is going to contain the same code built for different
architectures when used through the OpenMP interface. This is
problematic when we have cases where the same code will then be loaded
multiple times (like wiht sm_80, sm_89 or the generic GFX ISAs). This
patch is the quick and dirty slution, we just prevent this from
happening at all. This means we use the first one we find, which might
not be overly optimal, but it should be better than the alternative.
Note that this does not affect shared library loads as it is per binary
descriptor, not per device.
Commit: f058333941c9da805b426537bd84aeaeea413777
https://github.com/llvm/llvm-project/commit/f058333941c9da805b426537bd84aeaeea413777
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
Log Message:
-----------
[LV] Regen a test with UTC (#139235)
Commit: 80370465d9bce5d390a70db02d19c20c1cb4db4a
https://github.com/llvm/llvm-project/commit/80370465d9bce5d390a70db02d19c20c1cb4db4a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[DAG] Add wrappers for insert_vector_elt and extract_vector_elt [nfc] (#139141)
As with the recently added subvector variants, provide the unsigned
index operand to simplify a bunch of code.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 3954e9d6235d4e90c3f786594e877ab83fab3bf1
https://github.com/llvm/llvm-project/commit/3954e9d6235d4e90c3f786594e877ab83fab3bf1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Extract values state/operands analysis into separate class
Extract values state and operands analysis/building into a separate
class. This class allows to localize instrutions state and operands
building for future support of copyable elements vectorization.
Reviewers: HanKuanChen, RKSimon
Reviewed By: HanKuanChen
Pull Request: https://github.com/llvm/llvm-project/pull/138724
Commit: 10f512074fb13ab5da9f49c25965508f51c8452a
https://github.com/llvm/llvm-project/commit/10f512074fb13ab5da9f49c25965508f51c8452a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[SLP][NFC]Extract values state/operands analysis into separate class"
This reverts commit 3954e9d6235d4e90c3f786594e877ab83fab3bf1to fix
a buildbot https://lab.llvm.org/buildbot/#/builders/46/builds/16518.
Commit: 4ae529b764390fb7b78bf1871bb90ff5c4c7bbbd
https://github.com/llvm/llvm-project/commit/4ae529b764390fb7b78bf1871bb90ff5c4c7bbbd
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/test/DebugInfo/Generic/discriminant-member.ll
Log Message:
-----------
Loosen DWARF form check in discriminant-member.ll (#139258)
The new test discriminant-member.ll (see #138953) failed on AIX. It
seems that the string form is different in the DWARF. The log reads:
50: DW_AT_name [DW_FORM_string] ("Discr")
... but the test only looks for DW_FORM_strp. Since the precise form
isn't important here, this patch changes the test to accept any string
form.
---------
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Commit: fb7d114efb52ff78b7645490adb8f0c37fd12986
https://github.com/llvm/llvm-project/commit/fb7d114efb52ff78b7645490adb8f0c37fd12986
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unswitch.ll
Log Message:
-----------
[KeyInstr][LoopUnswitch] Remap cloned instructions' atoms (#133491)
RFC: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
Commit: 2cc8734c4505a0c8ce1f8d6a915ce0fc57cb6ea4
https://github.com/llvm/llvm-project/commit/2cc8734c4505a0c8ce1f8d6a915ce0fc57cb6ea4
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/test/Transforms/do_concurrent-to-do_loop-unodered.fir
Log Message:
-----------
[flang][fir] Basic lowering `fir.do_concurrent` locality specs to `fir.do_loop ... unordered` (#138512)
Extends lowering `fir.do_concurrent` to `fir.do_loop ... unordered` by
adding support for locality specifiers.
In particular, for `local` specifiers, a `fir.alloca` op is created
using the localizer type. For `local_init` specifiers, the `copy` region
is additionally inlined in the `do concurrent` loop's body.
PR stack:
- https://github.com/llvm/llvm-project/pull/137928
- https://github.com/llvm/llvm-project/pull/138505
- https://github.com/llvm/llvm-project/pull/138506
- https://github.com/llvm/llvm-project/pull/138512 (this PR)
- https://github.com/llvm/llvm-project/pull/138534
- https://github.com/llvm/llvm-project/pull/138816
Commit: 802a2e32ab7a91cd387cc4460d637fe922dc4f0a
https://github.com/llvm/llvm-project/commit/802a2e32ab7a91cd387cc4460d637fe922dc4f0a
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/i128.ll
A llvm/test/CodeGen/NVPTX/szext.ll
Log Message:
-----------
[NVPTX] Add intrinsics for the szext instruction (#139126)
This change adds support for `llvm.nvvm.{sext,zext}.{wrap,clamp}`
intrinsics.
Commit: b71418e19798550cb17f2b23d0001b1ac9c7b776
https://github.com/llvm/llvm-project/commit/b71418e19798550cb17f2b23d0001b1ac9c7b776
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-05-09 (Fri, 09 May 2025)
Changed paths:
M CONTRIBUTING.md
M bolt/Maintainers.txt
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/PatchEntries.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/test/AArch64/lite-mode.s
M bolt/unittests/Core/BinaryContext.cpp
M clang-tools-extra/Maintainers.txt
M clang/Maintainers.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/InstallAPI/DylibVerifier.h
M clang/include/clang/Lex/HLSLRootSignatureTokenKinds.def
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/ProfileList.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/lib/Driver/ToolChains/Cygwin.cpp
A clang/lib/Driver/ToolChains/Cygwin.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Format/DefinitionBlockSeparator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.h
M clang/lib/InstallAPI/DylibVerifier.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
A clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
M clang/test/CIR/IR/vector.cir
M clang/test/CXX/module/module.interface/p3.cpp
M clang/test/CodeGen/RISCV/riscv-v-debuginfo.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
A clang/test/CodeGen/glibc_ptr_align.c
M clang/test/CodeGen/profile-filter.c
M clang/test/CodeGenCXX/attr-x86-no_caller_saved_registers.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/default_calling_conv.cpp
M clang/test/CodeGenCXX/mangle-ms.cpp
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenObjCXX/arc-rv-attr.mm
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
A clang/test/Driver/Inputs/DriverKit19.0.sdk/System/DriverKit/System/Library/SubFrameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/Library/Frameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/System/Library/Frameworks/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/System/Library/SubFrameworks/.keep
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/bin/as
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/bin/ld
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/i686-pc-msys/lib/.keep
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/lib/gcc/i686-pc-msys/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/lib/gcc/x86_64-pc-cygwin/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/bin/as
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/bin/ld
A clang/test/Driver/Inputs/basic_cross_cygwin_tree/usr/x86_64-pc-cygwin/lib/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/include/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/lib/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/i686-pc-cygwin/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/i686-pc-cygwin/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/x86_64-pc-msys/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/include/x86_64-pc-msys/c++/10/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/i686-pc-cygwin/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/i686-pc-cygwin/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/x86_64-pc-msys/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/gcc/x86_64-pc-msys/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/i686-pc-cygwin/.keep
A clang/test/Driver/Inputs/basic_cygwin_tree/usr/lib/x86_64-pc-msys/.keep
A clang/test/Driver/attr-availability-erroneous-diags.c
M clang/test/Driver/clang-offload-bundler-standardize.c
A clang/test/Driver/cygwin.cpp
A clang/test/Driver/darwin-framework-search-paths.c
R clang/test/Driver/darwin-subframeworks.c
M clang/test/Driver/driverkit-path.c
M clang/test/Driver/fprofile-generate-cold-function-coverage.c
R clang/test/Driver/mips-cpus.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/x86-mabi.c
M clang/test/Lexer/char8_t.cpp
M clang/test/Modules/Inputs/submodules/module.modulemap
M clang/test/Modules/missing-header.m
M clang/test/OpenMP/openmp_attribute_parsing.cpp
M clang/test/OpenMP/tile_messages.cpp
M clang/test/Parser/c2x-attributes.c
M clang/test/Parser/cxx0x-attributes.cpp
R clang/test/Preprocessor/cuda-macos-includes.cu
M clang/test/Sema/no-warn-missing-prototype.c
M clang/test/Sema/patchable-function-entry-attr.cpp
A clang/test/Sema/unknown-attributes.c
M clang/test/SemaCXX/attr-trivial-abi.cpp
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
M clang/test/SemaCXX/ptrauth-triviality.cpp
M clang/test/SemaCXX/type-traits-nonobject.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-installapi/Options.cpp
M clang/unittests/Format/DefinitionBlockSeparatorTest.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/SearchPathTest.cpp
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/www/menu.html.incl
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/aarch64/sme-abi.S
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/TestCases/override-callback.c
M flang-rt/CODE_OWNERS.TXT
M flang/docs/OpenMPSupport.md
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Frontend/CompilerInstance.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Frontend/ParserActions.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
A flang/test/Driver/multiple-fc1-input.f90
M flang/test/Fir/affine-promotion.fir
M flang/test/Fir/do_concurrent.fir
M flang/test/Fir/invalid.fir
M flang/test/Lower/HLFIR/designators-component-ref.f90
A flang/test/Lower/OpenMP/optional-argument-map-2.f90
A flang/test/Lower/OpenMP/sections-predetermined-private.f90
A flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocate-source-allocatables-2.f90
M flang/test/Lower/allocate-source-allocatables.f90
M flang/test/Lower/allocate-source-pointers.f90
A flang/test/Lower/volatile-allocatable.f90
A flang/test/Semantics/OpenMP/detach01.f90
A flang/test/Semantics/OpenMP/detach02.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
R flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M flang/test/Transforms/debug-107988.fir
M flang/test/Transforms/debug-96314.fir
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-assumed-rank-array.fir
M flang/test/Transforms/debug-assumed-shape-array-2.fir
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-char-type-1.fir
M flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-2.fir
M flang/test/Transforms/debug-extra-global.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-index-type.fir
M flang/test/Transforms/debug-line-table-existing.fir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table-inc-same-file.fir
M flang/test/Transforms/debug-line-table.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-1.fir
M flang/test/Transforms/debug-ptr-type.fir
M flang/test/Transforms/debug-ref-type.fir
M flang/test/Transforms/debug-tuple-type.fir
M flang/test/Transforms/debug-variable-array-dim.fir
M flang/test/Transforms/debug-variable-char-len.fir
M flang/test/Transforms/debug-vector-type.fir
M flang/test/Transforms/do_concurrent-to-do_loop-unodered.fir
M flang/tools/f18-parse-demo/f18-parse-demo.cpp
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/acos.cpp
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/asin_utils.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/acos_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/acos_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__expected/expected.h
M libcxx/include/__locale
M libcxx/include/__math/copysign.h
M libcxx/include/__math/exponential_functions.h
M libcxx/include/__math/fdim.h
M libcxx/include/__math/fma.h
M libcxx/include/__math/hypot.h
M libcxx/include/__math/inverse_trigonometric_functions.h
M libcxx/include/__math/min_max.h
M libcxx/include/__math/modulo.h
M libcxx/include/__math/remainder.h
M libcxx/include/__math/rounding_functions.h
M libcxx/include/__math/traits.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__split_buffer
A libcxx/include/__type_traits/is_replaceable.h
M libcxx/include/__type_traits/promote.h
M libcxx/include/__utility/pair.h
M libcxx/include/__vector/vector.h
M libcxx/include/array
M libcxx/include/cmath
M libcxx/include/complex
M libcxx/include/deque
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/string
M libcxx/include/tuple
M libcxx/include/variant
A libcxx/test/libcxx/containers/container.adaptors/flat.multiset/insert.temporary.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.set/insert.temporary.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat_helpers.h
M libcxx/test/libcxx/numerics/complex.number/cmplx.over.pow.pass.cpp
A libcxx/test/libcxx/type_traits/is_replaceable.compile.pass.cpp
M libcxx/utils/ci/BOT_OWNERS.txt
M libunwind/src/Unwind-seh.cpp
M libunwind/src/UnwindCursor.hpp
M lld/ELF/Options.td
M lldb/include/lldb/API/SBThreadPlan.h
M lldb/include/lldb/Core/SourceManager.h
M lldb/include/lldb/DataFormatters/FormattersHelpers.h
M lldb/source/API/SBThreadPlan.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxTuple.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppTuple.cpp
M lldb/source/Plugins/Language/ObjC/NSArray.cpp
M lldb/source/Plugins/Language/ObjC/NSDictionary.cpp
M lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp
M lldb/source/Plugins/Language/ObjC/NSSet.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/functionalities/step_scripted/Steps.py
M lldb/test/API/functionalities/step_scripted/TestStepScripted.py
M lldb/test/API/functionalities/step_scripted/main.c
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/memory/TestDAP_memory.py
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
A lldb/test/Shell/Commands/command-list-reach-beginning-of-file.test
A lldb/test/Shell/Commands/command-list-reach-end-of-file.test
M lldb/test/Shell/Expr/TestProcessModificationIdOnExpr.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
A lldb/tools/lldb-dap/src-ts/debug-session-tracker.ts
M lldb/tools/lldb-dap/src-ts/disposable-context.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
M llvm/CREDITS.TXT
M llvm/Maintainers.md
M llvm/docs/CodeOfConduct.rst
M llvm/docs/DiscourseMigrationGuide.md
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/InterfaceExportAnnotations.rst
M llvm/docs/LangRef.rst
A llvm/docs/MLGO.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/Reference.rst
M llvm/docs/TestSuiteGuide.md
M llvm/docs/UndefinedBehavior.rst
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/bit.h
M llvm/include/llvm/Analysis/AssumeBundleQueries.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Analysis/AssumeBundleQueries.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.h
A llvm/lib/Target/ARC/ARCSelectionDAGInfo.cpp
A llvm/lib/Target/ARC/ARCSelectionDAGInfo.h
M llvm/lib/Target/ARC/ARCSubtarget.cpp
M llvm/lib/Target/ARC/ARCSubtarget.h
M llvm/lib/Target/ARC/CMakeLists.txt
M llvm/lib/Target/CSKY/CMakeLists.txt
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.h
A llvm/lib/Target/CSKY/CSKYSelectionDAGInfo.cpp
A llvm/lib/Target/CSKY/CSKYSelectionDAGInfo.h
M llvm/lib/Target/CSKY/CSKYSubtarget.cpp
M llvm/lib/Target/CSKY/CSKYSubtarget.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Lanai/CMakeLists.txt
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.h
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/MSP430/CMakeLists.txt
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.h
A llvm/lib/Target/MSP430/MSP430SelectionDAGInfo.cpp
A llvm/lib/Target/MSP430/MSP430SelectionDAGInfo.h
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.h
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/Mips32r6InstrInfo.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
A llvm/test/CodeGen/AArch64/fast-isel-atomic-fallback.ll
A llvm/test/CodeGen/AArch64/icmp-or-load.ll
M llvm/test/CodeGen/AArch64/rvmarker-pseudo-expansion-and-outlining.mir
M llvm/test/CodeGen/AArch64/str-narrow-zero-merge.mir
A llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve2-xar.ll
M llvm/test/CodeGen/AArch64/xar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
A llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
A llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
A llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
A llvm/test/CodeGen/DirectX/is_fpclass.ll
M llvm/test/CodeGen/LoongArch/fp-max-min.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
A llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
M llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
M llvm/test/CodeGen/Mips/msa/arithmetic.ll
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
M llvm/test/CodeGen/NVPTX/i128.ll
A llvm/test/CodeGen/NVPTX/szext.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir
A llvm/test/CodeGen/RISCV/mul-expand.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-store.ll
A llvm/test/CodeGen/RISCV/rvv/pr139075.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
A llvm/test/CodeGen/SystemZ/pr137687.mir
M llvm/test/CodeGen/WinEH/wineh-asm.ll
A llvm/test/CodeGen/WinEH/wineh-asm2.ll
M llvm/test/CodeGen/X86/asm-modifier.ll
A llvm/test/DebugInfo/Generic/discriminant-member.ll
M llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-basic.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unroll-runtime.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unroll.ll
A llvm/test/DebugInfo/KeyInstructions/Generic/loop-unswitch.ll
A llvm/test/DebugInfo/KeyInstructions/X86/cgp-break-critical-edge.ll
A llvm/test/DebugInfo/KeyInstructions/X86/lit.local.cfg
A llvm/test/DebugInfo/KeyInstructions/X86/parse.mir
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
A llvm/test/Instrumentation/HWAddressSanitizer/personality-bti.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/bf16_imm.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
A llvm/test/ObjectYAML/DXContainer/RootSignature-Descriptor1.0.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-Descriptor1.1.yaml
M llvm/test/ObjectYAML/DXContainer/RootSignature-MultipleParameters.yaml
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/cc-assign-to-reg-tuple.td
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/or-shift-chain.ll
A llvm/test/Transforms/CodeGenPrepare/X86/split-dbg.ll
M llvm/test/Transforms/InstCombine/cos-1.ll
A llvm/test/Transforms/InstCombine/simplify-intrinsics.ll
M llvm/test/Transforms/InstSimplify/ConstProp/fp-undef.ll
M llvm/test/Transforms/InstSimplify/ConstProp/min-max.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/zve32x.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/zvl32b.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
A llvm/test/Transforms/LoopVectorize/pr125278.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.noglobals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.transitiveglobals.expected
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
M llvm/unittests/Frontend/OpenMPParsingTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/BUILD.gn
M llvm/utils/update_test_checks.py
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.td
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M mlir/test/Dialect/Affine/raise-memref.mlir
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/subtensor-of-padtensor.mlir
M mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribution.mlir
M mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir
A mlir/test/Target/LLVMIR/openmp-cancel-distribute-parallel-loop.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
A mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/SPIRV/decorations.mlir
M offload/libomptarget/PluginManager.cpp
A offload/test/offloading/fortran/optional-mapped-arguments-2.f90
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/ergawy/handle_users_with_repeated_args
Compare: https://github.com/llvm/llvm-project/compare/3db2c56779f7...b71418e19798
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