[all-commits] [llvm/llvm-project] c5b626: [AMDGPU][Fake16] Support OPSEL for `v_cvt_f16_f32`...

[Shilei Tian via All-commits]

  Branch: refs/heads/users/shiltian/opsel-for-cvt-between-f32-and-f16
  Home:   https://github.com/llvm/llvm-project
  Commit: c5b62696af4787d2e17b9f4581e9bc5ccae52a4f
      https://github.com/llvm/llvm-project/commit/c5b62696af4787d2e17b9f4581e9bc5ccae52a4f
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-05-09 (Fri, 09 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
    M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1-fake16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1-fake16.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][Fake16] Support OPSEL for `v_cvt_f16_f32` and `v_cvt_f32_f16`



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