[all-commits] [llvm/llvm-project] fbd9a3: [AArch64][SVE] Combine UXT[BHW] intrinsics to AND....

[Ricardo Jesus via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fbd9a3160b392c343f9ce24af0180d8b14c68dfe
      https://github.com/llvm/llvm-project/commit/fbd9a3160b392c343f9ce24af0180d8b14c68dfe
  Author: Ricardo Jesus <rjj at nvidia.com>
  Date:   2025-05-06 (Tue, 06 May 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-uxt.ll

  Log Message:
  -----------
  [AArch64][SVE] Combine UXT[BHW] intrinsics to AND. (#137956)

This patch combines uxt[bhw] intrinsics to and_u when the governing
predicate is all-true or the passthrough is undef (e.g. in cases of
``unknown'' merging). This improves code gen as the latter can be
emitted as AND immediate instructions.

For example, given:
```cpp
svuint64_t foo(svuint64_t x) {
  return svextb_z(svptrue_b64(), x);
}
```

Currently:
```gas
foo:
  ptrue   p0.d
  movi    v1.2d, #0000000000000000
  uxtb    z0.d, p0/m, z0.d
  ret
```

Becomes:
```gas
foo:
  and     z0.d, z0.d, #0xff
  ret
```



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