[all-commits] [llvm/llvm-project] d4706e: [AMDGPU][True16][CodeGen] readfirstlane for vgpr16...

[Brox Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d4706e17f55d058316d1cc3ce86bee14ad11f5d6
      https://github.com/llvm/llvm-project/commit/d4706e17f55d058316d1cc3ce86bee14ad11f5d6
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-05-05 (Mon, 05 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-vgpr16-to-spgr32.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] readfirstlane for vgpr16 copy to sgpr32 (#118037)

i16 can be selected into sgpr32 or vgpr16 in isel lowering in true16
mode. And thus, it creates cases that we copy from vgpr16 to sgpr32 in
ext selection and this seems inevitable without sgpr16 support.

legalize the src/dst reg when we decide to lower this special copy to a
readfirstlane in fix-sgpr-copy pass and add a lit test



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