[all-commits] [llvm/llvm-project] 4e175b: [RISCV] Fix Defs/Uses for SiFive CLIC Support (#13...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e175b889669b430113ce0216e0ee1fe7884889c
      https://github.com/llvm/llvm-project/commit/4e175b889669b430113ce0216e0ee1fe7884889c
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/sifive-interrupt-attr.ll

  Log Message:
  -----------
  [RISCV] Fix Defs/Uses for SiFive CLIC Support (#137724)

The expensive checks bots found issues with #132481, due to not setting
defs/uses correctly. In 31bd7a507152 I added verify flags, so that the
failure is reproduced without requiring expensive checks, and xfailed
the test.

This change:
- Ensures that registers are correctly marked as defs/uses.
- Removes the xfail.
- Leaves the tests with `-verify-machineinstrs` which should have been
present originally.



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