[all-commits] [llvm/llvm-project] 82a1d5: [PowerPC] Add dense math half-precision floating-p...

[Maryam Moghadas via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 82a1d5078d3e3a1dff70601f8817c220a1f453ab
      https://github.com/llvm/llvm-project/commit/82a1d5078d3e3a1dff70601f8817c220a1f453ab
  Author: Maryam Moghadas <maryammo at ca.ibm.com>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
    M llvm/test/CodeGen/PowerPC/dmf-outer-product.ll
    M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
    M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
    M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s

  Log Message:
  -----------
  [PowerPC] Add dense math half-precision floating-point outer-product accumulate to DMR instructions (#133272)

This patch adds the following Dense Math Facility 16-bit half-precision
floating-point calculation instructions: dmxvf16gerx2, dmxvf16gerx2pp,
dmxvf16gerx2pn, dmxvf16gerx2np, dmxvf16gerx2nn, pmdmxvf16gerx2,
pmdmxvf16gerx2pp, pmdmxvf16gerx2pn, pmdmxvf16gerx2np, pmdmxvf16gerx2nn,
along with their corresponding intrinsics and tests.



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