[all-commits] [llvm/llvm-project] faac57: [RISCV] Expand constant multiplication for targets...
Iris Shi via All-commits
all-commits at lists.llvm.org
Fri Apr 25 02:15:44 PDT 2025
Branch: refs/heads/users/el-ev/rv32i-expand-mul
Home: https://github.com/llvm/llvm-project
Commit: faac57c637d4cf5339592f160eb0653051dae5f1
https://github.com/llvm/llvm-project/commit/faac57c637d4cf5339592f160eb0653051dae5f1
Author: Iris Shi <0.0 at owo.li>
Date: 2025-04-25 (Fri, 25 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/mul-expand.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
Log Message:
-----------
[RISCV] Expand constant multiplication for targets without M extension
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