[all-commits] [llvm/llvm-project] d43ce3: [TableGen][GISel] Allow isTrivialOperatorNode to i...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d43ce3504891edde937d68f6158dfacfa76de77a
      https://github.com/llvm/llvm-project/commit/d43ce3504891edde937d68f6158dfacfa76de77a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-04-24 (Thu, 24 Apr 2025)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (#137080)

This removes the need to explicitly set isTruncStore on truncstorei8 and
other similar PatFrags that include truncstore in their frags DAG.

This allows some new patterns to be imported for AMDGPU as you can see
in the changed test.

The extra isTruncStore were added in ae2b36e8bdfa6, along with some
other tablegen changes to look for MemoryVT along with isTruncStore. I
did not remove the code, because I'm not sure if any out of tree users
have become dependent on it. It's no longer exercised in tree.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications