[all-commits] [llvm/llvm-project] 88083a: [X86] SimplifyDemandedVectorEltsForTargetNode - ha...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 88083a0c42e69e5967737e088ac6e5b1d12343f0
      https://github.com/llvm/llvm-project/commit/88083a0c42e69e5967737e088ac6e5b1d12343f0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-04-24 (Thu, 24 Apr 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (#137139)

512-bit X86ISD::VPERMI nodes handle the lower/upper 256-bits separately - so if we don't demand the upper half elements, we can just use the 256-bit variant.



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