[all-commits] [llvm/llvm-project] 94a14f: [SystemZ] Add DAGCombine for FCOPYSIGN to remove r...

[Jonas Paulsson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 94a14f9f0d884eebb87fb3003229ffee5f95d1c8
      https://github.com/llvm/llvm-project/commit/94a14f9f0d884eebb87fb3003229ffee5f95d1c8
  Author: Jonas Paulsson <paulson1 at linux.ibm.com>
  Date:   2025-04-24 (Thu, 24 Apr 2025)

  Changed paths:
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.h
    M llvm/lib/Target/SystemZ/SystemZInstrFP.td
    M llvm/test/CodeGen/SystemZ/fp-copysign-01.ll
    M llvm/test/CodeGen/SystemZ/fp-copysign-02.ll
    M llvm/test/CodeGen/SystemZ/fp-copysign-03.ll

  Log Message:
  -----------
  [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (#136131)

Add a DAGCombine for FCOPYSIGN that removes the rounding which is never
needed as the sign bit is already in the correct place. This helps in particular the
rounding to f16 case which needs a libcall.

Also remove the roundings for other FP VTs and simplify the CPSDR
patterns correspondingly.

fp-copysign-03.ll test updated, now also covering the other FP VT
combinations.



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