[all-commits] [llvm/llvm-project] 096ab5: [lldb][MachO] MachO corefile support for riscv32 b...

[Jason Molenda via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 096ab51de03437e38f97a48b8f2d453fb903414a
      https://github.com/llvm/llvm-project/commit/096ab51de03437e38f97a48b8f2d453fb903414a
  Author: Jason Molenda <jmolenda at apple.com>
  Date:   2025-04-23 (Wed, 23 Apr 2025)

  Changed paths:
    M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
    M lldb/source/Plugins/Process/Utility/CMakeLists.txt
    A lldb/source/Plugins/Process/Utility/RegisterContextDarwin_riscv32.cpp
    A lldb/source/Plugins/Process/Utility/RegisterContextDarwin_riscv32.h
    A lldb/test/API/macosx/riscv32-corefile/Makefile
    A lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py
    A lldb/test/API/macosx/riscv32-corefile/create-empty-riscv-corefile.cpp

  Log Message:
  -----------
  [lldb][MachO] MachO corefile support for riscv32 binaries (#137092)

Add support for reading a macho corefile with CPU_TYPE_RISCV and the
riscv32 general purpose register file. I added code for the floating
point and exception registers too, but haven't exercised this. If we
start putting the full CSR register bank in a riscv corefile, it'll be
in separate 4k byte chunks, but I don't have a corefile to test against
that so I haven't written the code to read it.

The RegisterContextDarwin_riscv32 is copied & in the style of the other
RegisterContextDarwin classes; it's not the first choice I would make
for representing this, but it wasn't worth changing for this cputype.

rdar://145014653



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