[all-commits] [llvm/llvm-project] 5981be: [RISCV] Add Andes A45/AX45 processor definition (#...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Wed Apr 23 21:14:09 PDT 2025
Branch: refs/heads/users/vitalybuka/spr/main.drivercfi-allow-cfi-with-minimal-runtime
Home: https://github.com/llvm/llvm-project
Commit: 5981be76925c2d6ee5b33029332beae254addb46
https://github.com/llvm/llvm-project/commit/5981be76925c2d6ee5b33029332beae254addb46
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-24 (Thu, 24 Apr 2025)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add Andes A45/AX45 processor definition (#136832)
Andes A45/AX45 are 32/64bit in-order dual-issue 8-stage pipeline
linux-capable CPU implementing the RV[32|64]IMAFDC_Zba_Zbb_Zbs ISA
extensions. They are developed by Andes Technology
https://www.andestech.com, a RISC-V IP provider.
The overviews for A45/AX45:
https://www.andestech.com/en/products-solutions/andescore-processors/riscv-a45/
https://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45/
Scheduling model will be implemented in a later PR.
Commit: a68c8e831452febc82ffb4091134aeb87ca52c2b
https://github.com/llvm/llvm-project/commit/a68c8e831452febc82ffb4091134aeb87ca52c2b
Author: Cedric <14017092+douyixuan at users.noreply.github.com>
Date: 2025-04-24 (Thu, 24 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Fix parser of vector.transfer_read (#133721)
This PR adds a check in the parser to prevent a crash when
vector.transfer_read fails to create minor identity permutation. map.
Fixes #132851
a.mlir
```
module {
func.func @test_vector.transfer_read(%arg1: memref<?xindex>) -> vector<3x4xi32> {
%c3_i32 = arith.constant 3 : i32
%0 = vector.transfer_read %arg1[%c3_i32, %c3_i32], %c3_i32 : memref<?xindex>, vector<3x4xi32>
return %0 : vector<3x4xi32>
}
}
```
Commit: 178cdbf746bbc49ad18b5e83a95514ddd42f764c
https://github.com/llvm/llvm-project/commit/178cdbf746bbc49ad18b5e83a95514ddd42f764c
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Add missing deps in mlir/test/BUILD.bazel after 905f1d8068a5bc1149732b46afc3f5dd780aa5d9
Commit: 30fec128e8cc515392521628771510b347411c28
https://github.com/llvm/llvm-project/commit/30fec128e8cc515392521628771510b347411c28
Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M mlir/lib/Dialect/GPU/CMakeLists.txt
Log Message:
-----------
[mlir][AMDGPU] Add missing dependency (#137107)
Add missing deps after
https://github.com/llvm/llvm-project/commit/905f1d8068a5bc1149732b46afc3f5dd780aa5d9
---------
Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>
Commit: ea0dbee80813edf1c8a57d1c1bfd7fadee71d3fa
https://github.com/llvm/llvm-project/commit/ea0dbee80813edf1c8a57d1c1bfd7fadee71d3fa
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M llvm/lib/ProfileData/IndexedMemProfData.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (#137089)
This patch moves IndexedMemProfReader::deserialize and its subroutines
to IndexedMemProfData.cpp, building on:
commit 9a8f90dba3f8c25cbb3525a482053d3abcd3fddc
Author: Kazu Hirata <kazu at google.com>
Date: Wed Apr 23 15:39:45 2025 -0700
The intent is as follows:
- Reduce the size of InstrProfReader.cpp.
- Move the subroutines to a separate file because they don't interact
with anything else in InstrProfReader.cpp.
Commit: de1af6b7271c6f4fc67848a849cf8fa6000d2b97
https://github.com/llvm/llvm-project/commit/de1af6b7271c6f4fc67848a849cf8fa6000d2b97
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
Eval string one past end reland (#137091)
Relands #137078 after updating clang/test/AST/ByteCode/cxx20.cpp to
account for diagnostic outputs that differ between Linux and macOS.
Commit: 0975c09c671aca48c25b1f5952a675931ae93702
https://github.com/llvm/llvm-project/commit/0975c09c671aca48c25b1f5952a675931ae93702
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-04-24 (Thu, 24 Apr 2025)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Modules/Inputs/PR137102/module.modulemap
A clang/test/Modules/Inputs/PR137102/type_aware_destroying_new_delete.h
A clang/test/Modules/type-aware-destroying-new-and-delete-modules.cpp
A clang/test/PCH/Inputs/type_aware_destroying_new_delete.h
A clang/test/PCH/type-aware-destroying-new-and-delete-pch.cpp
Log Message:
-----------
[clang][p2719] Module deserialization does not restore allocator flags (#137102)
When serializing and deserializing a FunctionDecl we don't recover
whether or not the decl was a type aware allocator or destroying delete,
because in the final PR that information was placed in a side table in
ASTContext.
In principle it should be possible to re-do the semantic checks to
determine what these flags should be when deserializing, but it seems
like the most robust path is simply recording the flags directly in the
serialized AST.
Commit: e6466420505d9940fda087f30a500fb03e5507b5
https://github.com/llvm/llvm-project/commit/e6466420505d9940fda087f30a500fb03e5507b5
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/module-roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/module-flags.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Allow strings in module flag value (#136793)
Expand support a bit beyond integers.
Next step is to support more complex metadata values (e.g. !"CG Profile"
and !"ProfileSummary"), but that's a bit more complex and deserves it
own PR.
Commit: cb8495c0fcf32592c6fcd23429b702dccb57d2eb
https://github.com/llvm/llvm-project/commit/cb8495c0fcf32592c6fcd23429b702dccb57d2eb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[Driver][CFI] Add missing '-' into error message (#137097)
Co-authored-by: Jim Lin <jim at andestech.com>
Commit: 954f7975df606d4ad568ea3102cb1e09baa919d5
https://github.com/llvm/llvm-project/commit/954f7975df606d4ad568ea3102cb1e09baa919d5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-23 (Wed, 23 Apr 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Modules/Inputs/PR137102/module.modulemap
A clang/test/Modules/Inputs/PR137102/type_aware_destroying_new_delete.h
A clang/test/Modules/type-aware-destroying-new-and-delete-modules.cpp
A clang/test/PCH/Inputs/type_aware_destroying_new_delete.h
A clang/test/PCH/type-aware-destroying-new-and-delete-pch.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M llvm/docs/ReleaseNotes.md
M llvm/lib/ProfileData/IndexedMemProfData.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/module-roundtrip.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Target/LLVMIR/Import/module-flags.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/b4ae58e13bbb...954f7975df60
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