[all-commits] [llvm/llvm-project] 503205: [ARM][Thumb] Save FPSCR + FPEXC for save-vfp attri...

[Benson Chu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50320504c852e0cb3a8b1e43e85c9137219d44fd
      https://github.com/llvm/llvm-project/commit/50320504c852e0cb3a8b1e43e85c9137219d44fd
  Author: Benson Chu <bchu at localhost.localdomain>
  Date:   2025-04-22 (Tue, 22 Apr 2025)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/SemaARM.h
    M clang/lib/CodeGen/Targets/ARM.cpp
    M clang/lib/Sema/SemaARM.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    A clang/test/CodeGen/arm-interrupt-save-fp-attr-status-regs.c
    A clang/test/CodeGen/arm-interrupt-save-fp-attr.c
    M clang/test/Sema/arm-interrupt-attr.c
    A clang/test/Sema/arm-interrupt-save-fp-attr.c
    M llvm/include/llvm/IR/IntrinsicsARM.td
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    M llvm/lib/Target/ARM/ARMCallingConv.td
    M llvm/lib/Target/ARM/ARMFrameLowering.cpp
    M llvm/lib/Target/ARM/ARMFrameLowering.h
    M llvm/lib/Target/ARM/ARMInstrVFP.td
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
    M llvm/lib/Target/ARM/ARMRegisterInfo.td
    A llvm/test/CodeGen/ARM/interrupt-save-fp-attr-status-regs.mir
    A llvm/test/CodeGen/ARM/interrupt-save-fp-attr.ll

  Log Message:
  -----------
  [ARM][Thumb] Save FPSCR + FPEXC for save-vfp attribute

FPSCR and FPEXC will be stored in FPStatusRegs, after GPRCS2 has been
saved.

- GPRCS1
- GPRCS2
- FPStatusRegs (new)
- DPRCS
- GPRCS3
- DPRCS2

FPSCR is present on all targets with a VFP, but the FPEXC register is
not present on Cortex-M devices, so different amounts of bytes are
being pushed onto the stack depending on our target, which would
affect alignment for subsequent saves.

DPRCS1 will sum up all previous bytes that were saved, and will emit
extra instructions to ensure that its alignment is correct. My
assumption is that if DPRCS1 is able to correct its alignment to be
correct, then all subsequent saves will also have correct alignment.

Avoid annotating the saving of FPSCR and FPEXC for functions marked
with the interrupt_save_fp attribute, even though this is done as part
of frame setup.  Since these are status registers, there really is no
viable way of annotating this. Since these aren't GPRs or DPRs, they
can't be used with .save or .vsave directives. Instead, just record
that the intermediate registers r4 and r5 are saved to the stack
again.

Co-authored-by: Jake Vossen <jake at vossen.dev>
Co-authored-by: Alan Phipps <a-phipps at ti.com>



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