[all-commits] [llvm/llvm-project] 41675f: [VPlan] Simplify vp.merge true, (or x, y), x -> vp...
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Tue Apr 22 12:07:29 PDT 2025
Branch: refs/heads/users/kparzysz/spr/h02-memory-order
Home: https://github.com/llvm/llvm-project
Commit: 41675fa5b88dc703b3b1d96de668281582f21f3b
https://github.com/llvm/llvm-project/commit/41675fa5b88dc703b3b1d96de668281582f21f3b
Author: Luke Lau <luke at igalia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
Log Message:
-----------
[VPlan] Simplify vp.merge true, (or x, y), x -> vp.merge y, true, x (#135017)
With EVL tail folding an AnyOf reduction will emit an i1 vp.merge like
vp.merge true, (or phi, cond), phi, evl
We can remove the or and optimise this to
vp.merge cond, true, phi, evl
Which makes it slightly easier to pattern match in #134898.
This also adds a pattern matcher for calls to help match this.
Blended AnyOf reductions will use an and instead of an or, which we may
also be able to simplify in a later patch.
Commit: 8d4b19e3d4a8cee8899d5a293972aef48f9bdb7f
https://github.com/llvm/llvm-project/commit/8d4b19e3d4a8cee8899d5a293972aef48f9bdb7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
Log Message:
-----------
[RISCV] Remove skipFunction from RISCVVMV0Elimination. (#136080)
skipFunction disables the pass for functions with optnone attribute.
This pass is important to correct register allocation so I don't think
it should be disabled.
Commit: 427a7792b15d28a7962e42b5f677bfde9383e975
https://github.com/llvm/llvm-project/commit/427a7792b15d28a7962e42b5f677bfde9383e975
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LLD][Docs] Add release notes for execute-only support on AArch64 (#134804)
Commit: 7daa5010ab6a2ae77ac88ffd84e2cc37a2e11faa
https://github.com/llvm/llvm-project/commit/7daa5010ab6a2ae77ac88ffd84e2cc37a2e11faa
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
A llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] Cleanup and document nvvm.fabs intrinsics, adding f16 support (#135644)
This change unifies the NVVM intrinsics for floating point absolute
value into two new overloaded intrinsics "llvm.nvvm.fabs.*" and
"llvm.nvvm.fabs.ftz.*". Documentation has been added specifying the
semantics of these intrinsics to clarify how they differ from
"llvm.fabs.*". In addition, support for these new intrinsics is
extended to cover the f16 variants.
Commit: 78857e7263ba555fb40b286c6b40fcd35a85a65a
https://github.com/llvm/llvm-project/commit/78857e7263ba555fb40b286c6b40fcd35a85a65a
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
A clang/include/clang/CIR/ABIArgInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/ABIInfo.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/CodeGen/TargetInfo.cpp
A clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/IR/call.cir
A clang/test/CIR/IR/invalid-call.cir
Log Message:
-----------
[CIR] cir.call with scalar return type (#135552)
This PR introduces support for calling functions with a scalar return
type to the upstream. This PR also includes an initial version of
`CIRGenTargetInfo` and related definitions which are essential for the
CIRGen of call ops.
Related to #132487 .
Commit: d83b639b4c62924deef504f46e573e7d995ea10d
https://github.com/llvm/llvm-project/commit/d83b639b4c62924deef504f46e573e7d995ea10d
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Log Message:
-----------
Reland [clang] Unify `SourceLocation` and `IdentifierInfo*` pair-like data structures to `IdentifierLoc` (#136077)
This PR reland https://github.com/llvm/llvm-project/pull/135808, fixed
some missed changes in LLDB.
I found this issue when I working on
https://github.com/llvm/llvm-project/pull/107168.
Currently we have many similiar data structures like:
- std::pair<IdentifierInfo *, SourceLocation>.
- Element type of ModuleIdPath.
- IdentifierLocPair.
- IdentifierLoc.
This PR unify these data structures to IdentifierLoc, moved
IdentifierLoc definition to SourceLocation.h, and deleted other similer
data structures.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 1467b3b0a86fcd4a6b3225fbafd959ee781b5b5c
https://github.com/llvm/llvm-project/commit/1467b3b0a86fcd4a6b3225fbafd959ee781b5b5c
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang][Docs] Add release note for execute-only support on AArch64 (#134802)
Commit: 2007dcfeb86fe272fcd16283f9bca45292e3c630
https://github.com/llvm/llvm-project/commit/2007dcfeb86fe272fcd16283f9bca45292e3c630
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/GVN/pre-invalid-prof-metadata.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
Log Message:
-----------
Reapply [Metadata] Preserve MD_prof when merging instructions when one is missing. (#135418)
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
Also add a legality check when merging prof metadata based on
instruction type. Without this check GVN PRE optimizations result in
prof metadata on phi nodes which break the module verifier.
Build failure caught by
https://lab.llvm.org/buildbot/#/builders/113/builds/6621
```
!9185 = !{!"branch_weights", i32 3912, i32 802}
Wrong number of operands
!9185 = !{!"branch_weights", i32 3912, i32 802}
fatal error: error in backend: Broken module found, compilation aborted!
```
Reverts #134200 with additional changes.
Commit: 909a9feda9292be8a7322f07dd167a603309b541
https://github.com/llvm/llvm-project/commit/909a9feda9292be8a7322f07dd167a603309b541
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/AArch64/ubsan-handler-pass-by-ref.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
A clang/test/CodeGen/ubsan-attr.cpp
Log Message:
-----------
[Reland][Clang][CodeGen][UBSan] Add more precise attributes to recoverable ubsan handlers (#135135)
This patch relands https://github.com/llvm/llvm-project/pull/130990.
If the check value is passed by reference, add `memory(read)`.
Original PR description:
This patch adds `memory(argmem: read, inaccessiblemem: readwrite)` to
**recoverable** ubsan handlers in order to unblock some
memory/loop optimizations. It provides an average of 3% performance
improvement on llvm-test-suite (except for 49 test failures due to ubsan
diagnostics).
Commit: ecbd2d5e148cc1f2e5795d13d752e2a1c79cce1a
https://github.com/llvm/llvm-project/commit/ecbd2d5e148cc1f2e5795d13d752e2a1c79cce1a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[clang][ExprConst] Diagnose ptr subs with non-zero offset (#135938)
The attached test case was missing the note.
Commit: 70e2acf0c5650b8862c41f2697a9e0485ecb17be
https://github.com/llvm/llvm-project/commit/70e2acf0c5650b8862c41f2697a9e0485ecb17be
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check if operator delete calls are in the right frame (#136141)
This is only permitted in a std::allocator::deallocate frame.
Commit: a9dff35ad251cd20376ab25b26d1e5394e18ff4c
https://github.com/llvm/llvm-project/commit/a9dff35ad251cd20376ab25b26d1e5394e18ff4c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/CommandGuide/clang.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/extend-variable-liveness.c
Log Message:
-----------
[Clang] Enable -fextend-lifetimes at -Og (#118026)
Recently, a new flag -fextend-variable-liveness was added that prevents
optimizations from removing the values of source variables in some cases,
improving the quality of debugging for optimized builds where it is
enabled.
Following the inclusion of the flag, this patch enables it by default
when `-Og` is set. Currently, `-Og` is equivalent to `-O1` - it is
effectively just an alias. By enabling `-fextend-lifetimes`, this patch
changes the code generated by Clang with `-Og` to have reduced
optimization and greater debuggability than `-O1`, differentiating the
two according to their respective purposes. This idea was discussed
previously on Discourse where there was general agreement with the
principle of this change:
https://discourse.llvm.org/t/rfc-redefine-og-o1-and-add-a-new-level-of-og
Commit: 1fcf78d15318e3fbe384c635a0ae651be89d0686
https://github.com/llvm/llvm-project/commit/1fcf78d15318e3fbe384c635a0ae651be89d0686
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
Log Message:
-----------
[SLP]Cache data for compressed loads before codegen
Need to cache and use cached data for compressed loads before codegen to
avoid side-effects, caused by the earlier vectorization, which may
affect the analysis.
Commit: 83116209331ad6a5a45f1b8735ad5bce9e6ef761
https://github.com/llvm/llvm-project/commit/83116209331ad6a5a45f1b8735ad5bce9e6ef761
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/source/Host/common/Editline.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb] Fix lock inversion between statusline mutex and output mutex (#135956)
Fix a deadlock between the statusline mutex (in Debugger) and the output
file mutex (in LockedStreamFile). The deadlock occurs when the main
thread is calling the statusline callback while holding the output mutex
in Editline, while the default event thread is trying to update the
statusline.
Extend the uncritical section so we can redraw the statusline there.
The loop in Editline::GetCharacter should be unnecessary. It would only
loop if we had a successful read with length zero, which shouldn't be
possible or when we can't convert a partial UTF-8 character, in which
case we bail out.
rdar://149251156
Commit: 168092e2ba432c0995806470790fa5aef3d7315b
https://github.com/llvm/llvm-project/commit/168092e2ba432c0995806470790fa5aef3d7315b
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/test/CodeGen/DirectX/legalize-freeze.ll
Log Message:
-----------
[DirectX] Legalize Freeze instruction (#136043)
fixes #135719
LLVM 3.7 did not have a freeze instruction
Further this instruction is really only used as syntactic sugar
in LLVM's optimizer passes to not aggressively optimize things that
could be undef or poison ie x*2 to x+x.
Most backends treat it as a no-op so we will do the same
by removing it and replacing its uses with its input.
Commit: 1267facdc6f254fd9bd85cd8a033e7128b6e053d
https://github.com/llvm/llvm-project/commit/1267facdc6f254fd9bd85cd8a033e7128b6e053d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove duplicate dependency (#136152)
AffineDialect was duplicated in the deps list since
47f4f39265b31e2249536b74d33d63508cdfb457
Commit: 5fe91f1b5948591b75416ce529b3179234c8d93d
https://github.com/llvm/llvm-project/commit/5fe91f1b5948591b75416ce529b3179234c8d93d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/catchswitch-block-in-use.ll
Log Message:
-----------
[SLP]Check for catchswitch block before doing the analysis of the instructions
Need to skip the analysis of the catchswitch blocks to avoid a compiler
crash when trying to get the first instruction in the block.
Commit: 1f224d889dfa89a293e3efa5b04740f634454370
https://github.com/llvm/llvm-project/commit/1f224d889dfa89a293e3efa5b04740f634454370
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
A llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
Log Message:
-----------
[DebugInfo][IndVarSimplify] Propagate source loc when simplifying rem (#135399)
When IndVarSimplify simplifies a rem of the induction variable to a cmp
and select, only the select currently receives the rem's source
location; this patch propagates it to the cmp as well.
Found using https://github.com/llvm/llvm-project/pull/107279.
Commit: 8210ca019839fc5430b3a95d7caf5c829df3232a
https://github.com/llvm/llvm-project/commit/8210ca019839fc5430b3a95d7caf5c829df3232a
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/ctlz.ll
Log Message:
-----------
[SPARC] Use lzcnt to implement CTLZ when we have VIS3
Reviewers: s-barannikov, brad0, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135715
Commit: 2ef01048624dc2a564d5925d082a72a51bb97c48
https://github.com/llvm/llvm-project/commit/2ef01048624dc2a564d5925d082a72a51bb97c48
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/bitcast.ll
Log Message:
-----------
[SPARC] Use native bitcast instructions when we have VIS3
Reviewers: brad0, s-barannikov, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135716
Commit: 52e10e6c3bad782380c8a931aabca2800b53a85d
https://github.com/llvm/llvm-project/commit/52e10e6c3bad782380c8a931aabca2800b53a85d
Author: Arvind Sudarsanam <arvind.sudarsanam at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ClangOffloadPackager.rst
M clang/test/Driver/clang-sycl-linker-test.cpp
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
[SYCL] Add clang-linker-wrapper changes to call clang-sycl-linker for SYCL offloads (#135683)
This PR is one of the many PRs in the SYCL upstreaming effort focusing
on device code linking during the SYCL offload compilation process. RFC:
https://discourse.llvm.org/t/rfc-offloading-design-for-sycl-offload-kind-and-spir-targets/74088
Approved PRs so far:
1. [Clang][SYCL] Introduce clang-sycl-linker to link SYCL offloading
device code (Part 1 of many) -
[Link](https://github.com/llvm/llvm-project/pull/112245)
2. [clang-sycl-linker] Replace llvm-link with API calls -
[Link](https://github.com/llvm/llvm-project/pull/133797)
3. [SYCL][SPIR-V Backend][clang-sycl-linker] Add SPIR-V backend support
inside clang-sycl-linker -
[Link](https://github.com/llvm/llvm-project/pull/133967)
This PR adds SYCL device code linking support to clang-linker-wrapper.
### Summary for this PR
Device code linking happens inside clang-linker-wrapper. In the current
implementation, clang-linker-wrapper does the following:
1. Extracts device code. Input_1, Input_2,.....
5. Group device code according to target devices Inputs[triple_1] = ....
Inputs[triple_2] = ....
6. For each group, i.e. Inputs[triple_i], a. Gather all the offload
kinds found inside those inputs in ActiveOffloadKinds b. Link all images
inside Inputs[triple_i] by calling clang --target=triple_i .... c.
Create a copy of that linked image for each offload kind and add it to
Output[Kind] list.
In SYCL compilation flow, there is a deviation in Step 3b. We call
device code splitting inside the 'clang --target=triple_i ....' call and
the output is now a 'packaged' file containing multiple device images.
This deviation requires us to capture the OffloadKind during the linking
stage and pass it along to the linking function (clang), so that clang
can be called with a unique option '--sycl-link' that will help us to
call 'clang-sycl-linker' under the hood (clang-sycl-linker will do SYCL
specific linking).
Our current objective is to implement an end-to-end SYCL offloading flow
and get it working. We will eventually merge our approach with the
community flow.
Thanks
---------
Signed-off-by: Arvind Sudarsanam <arvind.sudarsanam at intel.com>
Commit: 9ed4c705ac1c5c8797f328694f6cd22fbcdae03b
https://github.com/llvm/llvm-project/commit/9ed4c705ac1c5c8797f328694f6cd22fbcdae03b
Author: Florian Mayer <fmayer at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/test/CodeGen/memtag-globals.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[MTE] decide whether to tag global in AsmPrinter (#135891)
there are llvm passes that would invalidate the decision we make in
clang.
Commit: 6bac20b391edce2bde348e59f5be2143157304b5
https://github.com/llvm/llvm-project/commit/6bac20b391edce2bde348e59f5be2143157304b5
Author: Florian Mayer <fmayer at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/CodeGen/memtag-globals-asm.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[MTE] do not tag zero sized globals (#136020)
Commit: 386cc00d8d0a8c211b3d25d08fce4c7e6ae36059
https://github.com/llvm/llvm-project/commit/386cc00d8d0a8c211b3d25d08fce4c7e6ae36059
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
Log Message:
-----------
[MLIR][XeGPU] Update XeGPU doc (#136155)
Commit: 7866fc2bd9f5e87ffdccecd06f5f877b81218bcd
https://github.com/llvm/llvm-project/commit/7866fc2bd9f5e87ffdccecd06f5f877b81218bcd
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
Log Message:
-----------
[RISCV] Rewrite vrgather.vx undef, (vmv.s.x), 0, v0 as vmv.v.x (#136010)
This extends the DAG combine introduced in 336b2909 to handle the case
where the prior value is defined by a vmv.s.x instead of a vmv.v.x. If
the vrgather splats the single source element, and has no passthru we
can replace it with a vmv.v.x - which will in turn usually get folded
into a vmerge if a select follows.
Commit: 3133c956c57c5b952d3289323891dcdc252ea333
https://github.com/llvm/llvm-project/commit/3133c956c57c5b952d3289323891dcdc252ea333
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker] Fix a warning
This patch fixes:
clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp:368:14: error:
moving a local object in a return statement prevents copy elision
[-Werror,-Wpessimizing-move]
Commit: f9729859446180c1f0afc386513f7476f5f220e0
https://github.com/llvm/llvm-project/commit/f9729859446180c1f0afc386513f7476f5f220e0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineGatherScatter - use FoldConstantArithmetic for truncation of constant build vectors (#136033)
No need to explicitly check with BuildVectorSDNode::isConstant - FoldConstantArithmetic can handle this, including through bitcasts etc.
Commit: d56afced16f4274c1b142a77a3282760d051cea0
https://github.com/llvm/llvm-project/commit/d56afced16f4274c1b142a77a3282760d051cea0
Author: Nicolas van Kempen <nvankemp at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/bugprone/misplaced-operator-in-strlen-in-alloc.c
M clang-tools-extra/test/clang-tidy/checkers/google/explicit-constructor.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.c
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-alias-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/raw-string-literal-delimiter.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/raw-string-literal-replace-shorter.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/shrink-to-fit.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-transparent-functors.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-using.cpp
Log Message:
-----------
[NFC][clang-tidy] Remove {{^}} clauses in some tests (2/N) (#135824)
`check_clang_tidy` now matches full lines only, so `{{^}}` clauses are
no longer necessary.
I am splitting those changes over multiple PRs to make review easier.
Numbering them but the actual order doesn't matter.
Commit: 09680dc18d460d439a89a21c69c64508457602ec
https://github.com/llvm/llvm-project/commit/09680dc18d460d439a89a21c69c64508457602ec
Author: Nicolas van Kempen <nvankemp at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/abseil/string-find-startswith.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/reserved-identifier-c.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/reserved-identifier.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/llvm/qualified-auto.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/make-unique-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/unary-static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-bool-literals-ignore-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-override-cxx98.cpp
Log Message:
-----------
[NFC][clang-tidy] Remove {{^}} clauses in some tests (3/N) (#135826)
`check_clang_tidy` now matches full lines only, so `{{^}}` clauses are
no longer necessary.
I am splitting those changes over multiple PRs to make review easier.
Numbering them but the actual order doesn't matter.
Commit: 8b46b98b916050e739cf3b740526e5c2f6936dad
https://github.com/llvm/llvm-project/commit/8b46b98b916050e739cf3b740526e5c2f6936dad
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.fpmath.ll
Log Message:
-----------
AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (#135659)
On targets that support v_cvt_pk_f16_f32 instruction, if we make v2f64
-> v2f16 Legal, we will generate the following sequence of instructions:
v_cvt_f32_f64_e32 v1, s[6:7]
v_cvt_f32_f64_e32 v2, s[4:5]
v_cvt_pk_f16_f32 v1, v2, v1
It possibly returns imprecise results due to double rounding. This patch
fixes the issue by not setting the conversion Legal. While we may still
expect the above sequence of code when unsafe fpmath is set, I hope
https://github.com/llvm/llvm-project/pull/134738 can address that
performance concern.
Fixes: SWDEV-523856
Commit: e2c382346f3d3e04a784ad69cbe11ec575b26444
https://github.com/llvm/llvm-project/commit/e2c382346f3d3e04a784ad69cbe11ec575b26444
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/test/Fir/comdat.fir
M flang/test/Fir/target-rewrite-complex.fir
Log Message:
-----------
[flang] Add 32-bit AIX target specific in order to build 32-bit flang-rt (#136051)
Commit: 206321b47a877e503dc8bfec7037566da61157fc
https://github.com/llvm/llvm-project/commit/206321b47a877e503dc8bfec7037566da61157fc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Reapply "[NFC][CFI] Avoid clang error in CFI tests" (#136030) (#136177)
PR #136030 is expected to work after #136032.
This reverts commit 6b0c8c4acd31eba83bf20ab1cf8729b2153e383c.
Commit: 9d5f16308a2a1d778b9022c3a06a3cecc6d5e066
https://github.com/llvm/llvm-project/commit/9d5f16308a2a1d778b9022c3a06a3cecc6d5e066
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/source/Target/ThreadPlanStepOut.cpp
Log Message:
-----------
[lldb][nfc] Factor out code from ThreadPlanStepOut ctor (#136159)
A future patch will need to create a new constructor for this class, and
extracting code out of its sole existing constructor will make this
easier.
This commit creates a helper function for the code computing the target
frame to step out to.
Commit: 09069088ddf8cf0ae28dce7efe181d63cb132f3a
https://github.com/llvm/llvm-project/commit/09069088ddf8cf0ae28dce7efe181d63cb132f3a
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
Log Message:
-----------
[NVPTX] Add auto-upgrade rules for fabs.{f,d,ftz.f} (#136150)
These auto-upgrade rules are required after these intrinsics were
removed in #135644
Commit: da959c92c5a46abd59d38d26d5e0758d48fb7f65
https://github.com/llvm/llvm-project/commit/da959c92c5a46abd59d38d26d5e0758d48fb7f65
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
[flang] Fixed out-of-bounds access in SimplifyIntrinsics. (#136171)
When the mask is scalar, it is incorrect to cast it to
!fir.box<!fir.array<1xlogical<>>>, because the coordinate
operation will try to read the dim-1 stride from the box
to get the address of the first element. Even though
the stride value will be multiplied by 0, and does not matter,
it is still a read past the allocated box object.
Instead, we should just use box_addr to get the address
of the scalar mask.
Commit: 06963fb9c79ae012de5796b73bb810f8da09728e
https://github.com/llvm/llvm-project/commit/06963fb9c79ae012de5796b73bb810f8da09728e
Author: Brad Smith <brad at comstyle.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/z_Linux_util.cpp
Log Message:
-----------
[OpenMP] Disable load balance on Haiku (#136082)
Haiku does not have a means of retrieving the desired information
and the -1 setting causes the code to fallback anyway.
Commit: 1042d9988764e16e5f6fd984d362042b2fadd0c6
https://github.com/llvm/llvm-project/commit/1042d9988764e16e5f6fd984d362042b2fadd0c6
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
Log Message:
-----------
disable test on older compilers (#136186)
Commit: 85110ccee90380a9d2bc930fae8fb0fa395d58d6
https://github.com/llvm/llvm-project/commit/85110ccee90380a9d2bc930fae8fb0fa395d58d6
Author: Alexander Kornienko <alexfh at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Replace most uses of for_each with range-for loops. NFC (#136146)
This removes a bit of complexity from the code, where it doesn't seem to
be justified.
Commit: b30100b87f24847afd6407b4939a184ebcf16ef9
https://github.com/llvm/llvm-project/commit/b30100b87f24847afd6407b4939a184ebcf16ef9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/test/MC/RISCV/corev/XCVmem-invalid.s
Log Message:
-----------
[RISCV] Check that both registers of a CV Reg-Reg memory address are GPRs. (#136079)
The assembly parser was checking for any register instead of GPR.
I've removed the custom diagnostic message from the RegReg operand to
give a less confusing error on bad input. The mnemonics are shared with
other encodings that don't use reg-reg memory operand.
I also fixed the parsed operand location, but I'm not sure it matters.
Commit: 295e56c0a63a06f35629c8fbabc880e835146ff1
https://github.com/llvm/llvm-project/commit/295e56c0a63a06f35629c8fbabc880e835146ff1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
Log Message:
-----------
[RISCV] Add a couple of cost model tests for shuffles requiring legalization
Commit: 1c35f8145a79b5693b1517d9f4517a1ade5a95e4
https://github.com/llvm/llvm-project/commit/1c35f8145a79b5693b1517d9f4517a1ade5a95e4
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaARM.cpp
Log Message:
-----------
[clang][SemaARM][NFC] clang-format aarch64 builtin check (#136188)
Going to modify this code so needs formatting.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 9f9c1f93819d441c561d18a73a55bcb6d8a692df
https://github.com/llvm/llvm-project/commit/9f9c1f93819d441c561d18a73a55bcb6d8a692df
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStepOut.h
M lldb/source/Target/ThreadPlanStepOut.cpp
Log Message:
-----------
[lldb][nfc] Split the constructor of ThreadPlanStepOut (#136160)
A subsequent commit will create a new constructor for ThreadPlanStepOut,
which needs to reuse much of the same logic of the existing constructor.
This commit places all of that reusable logic into a separate function.
Commit: 91f9f0fa1e3a776006fcbdb9a9c975682f35b10b
https://github.com/llvm/llvm-project/commit/91f9f0fa1e3a776006fcbdb9a9c975682f35b10b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
Log Message:
-----------
[flang][cuda] Update cuf.kernel_launch stream and conversion (#136179)
Update `cuf.kernel_launch` to take the stream as a reference. Update the
conversion to insert the `cuf.stream_cast` op so the stream can be set
as dependency.
Commit: 91c2607aace5ce910d0514dc5627651eade9c7d0
https://github.com/llvm/llvm-project/commit/91c2607aace5ce910d0514dc5627651eade9c7d0
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
Log Message:
-----------
[flang][acc] Avoid implicitly privatizing IVs already privatized (#136181)
When generating `acc.loop`, the IV was always implicitly privatized.
However, if the user explicitly privatized it, the IR generated wasn't
quite right.
For example:
```
!$acc loop private(i)
do i = 1, n
a(i) = b(i)
end do
```
The IR generated looked like:
```
%65 = acc.private varPtr(%19#0 : !fir.ref<i32>) -> !fir.ref<i32>
{implicit = true, name = "i"}
%66:2 = hlfir.declare %65 {uniq_name = "_QFEi"} : (!fir.ref<i32>) ->
(!fir.ref<i32>, !fir.ref<i32>)
%67 = acc.private varPtr(%66#0 : !fir.ref<i32>) -> !fir.ref<i32>
{name = "i"}
acc.loop private(@privatization_ref_i32 -> %65 : !fir.ref<i32>,
@privatization_ref_i32 -> %67 : !fir.ref<i32>) control(%arg0 : i32) =
(%c1_i32_46 : i32) to (%c10_i32_47 : i32) step (%c1_i32_48 : i32) {
fir.store %arg0 to %66#0 : !fir.ref<i32>
```
In order to fix this, we first process all of the clauses. Then when
attempting to generate implicit private IV, we look for an already
existing data clause operation.
The result is the following IR:
```
%65 = acc.private varPtr(%19#0 : !fir.ref<i32>) -> !fir.ref<i32>
{name = "i"}
%66:2 = hlfir.declare %65 {uniq_name = "_QFEi"} : (!fir.ref<i32>) ->
(!fir.ref<i32>, !fir.ref<i32>)
acc.loop private(@privatization_ref_i32 -> %65 : !fir.ref<i32>)
control(%arg0 : i32) = (%c1_i32_46 : i32) to (%c10_i32_47 : i32) step
(%c1_i32_48 : i32) {
fir.store %arg0 to %66#0 : !fir.ref<i32>
```
Commit: cdad39b7e007aa2a597f6fbeda28a6b269406916
https://github.com/llvm/llvm-project/commit/cdad39b7e007aa2a597f6fbeda28a6b269406916
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/LibASTImporter.rst
M llvm/docs/ProgrammersManual.rst
Log Message:
-----------
[llvm][docs] Replace `Optional<T>` with `std::optional<T>`
The `llvm::Optional` template is no more. Remove it from the error-handling section of LLVM the programmer's manual and the ASTImporter documentation.
Commit: 30013872190ca05eb00333adb989c9f74b1cf3ac
https://github.com/llvm/llvm-project/commit/30013872190ca05eb00333adb989c9f74b1cf3ac
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
A llvm/test/CodeGen/NVPTX/fp128-storage-type.ll
M llvm/test/CodeGen/NVPTX/global-variable-big.ll
Log Message:
-----------
[NVPTX] Basic support for fp128 as a storage type (#136006)
While fp128 operations are not natively supported in hardware, emulation
for them is supported by nvcc. This change adds basic support for
fp128 as a storage type allowing for lowering of IR containing these
types.
Fixes: https://github.com/llvm/llvm-project/issues/95471
Commit: b3a53cc721807f0cd0e3a1e6ddda03a85c774d4f
https://github.com/llvm/llvm-project/commit/b3a53cc721807f0cd0e3a1e6ddda03a85c774d4f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Code cleanup in Wasm disassember emitter (#135992)
- Use range for loop to iterate over instructions.
- Emit generated code in anonymous namespace instead of `llvm` and
reduce the scope of this to just the type declarations.
- Emit generated tables as static constexpr
- Replace code to search in operand table with `std::search`.
- Skip the last "null" entry in PrefixTable and use range for loop to
search PrefixTable in the .cpp code.
- Do not generate `WebAssemblyInstructionTableSize` definition as its
already defined in the .cpp file.
- Remove {} for single statement loop/if/else bodies.
Commit: 7119b0cfd3678a16664d07e3c7b15399c4b3a321
https://github.com/llvm/llvm-project/commit/7119b0cfd3678a16664d07e3c7b15399c4b3a321
Author: Bangtian Liu <liubangtian at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir-c/Dialect/Linalg.h
M mlir/lib/Bindings/Python/DialectLinalg.cpp
M mlir/lib/CAPI/Dialect/Linalg.cpp
M mlir/test/python/dialects/linalg/utils.py
Log Message:
-----------
[MLIR][CAPI][python] expose the python binding for linalgOp.getIndexingMaps (#136054)
This PR is mainly about exposing the python bindings for
`linalgOp.getIndexingMaps`.
---------
Signed-off-by: Bangtian Liu <liubangtian at gmail.com>
Commit: 889dad7f40932ea68c9e287e62441507f4f0f261
https://github.com/llvm/llvm-project/commit/889dad7f40932ea68c9e287e62441507f4f0f261
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/src/demangle/Utility.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/Utility.h
M llvm/unittests/Demangle/ItaniumDemangleTest.cpp
M llvm/unittests/Demangle/OutputBufferTest.cpp
Log Message:
-----------
[ItaniumDemangle] Add customizable printLeft/printRight APIs to OutputBuffer (#133249)
This patch includes the necessary changes for the LLDB feature proposed
in
https://discourse.llvm.org/t/rfc-lldb-highlighting-function-names-in-lldb-backtraces/85309.
The TL;DR is that we want to track where certain parts of a demangled
name begin/end so we can highlight them in backtraces.
We introduce a new `printLeft`/`printRight` API on `OutputBuffer` that a
client (in our case LLDB) can implement to track state while printing
the demangle tree. This requires redirecting all calls to to
`printLeft`/`printRight` to the `OutputBuffer`. One quirk with the new
API is that `Utility.h` would now depend on `ItaniumDemangle.h` and
vice-versa. To keep these files header-only I made the definitions
`inline` and implement the new APIs in `ItaniumDemangle.h` (so the
definition of `Node` is available to them).
Also introduces `notifyInsertion`/`notifyDeletion` APIs that a client can override to respond to cases where the `OutputBuffer` changes arbitrary parts of the name.
Commit: a0b2a952266a22ed096a7670e33a611c145e3866
https://github.com/llvm/llvm-project/commit/a0b2a952266a22ed096a7670e33a611c145e3866
Author: vporpo <vporpodas at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Constant.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantDataArray functions (#134729)
Mirrors LLVM IR.
Commit: 12becfff035a33141a0b2fb3ea5d5558738ce7eb
https://github.com/llvm/llvm-project/commit/12becfff035a33141a0b2fb3ea5d5558738ce7eb
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStepOut.h
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
Log Message:
-----------
[lldb] Create ThreadPlanStepOut ctor that never skips frames (#136163)
The function QueueThreadPlanForStepOutNoShouldStop has the semantics of
"go this parent frame"; ThreadPlanStepOut needs to respect that, not
skipping over any frames it finds uninteresting. This commit creates a
constructor that respects such instruction.
Commit: e8b506b2469cfe61efdb3c919aaf2d6c54654782
https://github.com/llvm/llvm-project/commit/e8b506b2469cfe61efdb3c919aaf2d6c54654782
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Switch to 1D representation for SIMT code (#135116)
This PR switches to using a 1D vector to represent SIMT code for simplification.
Commit: 1756fcb8b0192281db641d2038c03b96015e29d4
https://github.com/llvm/llvm-project/commit/1756fcb8b0192281db641d2038c03b96015e29d4
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/allocator_config.def
M compiler-rt/lib/scudo/standalone/combined.h
R compiler-rt/lib/scudo/standalone/local_cache.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
A compiler-rt/lib/scudo/standalone/size_class_allocator.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M compiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
M compiler-rt/lib/scudo/standalone/tsd.h
M compiler-rt/lib/scudo/standalone/tsd_shared.h
M compiler-rt/lib/scudo/standalone/type_traits.h
Log Message:
-----------
[scudo] Add primary option to enable/disable cache blocks. (#129794)
When configured this way, no primary blocks will be cached except the
batch class. Nothing else changes, no change in the page releasing
strategy.
Commit: 94aa4bfba57cd5df5489ceca5c1b4b59cfcc1288
https://github.com/llvm/llvm-project/commit/94aa4bfba57cd5df5489ceca5c1b4b59cfcc1288
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
Log Message:
-----------
[NVPTX] Fix a warning
This patch fixes:
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h:128:21: error: unused
variable '_' [-Werror,-Wunused-variable]
Commit: 209d8c8fa4fe16ef41003da17387f7c271002668
https://github.com/llvm/llvm-project/commit/209d8c8fa4fe16ef41003da17387f7c271002668
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
M clang/test/CodeGenCXX/mangle-template.cpp
Log Message:
-----------
[clang] fix unresolved dependent template specialization mangling (#136201)
This fixes a regression introduced in #133610 which was reported here
#133610 (comment) and in #136119
This redoes previous attempt in #135111
When mangling a DTST which appears in the prefix,
the template name is not actually relevant, as its prefix is part of the
nested name anyway, and a
substitution is not allowed at that position in any case.
Fixes #136119
Commit: 69b9ddc76418c6f60ce7751efb5beb1f3b3be3ff
https://github.com/llvm/llvm-project/commit/69b9ddc76418c6f60ce7751efb5beb1f3b3be3ff
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis] Restore the call to reserve (#136215)
commit 47d8fec9b8bd5425af17711317a41743a30a8cef
Author: Kazu Hirata <kazu at google.com>
Date: Wed Apr 16 19:30:01 2025 -0700
has removed the call to reserve here. This patch restores it as
std::vector::insert, called by llvm::append_range, may not be able to
deduce the size of the range. For example, std::vector in libc++
distinguishes has two versions of std::vector::insert depending on
whether the iterator is an input iterator or a foward iterator.
Commit: 20cd74a1c1555385e65d26ff22de7ef75fcb4090
https://github.com/llvm/llvm-project/commit/20cd74a1c1555385e65d26ff22de7ef75fcb4090
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[sanitizer] Apply AlwaysIn/Out in parseSanitizeArgs (#129405)
For backwards compatibility, `parseSanitizeArgs`/`parseSanitizeTrapArgs` had an incomplete refactoring in
https://github.com/llvm/llvm-project/pull/119819, in order to accommodate the special case of vptr in -fsanitize=undefined and its interaction with -fsanitize-trap=undefined. Now that vptr is no longer part of -fsanitize=undefined (https://github.com/llvm/llvm-project/pull/121115), this patch changes parseSanitizeArgs to apply the AlwaysIn/Out invariants in parseSanitizeArgs, which allows simplifying calls to parseSanitizeArgs.
This is not quite NFC: it changes the error message of -fsanitize-trap=vptr.
Commit: 0abf227c13eb80f15659f747094df2db1c34d20d
https://github.com/llvm/llvm-project/commit/0abf227c13eb80f15659f747094df2db1c34d20d
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add `amdgpu.swizzle_bitmode` op (#135513)
High level wrapper on top of `rocdl.ds_swizzle`. Also some DPP op
cleanup while I'm at here.
Will do lowering in separate PR.
Commit: 2af5e01456954f145f9713c14394ef7f2fbcbebc
https://github.com/llvm/llvm-project/commit/2af5e01456954f145f9713c14394ef7f2fbcbebc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
Log Message:
-----------
[BOLT][RISCV] Fix MCPlusBuilder instrumentation ifaces (#136211)
a) Due to the different capabilities of the functions implemented,
rename the createCmpJE function
b) Refactor the convertIndirectCallToLoad function to override the
interface.
Patch by WangJee, originally posted in #136129
Commit: 655b9db7b90236342a4085fed1fc910621f835e0
https://github.com/llvm/llvm-project/commit/655b9db7b90236342a4085fed1fc910621f835e0
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
R flang/test/HLFIR/all-elemental.fir
R flang/test/HLFIR/any-elemental.fir
R flang/test/HLFIR/count-elemental.fir
R flang/test/HLFIR/maxloc-elemental.fir
R flang/test/HLFIR/maxval-elemental.fir
R flang/test/HLFIR/minloc-elemental.fir
R flang/test/HLFIR/minval-elemental.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
Log Message:
-----------
[flang] Generalized simplification of HLFIR reduction ops. (#136071)
This change generalizes SumAsElemental inlining in
SimplifyHLFIRIntrinsics pass so that it can be applied
to ALL, ANY, COUNT, MAXLOC, MAXVAL, MINLOC, MINVAL, SUM.
This change makes the special handling of the reduction
operations in OptimizedBufferization redundant: once HLFIR
operations are inlined, the hlfir.elemental inlining should
do the rest of the job.
Commit: 9af61f500c438df9bcbe2eab47c89d25cc5db759
https://github.com/llvm/llvm-project/commit/9af61f500c438df9bcbe2eab47c89d25cc5db759
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[Fuchsia] Not building llvm-mt when LIBXML2 is not enabled." (#136216)
Reverts llvm/llvm-project#135877
This is causing some problems on Fuchsia's windows CI. We'll need a
different solution to triage other builders.
https://ci.chromium.org/ui/p/fuchsia/builders/toolchain.ci/clang-windows-x64/b8717476961063994817/overview
Commit: f0f55453a2df8c984a7a824bb3face2d7ae18a7d
https://github.com/llvm/llvm-project/commit/f0f55453a2df8c984a7a824bb3face2d7ae18a7d
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/test/CodeGen/NVPTX/fp128-storage-type.ll
Log Message:
-----------
[NVPTX] Address warning and typo in fp128 support (#136207)
Commit: 767c8c1badc03881aa97ed145ed8f0335c5a1d17
https://github.com/llvm/llvm-project/commit/767c8c1badc03881aa97ed145ed8f0335c5a1d17
Author: vporpo <vporpodas at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/docs/SandboxIR.md
M llvm/docs/Vectorizers.rst
Log Message:
-----------
[docs][SandboxIR] Fix cross-reference to sandbox vectorizer (#133768)
The cross-reference used to point to a label in the auto-vectorization
document.
Commit: f39242ceed214dfcecd6b33f22f8301ae183c677
https://github.com/llvm/llvm-project/commit/f39242ceed214dfcecd6b33f22f8301ae183c677
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
A flang/test/HLFIR/all-elemental.fir
A flang/test/HLFIR/any-elemental.fir
A flang/test/HLFIR/count-elemental.fir
A flang/test/HLFIR/maxloc-elemental.fir
A flang/test/HLFIR/maxval-elemental.fir
A flang/test/HLFIR/minloc-elemental.fir
A flang/test/HLFIR/minval-elemental.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
Log Message:
-----------
Revert "[flang] Generalized simplification of HLFIR reduction ops." (#136218)
Reverts llvm/llvm-project#136071
Commit: 69ade7c090b59373a18c38b2c80c48f97a0afcde
https://github.com/llvm/llvm-project/commit/69ade7c090b59373a18c38b2c80c48f97a0afcde
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[LV] Check if the VF is scalar by VFRange in `handleUncountableEarlyExit`. (#135294)
This patch check if the plan contains scalar VF by VFRange instead of
Plan.
This patch also clamp the range to contains either only scalar or only
vector VFs to prevent mis-compile.
Split from #113903.
Commit: 32311a6b68d3de4642599abe14922c686bdb30fc
https://github.com/llvm/llvm-project/commit/32311a6b68d3de4642599abe14922c686bdb30fc
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
R flang/test/HLFIR/all-elemental.fir
R flang/test/HLFIR/any-elemental.fir
R flang/test/HLFIR/count-elemental.fir
R flang/test/HLFIR/maxloc-elemental.fir
R flang/test/HLFIR/maxval-elemental.fir
R flang/test/HLFIR/minloc-elemental.fir
R flang/test/HLFIR/minval-elemental.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
Log Message:
-----------
Reland [flang] Generalized simplification of HLFIR reduction ops. (#136071)
This change generalizes SumAsElemental inlining in
SimplifyHLFIRIntrinsics pass so that it can be applied
to ALL, ANY, COUNT, MAXLOC, MAXVAL, MINLOC, MINVAL, SUM.
This change makes the special handling of the reduction
operations in OptimizedBufferization redundant: once HLFIR
operations are inlined, the hlfir.elemental inlining should
do the rest of the job.
Commit: f0621b31f8baee3013bec74b2789b9d5d9f9d08f
https://github.com/llvm/llvm-project/commit/f0621b31f8baee3013bec74b2789b9d5d9f9d08f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/lib/Transforms/Vectorize/VPlanTransforms.h:31:1: error: class
'VFRange' was previously declared as a struct; this is valid, but
may result in linker errors under the Microsoft C++ ABI
[-Werror,-Wmismatched-tags]
Commit: bb67de671eeda3b763ed6f1af05bd921b0ad7a29
https://github.com/llvm/llvm-project/commit/bb67de671eeda3b763ed6f1af05bd921b0ad7a29
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Enforce that libc hand-in-hand libs are headers-only. (#136219)
Extend Bazel rule implementation to enforce that all transitive
dependencies of libc_header_library targets (used to implement
hand-in-hand code sharing via headers) indeed only contain header files.
This fixes Bazel portion of PR #133126.
Commit: 62b9cbd8782b2ded15efed67ae10419e75ea0fa7
https://github.com/llvm/llvm-project/commit/62b9cbd8782b2ded15efed67ae10419e75ea0fa7
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Simplify check lines in vector-deinterleave.ll [nfc]
RV32 and RV64 are unused. Output with zvfh vs zvfhmin are the same,
so just use the weaker predicate.
Commit: ebe084f927f14be707d3ca64dab0faaf6c0eee9d
https://github.com/llvm/llvm-project/commit/ebe084f927f14be707d3ca64dab0faaf6c0eee9d
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/non-modular-decl-use.c
Log Message:
-----------
[Modules] Fix the inconsistency of which `Decl` should be serialized for an identifier. (#135887)
Fixes the assertion failure
> Assertion failed: (DeclIDs.contains(D) && "Declaration not emitted!"),
function getDeclID, file ASTWriter.cpp, line 6873.
We prepare to serialize a `Decl` by adding it to `DeclIDs` in
`ASTWriter::GetDeclRef`. But the checks before this call aren't the same
as when we are actually serializing a `Decl` in
`ASTIdentifierTableTrait::EmitData` and
`ASTWriter::WriteIdentifierTable`. That's how we can end up serializing
a `Decl` not present in `DeclIDs` and hitting the assertion. With the
assertions disabled clang crashes when trying to use a deserialized null
`Decl`.
Fix by making the code checks before `ASTWriter::GetDeclRef` call
similar to those we have before the serialization.
rdar://139319683
Commit: 7f107c301963ad1070f2130f89655fd94f2c0714
https://github.com/llvm/llvm-project/commit/7f107c301963ad1070f2130f89655fd94f2c0714
Author: Sirish Pande <sirpande at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
M llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
M llvm/test/Transforms/IndVarSimplify/exit-count-select.ll
M llvm/test/Transforms/IndVarSimplify/exit_value_test3.ll
M llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll
M llvm/test/Transforms/IndVarSimplify/pr116483.ll
M llvm/test/Transforms/IndVarSimplify/pr63763.ll
M llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
Log Message:
-----------
[IndVarsSimplify] sinkUnusedInvariants is skipping instructions while sinking. (#135205)
While sinking instructions (that are loop invariant) from preheader to
the exit block, we are skipping instructions due to decrementing
instruction iterator twice.
Commit: ce0c472791647c61f3af97c16a8c61fb351417ea
https://github.com/llvm/llvm-project/commit/ce0c472791647c61f3af97c16a8c61fb351417ea
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
A flang/test/HLFIR/all-elemental.fir
A flang/test/HLFIR/any-elemental.fir
A flang/test/HLFIR/count-elemental.fir
A flang/test/HLFIR/maxloc-elemental.fir
A flang/test/HLFIR/maxval-elemental.fir
A flang/test/HLFIR/minloc-elemental.fir
A flang/test/HLFIR/minval-elemental.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
R flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
Log Message:
-----------
Revert "Reland [flang] Generalized simplification of HLFIR reduction ops. (#136071)"
This reverts commit 32311a6b68d3de4642599abe14922c686bdb30fc.
Commit: feb1fb5f0473eb949b35fb25e15c4d32465cd6d7
https://github.com/llvm/llvm-project/commit/feb1fb5f0473eb949b35fb25e15c4d32465cd6d7
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/clang-translation.c
Log Message:
-----------
Make the `-disable-free` flag more full featured (#136213)
This lets us pass `-no-disable-free` to re-enable freeing memory for
example. This is especially helpful for library users of Clang where it
is important to not slowly leak memory.
Commit: afc5cc060b8bc44b5fd3c0a4612ebc1a1dc70826
https://github.com/llvm/llvm-project/commit/afc5cc060b8bc44b5fd3c0a4612ebc1a1dc70826
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/tools/yaml2obj/CMakeLists.txt
Log Message:
-----------
[yaml2obj] Fix shared build. NFC
Commit: 0f5c66c364a6702edf65214a4f975c3e3f326d9a
https://github.com/llvm/llvm-project/commit/0f5c66c364a6702edf65214a4f975c3e3f326d9a
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
Log Message:
-----------
[OpenACC][CIR] Fix build error from CIR upstreaming
- 'DeviceTypeArgument' is defined as 'IdentifierLoc' instead of
'std::pair<IdentifierInfo *, SourceLocation>'.
Commit: 1dbc8ef5538e25f61664d807fda236f7d983cc69
https://github.com/llvm/llvm-project/commit/1dbc8ef5538e25f61664d807fda236f7d983cc69
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/Sema/ptrauth-qualifier.c
M clang/test/Sema/ptrauth.c
M clang/test/SemaObjC/ptrauth-qualifier.m
Log Message:
-----------
[clang][ptrauth] Make ptrauth feature detection tests more robust (#136204)
The existing test behavior checked for a warning being emitted under an
#if, but if the feature detection fails the #if fails and the warning is
not expected in the output.
I've made the test more explicit, and added comments to ensure no one
simply adds/moves any expected output around.
Commit: ca9ec7dfc3a5ebad9e5c25b30511b2ed73287f61
https://github.com/llvm/llvm-project/commit/ca9ec7dfc3a5ebad9e5c25b30511b2ed73287f61
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/AST/RecordLayout.h
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/test/CodeGen/AArch64/args.cpp
M clang/test/CodeGen/aapcs64-align.cpp
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
Log Message:
-----------
[ARM, AArch64] Fix passing of structures with aligned base classes (#135564)
RecordLayout::UnadjustedAlignment was documented as "Maximum of the
alignments of the record members in characters", but
RecordLayout::getUnadjustedAlignment(), which just returns
UnadjustedAlignment, was documented as getting "the record alignment in
characters, before alignment adjustement." These are not the same thing:
the former excludes alignment of base classes, the latter takes it into
account. ItaniumRecordLayoutBuilder::LayoutBase was setting it according
to the former, but the AAPCS calling convention handling, currently the
only user, relies on it being set according to the latter.
Fixes #135551.
Commit: 5e430afb84c3cbf285d8fe15c0ae23e0920e946b
https://github.com/llvm/llvm-project/commit/5e430afb84c3cbf285d8fe15c0ae23e0920e946b
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/MC/LoongArch/Relocations/relocations.s
M llvm/test/MC/RISCV/fixups-binary-expression.s
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/linker-relaxation.s
M llvm/test/MC/RISCV/option-exact.s
M llvm/test/MC/RISCV/pseudo-jump.s
M llvm/test/MC/RISCV/relocations.s
M llvm/test/MC/RISCV/tail-call.s
M llvm/test/MC/RISCV/xqcilb-relocations.s
M llvm/test/MC/RISCV/xqcili-relocations.s
Log Message:
-----------
[test] Remove CHECK lines for MCAsmStreamer's fixup output
As mentioned in #136088 , the fixup output is a debug aid and should not
be used to test target-specific relocation generation implementation.
The llvm-mc -filetype=obj output is what truly matters.
Commit: c99ffe58af23251d83073b8ad002536edc3864ae
https://github.com/llvm/llvm-project/commit/c99ffe58af23251d83073b8ad002536edc3864ae
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in FormatToken::isObjCAccessSpecifier() (#136109)
Fix #136092
Commit: 77721986d8bd48182ba355bf166a5fa3ffbfe6b6
https://github.com/llvm/llvm-project/commit/77721986d8bd48182ba355bf166a5fa3ffbfe6b6
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/unittests/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Fix shared build. NFC
Commit: b6dff5660092e4814fa2e2cc129ba0d05ce49a52
https://github.com/llvm/llvm-project/commit/b6dff5660092e4814fa2e2cc129ba0d05ce49a52
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV] Add vizip check lines to (de)interleave tests
Reducing churn in advance of a change which makes better use of these.
Note that for very short fixed length shuffles, we already use the
vizip family instructions - but mostly in the form of zipeven/zipodd.
Commit: 50f9b34b5340cfb32d14920bb0d41a90f48ffc40
https://github.com/llvm/llvm-project/commit/50f9b34b5340cfb32d14920bb0d41a90f48ffc40
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/pr125306.ll
Log Message:
-----------
[RISCV] Prefer vmv.s.x for build_vector a, undef, ..., undef (#136164)
If we have a build vector which could be either a splat or a scalar
insert, prefer the scalar insert. At high LMUL, this reduces vector
register pressure (locally, the use will likely still be aligned), and
the amount of work performed for the splat.
Commit: a04580f71b98bdb12100da66c9975e9a1001b4d6
https://github.com/llvm/llvm-project/commit/a04580f71b98bdb12100da66c9975e9a1001b4d6
Author: Shoreshen <372660931 at qq.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
Log Message:
-----------
[AMDGPU] Implement vop3p complex pattern optmization for gisel (#130234)
Seeking opportunities to optimize VOP3P instructions by altering opsel,
opsel_hi, neg, neg_hi bits
Tests differences:
1. fix op_sel_hi bit for inline constant:
1. `CodeGen/AMDGPU/packed-fp32.ll`
2. use neg bit to remove xor with 0x80008000
1. `CodeGen/AMDGPU/strict_fsub.f16.ll`
2. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll`
3. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll`
4. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll`
5. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll`
6. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll`
7. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll`
3. Remove xor 0x80008000, and use opsel, opsel_hi to remove alignbit
1. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll`
Commit: e5263e3ec83cf662f945a067ffc83e2ed76d9aed
https://github.com/llvm/llvm-project/commit/e5263e3ec83cf662f945a067ffc83e2ed76d9aed
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Clean up tail-folding check for early-exit loops (#133931)
This patch moves the check for a single latch exit from computeMaxVF()
to LoopVectorizationLegality::canFoldTailByMasking(), as it duplicates
the logic when foldTailByMasking() returns false.
It also updates the NoScalarEpilogueNeeded logic to return false for
loops that are neither single-latch-exit nor early-exit. This avoids
applying tail-folding in unsupported cases and prevents triggering
assertions during analysis.
Commit: 0977a7130b291304dae5cfd23575ea3a4b9922ed
https://github.com/llvm/llvm-project/commit/0977a7130b291304dae5cfd23575ea3a4b9922ed
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/test/AArch64/lite-mode.s
Log Message:
-----------
[BOLT] Skip FDE emission for patch functions (#136224)
Patch functions are used to fix instructions in the original code, i.e.,
they are not functions in a traditional sense, but rather pieces of
emitted code that are embedded into real functions.
We used to emit FDEs for all functions, including patch functions.
However, FDEs for patches are not only unnecessary, but they can lead to
problems with libraries and runtimes that consume FDEs, e.g. C++
exception handling runtime.
Note that we use named patches to fix function entry points and in that
case they behave more like regular functions. Thus we issue FDEs for
those.
Commit: 5b2c743a2eb012d1e0649324ade83f23c6645a5b
https://github.com/llvm/llvm-project/commit/5b2c743a2eb012d1e0649324ade83f23c6645a5b
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProfiles.td
Log Message:
-----------
[RISCV][NFC] Add Zicsr to profiles explicitly (#136134)
To avoid some misunstandings though Zicsr is implied by F/D.
Commit: a354564a64c6ab3cafa9e5e2b31f7f14d4e27d45
https://github.com/llvm/llvm-project/commit/a354564a64c6ab3cafa9e5e2b31f7f14d4e27d45
Author: Iris <0.0 at owo.li>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
Log Message:
-----------
[RISCV] Strengthen register usage validation for XTheadMemPair loads (#136241)
Closes #136087
https://github.com/XUANTIE-RV/thead-extension-spec/blob/master/xtheadmempair/lwd.adoc
Commit: 594bfadbd683eab5e1cd40a450c25da2834f7768
https://github.com/llvm/llvm-project/commit/594bfadbd683eab5e1cd40a450c25da2834f7768
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
A llvm/test/CodeGen/LoongArch/lsx/broadcast-load.ll
Log Message:
-----------
[LoongArch] Pre-commit for broadcast load (#136070)
Commit: a3f38f27cd78e1b2753a3f29489094cfd92198fe
https://github.com/llvm/llvm-project/commit/a3f38f27cd78e1b2753a3f29489094cfd92198fe
Author: Shoreshen <372660931 at qq.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
Log Message:
-----------
Revert "[AMDGPU] Implement vop3p complex pattern optmization for gisel" (#136249)
Reverts llvm/llvm-project#130234
Commit: 64de8528dbd89cdafe32d754f37cf3da4fb5403e
https://github.com/llvm/llvm-project/commit/64de8528dbd89cdafe32d754f37cf3da4fb5403e
Author: Finn Plummer <canadienfinn at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
Log Message:
-----------
[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params (#133800)
- Defines `ParseDescriptorTableClauseParams` to establish the pattern of
how we will parse parameters in root signatures. Namely, to use
recursive descent parsing in a way that follows closely to the EBNF
notation definition in the root signature spec.
- Implements parsing of two param types: `UInt32` and `Register` to
demonstrate the parsing implementation and allow for unit testing
- Changes the calling convention to use `std::optional` return values
instead of boolean error returns and parameters by reference
Part two of implementing:
https://github.com/llvm/llvm-project/issues/126569
---------
Co-authored-by: Finn Plummer <finnplummer at microsoft.com>
Commit: 2721f5af12bdf9af29969a86351fe485af00e648
https://github.com/llvm/llvm-project/commit/2721f5af12bdf9af29969a86351fe485af00e648
Author: Fehr Mathieu <mathieu.fehr at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Prevent folding of OOB values in insert/extract (#135498)
Out of bound position values should not be folded in vector.extract and
vector.insert operations, as only in bounds constants and -1 are valid.
Fixes #134516
Commit: 6f0a35fbd3296d3f4154e19f189130edcd0980bd
https://github.com/llvm/llvm-project/commit/6f0a35fbd3296d3f4154e19f189130edcd0980bd
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCFixup.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
Log Message:
-----------
[AArch64] Use FirsRelocationKind+i fixup kinds to force relocations
For RELA targets, fixup kinds that force relocations (GOT, TLS, ALIGN,
RELAX, etc) can bypass `applyFixup` and be encoded as
`FirstRelocationKind+i`, as seen in LoongArch.
Commit: c134e99a2adf6ac3f0d7a5f15a2f384f174c80a5
https://github.com/llvm/llvm-project/commit/c134e99a2adf6ac3f0d7a5f15a2f384f174c80a5
Author: Finn Plummer <canadienfinn at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
Log Message:
-----------
Revert "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (#136252)
Reverts llvm/llvm-project#133800
Reverting to resolve the introduce naming collisions.
Commit: 23324b8b109aed1f77cb20cef476b795f33b6835
https://github.com/llvm/llvm-project/commit/23324b8b109aed1f77cb20cef476b795f33b6835
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
Log Message:
-----------
[RISCV] Move checking for constant 3/4 for XTHeadMemPair to the instruction matching stage. (#136165)
This removes a special case from processInstruction and removes an
untested range diagnostic we would print if the constant didn't fit in 3
bits.
Commit: 8c5a307bd8d406e6167a5cd3ce3c74e2e3bfb2a6
https://github.com/llvm/llvm-project/commit/8c5a307bd8d406e6167a5cd3ce3c74e2e3bfb2a6
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCXX/implicit-member-functions.cpp
A clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
Log Message:
-----------
[Clang] Bypass TAD during overload resolution if a perfect match exists (#136203)
This implements the same overload resolution behavior as GCC,
as described in https://wg21.link/p3606 (section 1-2, not 3)
If during overload resolution, there is a non-template candidate
that would be always be picked - because each of the argument
is a perfect match (ie the source and target types are the same),
we do not perform deduction for any template candidate
that might exists.
The goal is to be able to merge
https://github.com/llvm/llvm-project/pull/122423 without being too
disruptive.
This change means that the selection of the best viable candidate and
template argument deduction become interleaved.
To avoid rewriting half of Clang we store in OverloadCandidateSet
enough information to be able to deduce template candidates from
OverloadCandidateSet::BestViableFunction. Which means
the lifetime of any object used by template argument must outlive
a call to Add*Template*Candidate.
This two phase resolution is not performed for some initialization
as there are cases where template candidate are better match
in these cases per the standard. It's also bypassed for code completion.
The change has a nice impact on compile times
https://llvm-compile-time-tracker.com/compare.php?from=719b029c16eeb1035da522fd641dfcc4cee6be74&to=bf7041045c9408490c395230047c5461de72fc39&stat=instructions%3Au
Fixes https://github.com/llvm/llvm-project/issues/62096
Fixes https://github.com/llvm/llvm-project/issues/74581
Reapplies https://github.com/llvm/llvm-project/pull/133426
Commit: 49dfd72de0131e4c3f1270ef60ea54af43a3c96b
https://github.com/llvm/llvm-project/commit/49dfd72de0131e4c3f1270ef60ea54af43a3c96b
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/MC/LoongArch/Relocations/relax-tls-le.s
Log Message:
-----------
[test] Remove CHECK lines for MCAsmStreamer's fixup output
Similar to 5e430afb84c3cbf285d8fe15c0ae23e0920e946b
Commit: 7088910b9f74d49a7e0a107a2261be90c1c8bd1b
https://github.com/llvm/llvm-project/commit/7088910b9f74d49a7e0a107a2261be90c1c8bd1b
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/test/MC/AArch64/tls-relocs.s
Log Message:
-----------
MCAsmStreamer: Print relocation type number if applicable
The fixup output is a debug aid and should not be used to test
target-specific relocation generation implementation. The llvm-mc
-filetype=obj output is what truly matters.
Commit: d5f94c3915ace438359524b40cf84f3f54a0afae
https://github.com/llvm/llvm-project/commit/d5f94c3915ace438359524b40cf84f3f54a0afae
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
Log Message:
-----------
Revert "[RISCV] Strengthen register usage validation for XTheadMemPair loads (#136241)"
This reverts commit a354564a64c6ab3cafa9e5e2b31f7f14d4e27d45.
Broke tests
Commit: 65d16a8101f98199b5d2505c1e9fdf2df519814b
https://github.com/llvm/llvm-project/commit/65d16a8101f98199b5d2505c1e9fdf2df519814b
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Log Message:
-----------
[RISCV] Simplify fixup kinds that force relocations
For RELA targets, fixup kinds that force relocations (GOT, TLS, ALIGN,
RELAX, etc) can bypass `applyFixup` and be encoded as
`FirstRelocationKind+i`, as seen in LoongArch. This patch removes
redundant fixup kinds and adopts the `FirstRelocationKind+i` encoding.
The `llvm-mc -show-encoding` output no longer displays descriptive fixup
names, as this information is removed from
`RISCVAsmBackend::getFixupKindInfo`. While a backend hook could be added
to call `llvm::object::getELFRelocationTypeName`, it's unnecessary since
the relocation in `-filetype=obj` output is what truly matters.
Pull Request: https://github.com/llvm/llvm-project/pull/136088
Commit: 59288761c9a8a3d5ecc70543ba09246497117f9e
https://github.com/llvm/llvm-project/commit/59288761c9a8a3d5ecc70543ba09246497117f9e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/UnicodeCharRanges.h
M llvm/lib/Target/Mips/Mips16HardFloat.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[llvm] Use llvm::binary_search (NFC) (#136228)
Commit: b07ee6acffd4c6c19093f8a5e9f8c6c594f3c90a
https://github.com/llvm/llvm-project/commit/b07ee6acffd4c6c19093f8a5e9f8c6c594f3c90a
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
LowerTypeTests: Simplify pointer types.
Commit: 155fc76f20fec106d59701b3d320b74d46894b37
https://github.com/llvm/llvm-project/commit/155fc76f20fec106d59701b3d320b74d46894b37
Author: Iris <0.0 at owo.li>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
Log Message:
-----------
Recommit "[RISCV] Strengthen register usage validation for XTheadMemPair loads (#136241)"
With test fix.
Closes #136087
https://github.com/XUANTIE-RV/thead-extension-spec/blob/master/xtheadmempair/lwd.adoc
Commit: 2b002d68044e6b482a898c1deff578f76fa9b8a1
https://github.com/llvm/llvm-project/commit/2b002d68044e6b482a898c1deff578f76fa9b8a1
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/scudo/standalone/BUILD.gn
Log Message:
-----------
[gn] port 1756fcb8b019
Commit: f28408f3af0d4533dd1d8048c5fdcdb14b934d05
https://github.com/llvm/llvm-project/commit/f28408f3af0d4533dd1d8048c5fdcdb14b934d05
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/MC/AVR/inst-adiw.s
M llvm/test/MC/AVR/inst-andi.s
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-call.s
M llvm/test/MC/AVR/inst-cbi.s
M llvm/test/MC/AVR/inst-cpi.s
M llvm/test/MC/AVR/inst-in.s
M llvm/test/MC/AVR/inst-jmp.s
M llvm/test/MC/AVR/inst-ldd.s
M llvm/test/MC/AVR/inst-ldi.s
M llvm/test/MC/AVR/inst-lds-tiny.s
M llvm/test/MC/AVR/inst-lds.s
M llvm/test/MC/AVR/inst-ori.s
M llvm/test/MC/AVR/inst-out.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/AVR/inst-sbci.s
M llvm/test/MC/AVR/inst-sbi.s
M llvm/test/MC/AVR/inst-sbic.s
M llvm/test/MC/AVR/inst-sbis.s
M llvm/test/MC/AVR/inst-sbiw.s
M llvm/test/MC/AVR/inst-sbr.s
M llvm/test/MC/AVR/inst-std.s
M llvm/test/MC/AVR/inst-sts-tiny.s
M llvm/test/MC/AVR/inst-sts.s
M llvm/test/MC/AVR/inst-subi.s
M llvm/test/MC/AVR/modifiers.s
M llvm/test/MC/CSKY/basic-16bit.s
M llvm/test/MC/CSKY/basic.s
M llvm/test/MC/Sparc/sparc-assembly-exprs.s
M llvm/test/MC/Sparc/sparc-ctrl-instructions.s
M llvm/test/MC/Sparc/sparc-little-endian.s
M llvm/test/MC/Sparc/sparc-relocations.s
M llvm/test/MC/Sparc/sparc-synthetic-instructions.s
M llvm/test/MC/Sparc/sparc-tls-relocations.s
M llvm/test/MC/Sparc/sparc64-ctrl-instructions.s
M llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
Log Message:
-----------
[test] Remove CHECK lines for MCAsmStreamer's fixup output
The fixup output is a debug aid and should not be used to test
target-specific relocation generation implementation. The llvm-mc
-filetype=obj output is what truly matters.
Commit: a42ac55a79db071e7e6da385213c5486d4b14986
https://github.com/llvm/llvm-project/commit/a42ac55a79db071e7e6da385213c5486d4b14986
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#135750)
Commit: d27175d26e20ebc112b003c877692c06046d195b
https://github.com/llvm/llvm-project/commit/d27175d26e20ebc112b003c877692c06046d195b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#135751)
Commit: cc7fc9978fc8c9b8e1da2e283026feaf85807ea5
https://github.com/llvm/llvm-project/commit/cc7fc9978fc8c9b8e1da2e283026feaf85807ea5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[clang] Add source range to 'use of undeclared identifier' diagnostics (#117671)
Commit: e0a6905287050d57ea0413cba7f011803b1f65ef
https://github.com/llvm/llvm-project/commit/e0a6905287050d57ea0413cba7f011803b1f65ef
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_unsigned.h
Log Message:
-----------
[libc++] Simplify the generic implementation of is_{un}signed (#136095)
Commit: f4c76bba5909e9c3e542ac723b9a1c0f1c229e79
https://github.com/llvm/llvm-project/commit/f4c76bba5909e9c3e542ac723b9a1c0f1c229e79
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-installapi/Options.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[clang] Use llvm::append_range (NFC) (#136256)
This patch replaces:
llvm::copy(Src, std::back_inserter(Dst));
with:
llvm::append_range(Dst, Src);
for breavity.
One side benefit is that llvm::append_range eventually calls
llvm::SmallVector::reserve if Dst is of llvm::SmallVector.
Commit: a1583522948f966d2393e84befdc2f7fea3bf7b4
https://github.com/llvm/llvm-project/commit/a1583522948f966d2393e84befdc2f7fea3bf7b4
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[Clang][GitHub][NFC] Auto-add clang:bytecode label for PR (#136148)
Commit: 802e7309c0ab7e9966f8a98eede0231d146c6a97
https://github.com/llvm/llvm-project/commit/802e7309c0ab7e9966f8a98eede0231d146c6a97
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix TestExprDiagnostics test (#136269)
Add missing source ranges to the diagnostic output.
Commit: d1496313d7e2543f1506f71fbfd28a8e8d8a3d6e
https://github.com/llvm/llvm-project/commit/d1496313d7e2543f1506f71fbfd28a8e8d8a3d6e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
Log Message:
-----------
[CodeGen] Add another method to CFIInstBuilder (#136270)
Mainly for use by downstream targets, but it can find applications in
upstream code as well. Use it in MSP430 so that it doesn't look dead.
Commit: a99c978d1b35e30d9a0fe9db68b91e9f2815c8e9
https://github.com/llvm/llvm-project/commit/a99c978d1b35e30d9a0fe9db68b91e9f2815c8e9
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Clang] Avoid dereferencing an invalid iterator
Fix msan builds after 8c5a307bd8
https://lab.llvm.org/buildbot/#/builders/94/builds/6321
Commit: 5db95fd6ca8cae62c6ab6acf17b00c3417d2018d
https://github.com/llvm/llvm-project/commit/5db95fd6ca8cae62c6ab6acf17b00c3417d2018d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Avoid repeated hash lookups (NFC) (#136268)
Note that we don't have to worry about CallstackProfileData[Id]
default-constructing the value side of a new map entry. If that
happens, AccessHistogramSize > 0 wouldn't be true, and the new map
entry gets deleted right away.
Commit: 64ffecfc433d43a15e3d1d51886ff0e0a876a547
https://github.com/llvm/llvm-project/commit/64ffecfc433d43a15e3d1d51886ff0e0a876a547
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[DAG] isKnownNeverNaN - add DemandedElts element mask to isKnownNeverNaN calls (#135952)
Matches what we've done for computeKnownBits etc. to improve vector handling
Commit: c7daab259c3281cf8f649583993bad2536febc02
https://github.com/llvm/llvm-project/commit/c7daab259c3281cf8f649583993bad2536febc02
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Parse/ParseExpr.cpp
M clang/test/Parser/recovery.cpp
Log Message:
-----------
[Clang] Fix the trailing comma regression (#136273)
925e195 introduced a regression since which we started to accept invalid
trailing commas in many expression lists where they're not allowed by
the grammar. The issue came from the fact that an additional invalid
state - previously handled by ParseExpressionList - was overlooked in
that patch.
Fixes https://github.com/llvm/llvm-project/issues/136254
No release entry because I want to backport it.
Commit: 1db03cab70fd29fe13cb60cc102285d0d0f33957
https://github.com/llvm/llvm-project/commit/1db03cab70fd29fe13cb60cc102285d0d0f33957
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Port 697aa9995c24a977425e672d76a4a434384b16e3
Commit: 31ddaef8d18d643ff4c343d03ddfe2edae7d22a2
https://github.com/llvm/llvm-project/commit/31ddaef8d18d643ff4c343d03ddfe2edae7d22a2
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/UnreachableBlockElim.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/Hexagon/unreachable-mbb-phi-subreg.mir
M llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
Log Message:
-----------
[CodeGen][NPM] Port UnreachableMachineBlockElim to NPM (#136127)
Commit: 9bdd9dc895ade41ec24f1a9918f70b23271ac89b
https://github.com/llvm/llvm-project/commit/9bdd9dc895ade41ec24f1a9918f70b23271ac89b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-r600.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
Log Message:
-----------
AMDGPU: Mark workitem ID intrinsics with range attribute (#136196)
This avoids the need to have special handling at every use site.
Unfortunately this means we unnecessarily emit AssertZext in the DAG
(where we already directly understand the range of the intrinsic), andt
we regress in undefined cases as we don't fold out asserts on undef.
Commit: 9b8bc53a0bdc270f6d675ba7a2fe9ca9a855610d
https://github.com/llvm/llvm-project/commit/9b8bc53a0bdc270f6d675ba7a2fe9ca9a855610d
Author: Chengjun <chengjunp at Nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/test/Transforms/Util/flatten-cfg.ll
M llvm/unittests/Analysis/AliasAnalysisTest.cpp
Log Message:
-----------
[FlattenCFG] Fix an Imprecise Usage of AA (#128117)
In current `FlattenCFG`, using `isNoAlias` for two instructions is
imprecise. For example, when passing a store instruction and a load
instruction directly into `AA->isNoAlias`, it will always return
`NoAlias`. This happens because when checking the types of the two
Values, the store instruction (which has a `void` type) causes the
analysis to return `NoAlias`.
For instructions, we should use `getModRefInfo` instead of `isNoAlias`,
as aliasing is a concept of memory locations.
In this patch, `AAResults::getModRefInfo` is supported to take in two
instructions. It will check whether two instructions may access the same
memory location or not. And in `FlattenCFG`, we use this new helper
function to do the check instead of `isNoAlias`.
Unit tests and lit tests are also included to this patch.
Commit: 1d190065d92a7cc9fbe322edbfa233c2318c8839
https://github.com/llvm/llvm-project/commit/1d190065d92a7cc9fbe322edbfa233c2318c8839
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Target/LLVM/NVVM/Target.cpp
Log Message:
-----------
[mlir][target] RAII wrap moduleToObject timer to ensure call `clear` function (#136142)
As title, we need to call `Timer::clear` to avoid extra log like this:
```
===-------------------------------------------------------------------------===
...
===-------------------------------------------------------------------------===
Total Execution Time: 0.0000 seconds (0.0000 wall clock)
---Wall Time--- --- Name ---
----- ....
----- Total
```
Commit: c5d59723cbf9743f7a0534a6ca87383abb6785a7
https://github.com/llvm/llvm-project/commit/c5d59723cbf9743f7a0534a6ca87383abb6785a7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/CodeGen/p0963r3.cpp
Log Message:
-----------
[clang][bytecode] Reject constexpr-unknown values in CheckStore (#136279)
Commit: c609cd2df981d1fcbdfefa1e2601b965b9670630
https://github.com/llvm/llvm-project/commit/c609cd2df981d1fcbdfefa1e2601b965b9670630
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/Misc/warning-flags.c
A clang/test/SemaCXX/uninitialized-no-ctor.cpp
Log Message:
-----------
Give this diagnostic a diagnostic group (#136182)
I put this under -Wunitialized because that's the same group it's under
in GCC.
Fixes #41104
Commit: a8fe21f3f502a49cb05b69b0d6fa74472b93888a
https://github.com/llvm/llvm-project/commit/a8fe21f3f502a49cb05b69b0d6fa74472b93888a
Author: Andrew Savonichev <andrew.savonichev at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenCXX/visibility.cpp
Log Message:
-----------
[clang] Handle instantiated members to determine visibility (#136128)
As reported in issue #103477, visibility of instantiated member
functions used to be ignored when calculating visibility of a
specialization.
This patch modifies `getLVForClassMember` to look up for a source
template for an instantiated member, and changes `mergeTemplateLV` to
apply it.
A similar issue was reported in #31462, but it seems that `extern`
declaration with visibility prevents the function from being emitted as
hidden. This behavior seems correct, even though GCC emits it as with
default visibility instead.
Both tests from #103477 and #31462 are added as LIT tests `test72` and
`test73` respectively.
Commit: 6c4caae4495118d680fd08cadca73b8c583719c7
https://github.com/llvm/llvm-project/commit/6c4caae4495118d680fd08cadca73b8c583719c7
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Move DecoderEmitter output to anonymous namespace (#136214)
- Move the code generated by DecoderEmitter to anonymous namespace.
- Move AMDGPU's usage of this code from header file to .cpp file.
Note, we get build errors like "call to function 'decodeInstruction'
that is neither visible in the template definition nor found by
argument-dependent lookup" if we do not change AMDGPU.
Commit: c890b7376fc916c1818dc3c211a080601973aa0b
https://github.com/llvm/llvm-project/commit/c890b7376fc916c1818dc3c211a080601973aa0b
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[lldb][Telemetry] Fix unit test compile failure with LLVM_ENABLE_TELEMETRY=0 (#136115)
It needs to be `TEST_F` to access `received_entries`.
Disabling also works based on the test not the fixture name.
Build failure:
```
lldb/unittests/Core/TelemetryTest.cpp:110:17: error: use of undeclared identifier 'received_entries'
110 | ASSERT_EQ(1U, received_entries.size());
| ^
lldb/unittests/Core/TelemetryTest.cpp:112:61: error: use of undeclared identifier 'received_entries'
112 | llvm::dyn_cast<lldb_private::FakeTelemetryInfo>(received_entries[0])
| ^
```
Fixes: 159b872b37363511a359c800bcc9230bb09f2457
Commit: 6462fad3d04d1cc6ceda303a6525742c8b911e79
https://github.com/llvm/llvm-project/commit/6462fad3d04d1cc6ceda303a6525742c8b911e79
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/IR/DebugInfoMetadata.cpp
A llvm/test/DebugInfo/AArch64/merge-nested-block-loc.ll
A llvm/test/DebugInfo/AArch64/merge-nested-block-loc2.ll
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[DebugInfo] getMergedLocation: match scopes based on their location (#132286)
getMergedLocation uses a common parent scope of the two input locations
for an output location.
It doesn't consider the case when the common parent scope is from a file
other than L1's and L2's files. In that case, it produces a merged location
with an erroneous scope (https://github.com/llvm/llvm-project/issues/122846).
In some cases, such as https://github.com/llvm/llvm-project/pull/125780#issuecomment-2651657856,
L1, L2 having a common parent scope from another file indicate that
the code at L1 and L2 is included from the same source location.
With this commit, getMergedLocation detects that L1, L2, or their common parent
scope files are different. If so, it assumes that L1 and L2 were included
from some source location, and tries to attach the output location to a scope
with the nearest common source location with regard to L1 and L2.
If the nearest common location is also from another file, getMergedLocation returns it
as a merged location, assuming that L1 and L2 belong to files that were both included
in the nearest common location.
Fixes https://github.com/llvm/llvm-project/issues/122846.
Commit: e1b14d4e1c8ecca73e13a0629960d530e336a0d8
https://github.com/llvm/llvm-project/commit/e1b14d4e1c8ecca73e13a0629960d530e336a0d8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang][GPU] Fix unit test for NVPTX tid.x intrinsic (#136297)
- llvm.nvvm.read.ptx.sreg.tid.x does not have the result range attribute
yet.
Commit: 3ed83630b263f667bacd1ef1a65f26d8665c282e
https://github.com/llvm/llvm-project/commit/3ed83630b263f667bacd1ef1a65f26d8665c282e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC][LLVM][TableGen] Use `decodeULEB128` for `OPC_SoftFail` emission (#136220)
- Use `decodeULEB128` to decode +ve/-ve mask in OPC_SoftFail case.
- Use current `I`/`E` iterators as inputs to `decodeULEB128`.
Commit: db0f754c5af8e6c96770533520bf8b17fc0dc977
https://github.com/llvm/llvm-project/commit/db0f754c5af8e6c96770533520bf8b17fc0dc977
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/openmp-offload-gpu.c
M offload/DeviceRTL/CMakeLists.txt
R offload/DeviceRTL/src/exports
M offload/test/lit.cfg
Log Message:
-----------
[OpenMP] Remove 'libomptarget.devicertl.a' fatbinary and use static library (#126143)
Summary:
Currently, we build a single `libomptarget.devicertl.a` which is a
fatbinary. It is a host object file that contains the embedded archive
files for both the NVIDIA and AMDGPU targets. This was done primarily as
a convenience due to naming conflicts. Now that the clang driver for the
GPU targets can appropriate link via the per-target runtime-dir, we can
just make two separate static libraries and remove the indirection.
This patch creates two new static libraries that get installed into
```
/lib/amdgcn-amd-amdhsa/libomp.a
/lib/nvptx64-nvidia-cuda/libomp.a
```
for AMDGPU and NVPTX respectively. The link job created by the linker
wrapper now simply needs to do `-lomp` and it will search those
directories and link those static libraries. This requires far less
special handling.
This patch is a precursor to changing the build system entirely to be a
runtimes based one. Soon this target will be a standard `add_library`
and done through the GPU runtime targets.
NOTE that this actually does remove an additional optimization step.
Previously we merged all of the files into a single bitcode object and
forcibly internalized some definitions. This, instead, just treats them
like a normal static library. This may possibly affect performance for
some files, but I think it's better overall to use static library
semantics because it allows us to have an 'include-what-you-use'
relationship with the library.
Performance testing will be required. If we really need the merged blob
then we can simply pack that into a new static library.
Commit: fc1e311966c59368e63b834a42523ce104711a94
https://github.com/llvm/llvm-project/commit/fc1e311966c59368e63b834a42523ce104711a94
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
Log Message:
-----------
[mlir][memref] Fix rollback in test case during `convert-to-llvm` (#135958)
This commit is in preparation of the One-Shot Dialect Conversion
refactoring, which removes the rollback from the dialect conversion
framework.
`GenericAtomicRMWOpLowering` (`generic_atomic_rmw`) triggered a rollback
in two test cases. The lowering pattern adds additional basic blocks to
the enclosing operation, which used to be a `func.func` (now
`llvm.func`). Adding a basic block triggers legalization of the op that
owns the basic block. This fails when running
`--convert-to-llvm="filter-dialects=memref"` because no lowering
patterns for the `func` dialect were populated and only `llvm` ops are
considered "legal" by the `convert-to-llvm` pass, causing a rollback of
the entire `GenericAtomicRMWOpLowering` pattern.
Also add extra `CHECK-INTERFACE` to make sure that all test cases are
correctly lowered with `--convert-to-llvm="filter-dialects=memref"`.
Commit: 622765f976f0a76313aa38d0f549eea9affeebfd
https://github.com/llvm/llvm-project/commit/622765f976f0a76313aa38d0f549eea9affeebfd
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang][GPU] Make NVPTX check more permissive in unit test (#136301)
- Seems based on whether NVPTX backend is enabled or not, this call can
have the range() attribute or not. So make this check more permissive.
Commit: 860e88411d94b9e83cf9524d05b30a3d2d221b2c
https://github.com/llvm/llvm-project/commit/860e88411d94b9e83cf9524d05b30a3d2d221b2c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M libcxx/docs/Contributing.rst
M libcxx/include/CMakeLists.txt
R libcxx/include/module.modulemap
A libcxx/include/module.modulemap.in
A libcxx/test/libcxx/Wnon_modular_include_in_module.compile.pass.cpp
M libcxx/test/libcxx/headers_in_modulemap.sh.py
M libcxx/test/libcxx/lint/lint_headers.sh.py
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Make __config_site modular (#134699)
This patch makes the __config_site header modular, which solves various
problems with non-modular headers. This requires going back to
generating the modulemap file, since we only know how to make
__config_site modular when we're not using the per-target runtime dir.
The patch also adds a test that we support
-Wnon-modular-include-in-module, which warns about non-modular includes
from modules.
---------
Co-authored-by: Konstantin Varlamov <varconst at apple.com>
Commit: 63b8f1c9482ed0a964980df4aed89bef922b8078
https://github.com/llvm/llvm-project/commit/63b8f1c9482ed0a964980df4aed89bef922b8078
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/LowerRepackArrays.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineElementals.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/lib/Transforms/Canonicalizer.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir] add a fluent API to GreedyRewriterConfig (#132253)
This is similar to other configuration objects used across MLIR.
Commit: 730773602f8b039a575e3e48cd838174dd996520
https://github.com/llvm/llvm-project/commit/730773602f8b039a575e3e48cd838174dd996520
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/test/tools/llvm-reduce/thinlto-preserve-uselistorder.ll
Log Message:
-----------
llvm-reduce: Avoid using constantdata uselistorder in thinlto test (#136288)
This also demonstrates a bug that's a consequence of the two different
paths for the single and multithreaded cases. The parallel path goes
through bitcode serialization and does preserve the uselistorder. It
therefore survives and we can observe a reduced uselistorder with deleted
instructions. In the CloneModule case, nothing is reduced.
Commit: 35e6ca47c1b565b59a9e9f90b5239804e64819f7
https://github.com/llvm/llvm-project/commit/35e6ca47c1b565b59a9e9f90b5239804e64819f7
Author: amordo <iammorjj at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/docs/InstCombineContributorGuide.md
Log Message:
-----------
[docs] Add TOC for InstCombine contributor guide (#136293)
Commit: 20a104a7d6423784dab04371a5ca728cc27a15a9
https://github.com/llvm/llvm-project/commit/20a104a7d6423784dab04371a5ca728cc27a15a9
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/IR/test-func-erase-result.mlir
M mlir/test/lib/IR/TestFunc.cpp
Log Message:
-----------
[mlir] allow function type cloning to fail (#136300)
`FunctionOpInterface` assumed the fact that the function type (attribute
of the operation) can be cloned with arbirary lists of function
arguments and results to support argument and result list mutation. This
is not always correct, in particular, LLVM dialect functions require
exactly one result making it impossible to erase the result.
Allow function type cloning to fail and propagate this failure through
various APIs that use it. The common assumption is that existing IR has
not been modified.
Fixes #131142.
Commit: b1b065f2bf5d626fee277d67b0014577f7e4e499
https://github.com/llvm/llvm-project/commit/b1b065f2bf5d626fee277d67b0014577f7e4e499
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/icmp-dom.ll
Log Message:
-----------
[ValueTracking] Refactor `isKnownNonEqualFromContext` (#127388)
This patch avoids adding RHS for comparisons with two variable operands
(https://github.com/llvm/llvm-project/pull/118493#discussion_r1949397482).
Instead, we iterate over related dominating conditions of both V1 and V2
in `isKnownNonEqualFromContext`, as suggested by goldsteinn
(https://github.com/llvm/llvm-project/pull/117442#discussion_r1944058002).
Compile-time improvement:
https://llvm-compile-time-tracker.com/compare.php?from=c6d95c441a29a45782ff72d6cb82839b86fd0e4a&to=88464baedd7b1731281eaa0ce4438122b4d218a7&stat=instructions:u
Commit: dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23
https://github.com/llvm/llvm-project/commit/dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
A mlir/test/Conversion/AMDGPUToROCDL/swizzle.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[mlir] AMDGPUToROCDL: lower `amdgpu.swizzle_bitmode` (#136223)
Repack `amdgpu.swizzle_bitmode` arguments and lower it to
`rocdl.ds_swizzle`.
Repacking logic is follows:
* `sizeof(arg) < sizeof(i32)`: bitcast to integer and zext to i32 and
then trunc and bitcast back.
* `sizeof(arg) == sizeof(i32)`: just bitcast to i32 and back if not i32
* `sizeof(arg) > sizeof(i32)`: bitcast to `vector<Nxi32>`, extract
individual elements and do a series of `rocdl.ds_swizzle` and then
compose vector and bitcast back.
Added repacking logic to LLVM utils so it can be used elsewhere. I'm
planning to use it for `gpu.shuffle` later.
Commit: f2ecd86e34ed5323f2a8ec2259f11e9f5e9bb078
https://github.com/llvm/llvm-project/commit/f2ecd86e34ed5323f2a8ec2259f11e9f5e9bb078
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryLocation.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[Analysis] Remove implicit LocationSize conversion from uint64_t (#133342)
This change removes the uint64_t constructor on LocationSize
preventing implicit conversion, and fixes up the using APIs to adapt to
the change. Note that I'm adding a couple of explicit conversion points
on routines where passing in a fixed offset as an integer seems likely
to have well understood semantics.
We had an unfortunate case which arose if you tried to pass a TypeSize
value to a parameter of LocationSize type. We'd find the implicit
conversion path through TypeSize -> uint64_t -> LocationSize which works
just fine for fixed values, but looses information and fails assertions
if the TypeSize was scalable. This change breaks the first link in that
implicit conversion chain since that seemed to be the easier one.
Commit: d0dd6974b8850dbec0237596fedd58db4552f2ec
https://github.com/llvm/llvm-project/commit/d0dd6974b8850dbec0237596fedd58db4552f2ec
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVAttributes.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
Log Message:
-----------
[mlir][spirv] Switch to `llvm::interleaved`. NFC. (#136240)
Clean up printing code by switching to `llvm::interleaved` from
https://github.com/llvm/llvm-project/pull/135517.
Commit: 4be84a142e97d25faf7acdd2d279124d0af32b7e
https://github.com/llvm/llvm-project/commit/4be84a142e97d25faf7acdd2d279124d0af32b7e
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
Log Message:
-----------
[mlir][gpu] Clean up prints in GPU dialect. NFC. (#136250)
Clean up printing code by switching to `llvm::interleaved` from
https://github.com/llvm/llvm-project/pull/135517. Also make some minor
readability & performance fixes.
Commit: c016a65c180c8703d5bdb2a277bb1629df5517b6
https://github.com/llvm/llvm-project/commit/c016a65c180c8703d5bdb2a277bb1629df5517b6
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][vector] Switch to `llvm::interleaved` in debug prints. NFC. (#136248)
Clean up printing code by switching to `llvm::interleaved` from
https://github.com/llvm/llvm-project/pull/135517.
Commit: 257b72758424f56103d38e3d016cfb6baa4da613
https://github.com/llvm/llvm-project/commit/257b72758424f56103d38e3d016cfb6baa4da613
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/SemaSYCL/Inputs/vectorcall.hpp
A clang/test/SemaSYCL/sycl-cconv-win.cpp
Log Message:
-----------
[clang][Sema][SYCL] Fix MSVC STL usage on AMDGPU (#135979)
The MSVC STL includes specializations of `_Is_memfunptr` for every
function pointer type, including every calling convention.
The problem is the AMDGPU target doesn't support the x86 `vectorcall`
calling convention so clang sets it to the default CC. This ends up
clashing with the already-existing overload for the default CC, so we
get a duplicate definition error when including `type_traits` (which we
heavily use in the SYCL STL) and compiling for AMDGPU on Windows.
This doesn't happen for pure AMDGPU non-SYCL because it doesn't include
the C++ STL, and it doesn't happen for CUDA/HIP because a similar
workaround was done
[here](https://github.com/llvm/llvm-project/commit/fa49c3a888e816969b5ed68cd5c47efc3eb9419f).
I am not an expert in Sema, so I did a kinda of hardcoded fix, please
let me know if there is a better way to fix this.
As far as I can tell we can't do exactly the same fix that was done for
CUDA because we can't differentiate between device and host code so
easily.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: be9f72cf3716bc1de5912a457284a1973112f9a0
https://github.com/llvm/llvm-project/commit/be9f72cf3716bc1de5912a457284a1973112f9a0
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
R llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
Log Message:
-----------
Revert "[ConstraintElim] Simplify cmp after uadd.sat/usub.sat (#135603)"
This reverts commit fe54d1afcca055f464840654dd2ec3fd83aea688.
Causes miscompiles, see #135603.
Commit: 915de1a5889c4dad1ec7b77ac5c41ebabc20a8ca
https://github.com/llvm/llvm-project/commit/915de1a5889c4dad1ec7b77ac5c41ebabc20a8ca
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/test/Format/lit.local.cfg
Log Message:
-----------
Generate empty .clang-format-ignore before running tests (#136154)
Followup to #136022, this ensures formatting tests are run with an empty
`.clang-format-ignore` in their root directory, to prevent failures if
the file also exists higher in the tree.
Commit: 273aecdb2008a58593aa1baf175e5e6e2aec1df5
https://github.com/llvm/llvm-project/commit/273aecdb2008a58593aa1baf175e5e6e2aec1df5
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/io-stmt.h
Log Message:
-----------
[flang-rt] Use runtime::memchr instead of std::memchr. (#135298)
Commit: 6c5f50f18694a4d91d7ce53a14188c54ee7c6f3b
https://github.com/llvm/llvm-project/commit/6c5f50f18694a4d91d7ce53a14188c54ee7c6f3b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[Offload] Fix typo on `-Xoffload-linker`
Commit: b3d2dc321c5c78b7204696afe07fe6ef3375acfd
https://github.com/llvm/llvm-project/commit/b3d2dc321c5c78b7204696afe07fe6ef3375acfd
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/pr135206.ll
Log Message:
-----------
[RISCV] Fix assertion failure when using -fstack-clash-protection (#135248)
We can't assume MBBI is still pointing at MBB if we've already expanded
a probe. We need to re-query the MBB from MBBI. Fixes #135206
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 711301066c2e5a6842866baea50ea9346b837459
https://github.com/llvm/llvm-project/commit/711301066c2e5a6842866baea50ea9346b837459
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Add a description of the semantics of call signatures. (#136189)
This doesn't introduce anything new; it's just a reflection of the
semantics we've already had for many years.
Per discussion on #63484.
Commit: f4a47b4003b6cfbdd445615b044f0911d99a0e44
https://github.com/llvm/llvm-project/commit/f4a47b4003b6cfbdd445615b044f0911d99a0e44
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py
Log Message:
-----------
Disable test on older compilers. (#136322)
Commit: bc48b3f8b812c755c5e9c42d6b970a9c1b496578
https://github.com/llvm/llvm-project/commit/bc48b3f8b812c755c5e9c42d6b970a9c1b496578
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
A lld/test/wasm/lto/thinlto-signature-mismatch-unknown.ll
M lld/wasm/LTO.cpp
Log Message:
-----------
[lld][WebAssembly] Fix spurious signature mismatch under LTO (#136197)
When generating C++ vtables, Clang declares virtual functions as
`void(void)` when their signature is not known (e.g.parameter types are
forward-declared). As WASM type checks imports, this would conflict with
the real definition during linking. Commit 59f959ff introduced a
workaround for this by deferring signature assignment until a definition
or direct call is seen.
When performing LTO, LLD first scans the bitcode files and creates
`DefinedFunction` symbol table entries for their contents. After LTO
codegen, they are replaced with `UndefinedFunction`s (so that the
definitions will be pulled in from the native LTO-d files when they are
added). At this point, if a function is only referenced in bitcode, its
signature remains `nullptr`.
>From here, it should have behaved like in the non-LTO case: the first
direct call sets the signature. However, as the `isCalledDirectly` flag
was set to true, the missing signature was filled in by the type of the
first reference to the function, which could be a `void(void)` vtable
entry, which would then conflict with the real definition.
This commit sets `isCalledDirectly` to false so that the signature will
only be populated when a direct call is found.
See godotengine/godot#104497 and
emscripten-core/emscripten#10831
Commit: ad6c23a7b5ecd5582566a6e51c1aa8105fb3f109
https://github.com/llvm/llvm-project/commit/ad6c23a7b5ecd5582566a6e51c1aa8105fb3f109
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/InterleavedRange.h
M llvm/unittests/Support/InterleavedRangeTest.cpp
Log Message:
-----------
[Support] Allow `llvm::interleaved` with custom ostream types (#136318)
This makes `llvm::interleaved` useable with ostream types that define
custom stream operators that print in a different format from
`raw_ostream`. For example, MLIR's OpAsmPrinter prints values as
operands:
https://github.com/llvm/llvm-project/blob/6c5f50f18694a4d91d7ce53a14188c54ee7c6f3b/mlir/include/mlir/IR/OpImplementation.h#L534-L552
Commit: 4cb9a3700c31357821e192124baeb3a3a35ff93b
https://github.com/llvm/llvm-project/commit/4cb9a3700c31357821e192124baeb3a3a35ff93b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/LowerRepackArrays.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineElementals.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/lib/Transforms/Canonicalizer.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
Revert "[mlir] add a fluent API to GreedyRewriterConfig (#132253)"
This reverts commit 63b8f1c9482ed0a964980df4aed89bef922b8078.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/172/builds/12083/steps/5/logs/stdio
I've reproduced the error with a release build (-DCMAKE_BUILD_TYPE=Release).
Commit: 7da385d79729bb7aa1bfc046d3a78e350b7a4f75
https://github.com/llvm/llvm-project/commit/7da385d79729bb7aa1bfc046d3a78e350b7a4f75
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/IR/test-func-erase-result.mlir
M mlir/test/lib/IR/TestFunc.cpp
Log Message:
-----------
Revert "[mlir] allow function type cloning to fail (#136300)"
This reverts commit 20a104a7d6423784dab04371a5ca728cc27a15a9.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/157/builds/25688
I've reproduced the build failure.
Commit: 46d1cb8335e988e2a9e48b46d80c639a2364a8f9
https://github.com/llvm/llvm-project/commit/46d1cb8335e988e2a9e48b46d80c639a2364a8f9
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
R mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-unsupported.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Dialect/GPU/invalid.mlir
Log Message:
-----------
[mlir] GPUToROCDL: Add support for non-i32/f32 shuffle types (#136320)
Use recently added repacking utilities to support other datatypes.
Also, tighten `gpu.shuffle` verification to reject scalable vectors
Commit: 4c17a5c66346089bf445176c77b36d6ed91d09bd
https://github.com/llvm/llvm-project/commit/4c17a5c66346089bf445176c77b36d6ed91d09bd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp:140:10:
error: unused variable 'shflType' [-Werror,-Wunused-variable]
Commit: f696508b38d1958aac5992a98a90fe6e773e8709
https://github.com/llvm/llvm-project/commit/f696508b38d1958aac5992a98a90fe6e773e8709
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[BFI] Revert use of append_range (NFC)
This is a partial revert of #136066, which introduced a compile-time
regression. SmallVector::insert() computes the PostOrderIterator
twice in order to call reserve().
Commit: 5eabececb0a3c7e761ddda2e49430baa834f2c65
https://github.com/llvm/llvm-project/commit/5eabececb0a3c7e761ddda2e49430baa834f2c65
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M offload/test/jit/empty_kernel.inc
M offload/test/jit/empty_kernel_lvl2.c
Log Message:
-----------
[Offload] Fix JIT test
Commit: d3d9b376c01ac4dff1457a98de81eca5cbb648a1
https://github.com/llvm/llvm-project/commit/d3d9b376c01ac4dff1457a98de81eca5cbb648a1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVOptions.h
Log Message:
-----------
[DebugInfo] Call std::erase directly (NFC) (#136261)
Commit: 2a692d265bbd84dae807d470caed7be507e4118d
https://github.com/llvm/llvm-project/commit/2a692d265bbd84dae807d470caed7be507e4118d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVOptions.h
Log Message:
-----------
[DebugInfo] Use std::move (NFC) (#136263)
Commit: c244daec1cbcd221c073fc40284ee23399257684
https://github.com/llvm/llvm-project/commit/c244daec1cbcd221c073fc40284ee23399257684
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Fix Windows failure in DecoderEmitter (#136310)
- Avoid dereferencing the end() iterator to get the end pointer, instead
calculate it explicitly
- Fixes a regression introduced in
https://github.com/llvm/llvm-project/pull/136220.
- The windows build failure shows the following call stack:
```
| Exception Code: 0x80000003
| #0 0x00007ff74bc05897 std::_Vector_const_iterator<class std::_Vector_val<struct std::_Simple_types<unsigned char>>>::operator*(void) const C:\Program Files\Microsoft Visual Studio\2022\Professional\VC\Tools\MSVC\14.37.32822\include\vector:52:0
| #1 0x00007ff74bbd3d64 `anonymous namespace'::DecoderEmitter::emitTable D:\buildbot\llvm-worker\clang-cmake-x86_64-avx512-win\llvm\llvm\utils\TableGen\DecoderEmitter.cpp:852:0
```
Commit: 5e1b0f97735083b6762834b83fdbb35e76002e03
https://github.com/llvm/llvm-project/commit/5e1b0f97735083b6762834b83fdbb35e76002e03
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/tools/llvm-gpu-loader/nvptx.cpp
Log Message:
-----------
[llvm] Use llvm::less_first and llvm::less_second (NFC) (#136272)
Commit: f5947ba5a659d6b3ed62761a7afdf1626435abcb
https://github.com/llvm/llvm-project/commit/f5947ba5a659d6b3ed62761a7afdf1626435abcb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenCXX/visibility.cpp
Log Message:
-----------
Revert "[clang] Handle instantiated members to determine visibility" (#136317)
Reverts llvm/llvm-project#136128
See discussion here:
https://github.com/llvm/llvm-project/pull/136128#issuecomment-2815648110
and :
https://github.com/llvm/llvm-project/pull/136128#issuecomment-2815652846
@asavonic can re-submit once the examples provided by @jplehr and/or
@DKLoehr are fixed.
Commit: 61820156980ff20ca6e8a7a43a1e9debb950db85
https://github.com/llvm/llvm-project/commit/61820156980ff20ca6e8a7a43a1e9debb950db85
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC][LLVM][TableGen] Adjust pointer increments in DecoderEmitter (#136230)
- In both `emitTable` and the generated `decodeInstruction` function
increment the pointer to the decoder op as a part of the switch
statement instead of later on in each case.
Commit: 23020a8d01a3f58e4903c42eba4b803d5809653e
https://github.com/llvm/llvm-project/commit/23020a8d01a3f58e4903c42eba4b803d5809653e
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/subtensor-of-padtensor.mlir
Log Message:
-----------
[mlir] Add optimization to bubbleUpPadSlice pattern for no pad case (#135859)
In cases where there is no padding on a dim, we do not need to compute
new offsets, lengths and padding, for example the new test case added
can just be lowered to
```
%extracted_slice = tensor.extract_slice %arg0[%arg2, 1, 2] [%arg2, 2, 1] [1, 1, 1] : tensor<3x4x5xf32> to tensor<?x2x1xf32>
```
without this PR we will have affine maps like
```
#map = affine_map<()[s0] -> (3, s0)>
#map1 = affine_map<()[s0, s1] -> (-s0 + 3, s1)>
%0 = affine.min #map()[%arg2]
%1 = affine.min #map1()[%0, %arg2]
%extracted_slice = tensor.extract_slice %arg0[%0, 1, 2] [%1, 2, 1] [1, 1, 1] : tensor<3x4x5xf32> to tensor<?x2x1xf32>
```
which are unnecessary
Signed-off-by: Nirvedh <nirvedh at gmail.com>
Commit: 5ad32fa6973638a091891942939933a41cbb2162
https://github.com/llvm/llvm-project/commit/5ad32fa6973638a091891942939933a41cbb2162
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/test/CodeGen/Xtensa/callw.ll
M llvm/test/CodeGen/Xtensa/div.ll
M llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rem.ll
A llvm/test/MC/Xtensa/div.s
A llvm/test/MC/Xtensa/mul.s
Log Message:
-----------
[Xtensa] Implement Xtensa Mul and Div Options. (#132157)
Implement Xtensa Mul16, Mul32, Mul32High and Div32 Options. Also fix callw test.
Commit: 58774f1b1f98402c8d62cdde01c1adea067aaf96
https://github.com/llvm/llvm-project/commit/58774f1b1f98402c8d62cdde01c1adea067aaf96
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with iterator ranges (NFC) (#136258)
Commit: b2ba53172e82354e1318ae7e18c637ac2107aeca
https://github.com/llvm/llvm-project/commit/b2ba53172e82354e1318ae7e18c637ac2107aeca
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[Transforms] Construct SmallVector with iterator ranges (NFC) (#136259)
Commit: e298f16e895f1c3e5571ec1adb84f29646b84637
https://github.com/llvm/llvm-project/commit/e298f16e895f1c3e5571ec1adb84f29646b84637
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
A clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/struct.c
Log Message:
-----------
[CIR] Upstream support for record packing and padding (#136036)
This change adds support for packing and padding record types in ClangIR
and introduces some infrastructure needed for this computation.
Although union support has not been upstreamed yet, there is no good way
to report unions as NYI in the layout computation, so the code added
here includes layout computation for unions. Unions will be added soon.
Commit: fdcee2dd3687053cf8c69a24178c489d6977e93e
https://github.com/llvm/llvm-project/commit/fdcee2dd3687053cf8c69a24178c489d6977e93e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP]Reorder tree, if the reorder indices are non empty
Need to consider the ordering for all nodes with the specified ordering,
not only loads/store/extracts.
Reviewers: hiraditya, RKSimon
Reviewed By: hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/136185
Commit: 722d5890cc0d6e3879ebe43b43405f102f658e30
https://github.com/llvm/llvm-project/commit/722d5890cc0d6e3879ebe43b43405f102f658e30
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Lower e64 vector_deinterleave via ri.vunzip2{a,b} if available (#136321)
If XRivosVizip is available, the ri.vunzip2a and ri.vunzip2b can be used
to the concatenation and register deinterleave shuffle. This patch only
effects the intrinsic lowering (and thus scalable vectors because the
fixed vectors go through shuffle lowering).
Note that this patch is restricted to e64 for staging purposes only. e64
is obviously profitable (i.e. we remove a vcompress). At e32 and below,
our alternative is a vnsrl instead, and we need a bit more complexity
around lowering with fractional LMUL before the ri.vunzip2a/b versions
becomes always profitable. I'll post the followup change once this
lands.
Commit: ba273be3bd1986f891fba38016bd217b9734b6f8
https://github.com/llvm/llvm-project/commit/ba273be3bd1986f891fba38016bd217b9734b6f8
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Remove redundant gtest_main from codegen_tests, codegen_globalisel_tests, mi_tests (#135316)
For codegen_tests, codegen_globalisel_tests and mi_tests, they already
have their own `main` function defined, so there should be no need to
add `gtest_main` dependency for the main function...
- codegen_tests:
https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/TargetOptionsTest.cpp#L73
- codegen_globalisel_tests:
https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp#L978
- mi_tests:
https://github.com/llvm/llvm-project/blob/main/llvm/unittests/MI/LiveIntervalTest.cpp#L933
Commit: d79bb932785d312faa8cb8e82a0afc103436c54c
https://github.com/llvm/llvm-project/commit/d79bb932785d312faa8cb8e82a0afc103436c54c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang-rt/lib/cuda/kernel.cpp
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-stream.mlir
Log Message:
-----------
[flang][cuda] Carry over the stream information to kernel launch (#136217)
In CUDA Fortran the stream is encoded in an INTEGER(cuda_stream_kind)
variable.
This information is carried over the GPU dialect through the
`cuf.stream_cast` and the token in the GPU ops.
When converting the `gpu.launch_func` to runtime call, the
`cuf.stream_cast` becomes a no-op and the reference to the stream is
passed to the runtime.
The runtime is adapted to take integer references instead of value for
stream.
Commit: 733c250bd5b39db2fa0cd0e201730661da56cc87
https://github.com/llvm/llvm-project/commit/733c250bd5b39db2fa0cd0e201730661da56cc87
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Fix typo in comment. NFC
Commit: 9ef91677a4a2d4b017d2b96b8c89c2a9b648d6c3
https://github.com/llvm/llvm-project/commit/9ef91677a4a2d4b017d2b96b8c89c2a9b648d6c3
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
Log Message:
-----------
[clang][Dependency Scanning] Adding an API to Diagnose Invalid Negative Stat Cache Entries (#135703)
We have had numerous situations where the negatively stat cached paths
are invalidated during the build, and such invalidations lead to build
errors.
This PR adds an API to diagnose such cases.
`DependencyScanningFilesystemSharedCache::diagnoseNegativeStatCachedPaths`
allows users of the cache to ask the cache to examine all negatively
stat cached paths, and re-stat the paths using the passed-in file
system. If any re-stat succeeds, the API emits diagnostics.
rdar://149147920
Commit: 89f930a7de5df59c5a4c2bbfce9b67404b33dc63
https://github.com/llvm/llvm-project/commit/89f930a7de5df59c5a4c2bbfce9b67404b33dc63
Author: Ernesto Su <ernesto.su at intel.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/Basic/OpenMPKinds.h
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/for_order_messages.cpp
Log Message:
-----------
[clang][OpenMP] Fix/enforce order-concurrent-nestable rules (#135463)
OpenMP has restrictions on directives allowed to be strictly nested
inside a
construct with the order(concurrent) clause specified.
- OpenMP 5.0, 5.1, and 5.2 allows: 'loop', 'parallel', 'simd', and
combined directives starting with 'parallel'.
- OpenMP 6.0 allows: the above directives plus 'atomic' and
all loop-transformation directives.
Furthermore, a region that corresponds to a construct with
order(concurrent)
specified may not contain calls to the OpenMP runtime API.
This PR fixes the following issues in the current implementation:
With -fopenmp-version=50: none of the nesting restrictions above were
enforced
With -fopenmp-version=60:
1. Clang did not reject OpenMP runtime APIs encountered in the region.
2. Clang erroneously rejected combined directives starting with
parallel.
---------
Co-authored-by: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Commit: c27a9586267daebc7c586552b380a2f383b8552d
https://github.com/llvm/llvm-project/commit/c27a9586267daebc7c586552b380a2f383b8552d
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Extend llrint,lrint,lround for vectors of float (#136225)
Matching langref. Note that `llround` is different than the rest.
Commit: cab75384af8b5638822475b2dd9020b7e879f1f5
https://github.com/llvm/llvm-project/commit/cab75384af8b5638822475b2dd9020b7e879f1f5
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Only generate exit blocks for unique exit blocks.
Make sure we don't generate unnecessary blocks.
Commit: 3191cfd824771d75949b1ebf5e5fe9073b7fe746
https://github.com/llvm/llvm-project/commit/3191cfd824771d75949b1ebf5e5fe9073b7fe746
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/test/CIR/CodeGen/struct.c
Log Message:
-----------
[CIR] Upstream limited support for nested structures (#136331)
Previously when we checked to see if it was safe to create CIR for a
structure type, we were conservatively saying no if any structure was in
the process of being converted. That prevented handling nested
structures, even when it would have actually been safe to handle them.
Handling structures which recursively reference structures currently
being processed requires deferring the handling of the recursively
referenced structure, and that still isn't implemented after this
change.
This change adds the less conservative check that allows handling of
non-recursive nested structures.
Commit: 7cc4472037b43971bd3ee373fe75b5043f5abca9
https://github.com/llvm/llvm-project/commit/7cc4472037b43971bd3ee373fe75b5043f5abca9
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[RTSan][Darwin] Adjust OSSpinLock/_os_nospin_lock interceptor and tests (#132867)
These changes align with these lock types and allows builds and tests to
pass with various SDKS.
rdar://147067322
Commit: 7c51e426159a7751b062e9860e1ec71cd8fc7bb7
https://github.com/llvm/llvm-project/commit/7c51e426159a7751b062e9860e1ec71cd8fc7bb7
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/basic.c
Log Message:
-----------
[CIR] Upstream scalar support for ParenExpr (#136332)
This change adds support for handling ParenExpr in scalar expressions. A
few more places will need to be updated after structure assignment and
complex type support is in place.
Commit: 4091f4dd96d1501e007ed044fc93be1bfaafea08
https://github.com/llvm/llvm-project/commit/4091f4dd96d1501e007ed044fc93be1bfaafea08
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
R flang/test/HLFIR/all-elemental.fir
R flang/test/HLFIR/any-elemental.fir
R flang/test/HLFIR/count-elemental.fir
R flang/test/HLFIR/maxloc-elemental.fir
R flang/test/HLFIR/maxval-elemental.fir
R flang/test/HLFIR/minloc-elemental.fir
R flang/test/HLFIR/minval-elemental.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
Log Message:
-----------
Reland [flang] Generalized simplification of HLFIR reduction ops. (#136071) (#136246)
This change generalizes SumAsElemental inlining in
SimplifyHLFIRIntrinsics pass so that it can be applied
to ALL, ANY, COUNT, MAXLOC, MAXVAL, MINLOC, MINVAL, SUM.
This change makes the special handling of the reduction
operations in OptimizedBufferization redundant: once HLFIR
operations are inlined, the hlfir.elemental inlining should
do the rest of the job.
Commit: 32503013ea49f74bb63983705b6316b158d74bda
https://github.com/llvm/llvm-project/commit/32503013ea49f74bb63983705b6316b158d74bda
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
Log Message:
-----------
[mlir] harden transform.test_emit_remark_and_erase (#136307)
Executing this transform op may crash when the payload op is not
erasable. Guard against that. Since this is a test op, no additional
test is defined.
Fixes #128323.
Commit: 28c0d9d37c1f088855119ec4488943d2b4cded8c
https://github.com/llvm/llvm-project/commit/28c0d9d37c1f088855119ec4488943d2b4cded8c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/Traits.cpp
Log Message:
-----------
[mlir] Use llvm::append_range (NFC) (#136257)
This patch replaces:
llvm::copy(Src, std::back_inserter(Dst));
with:
llvm::append_range(Dst, Src);
for breavity.
One side benefit is that llvm::append_range eventually calls
llvm::SmallVector::reserve if Dst is of llvm::SmallVector.
Commit: c62afbfeda07a2018d167b2724c8dd4cf2b39920
https://github.com/llvm/llvm-project/commit/c62afbfeda07a2018d167b2724c8dd4cf2b39920
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
[mlir][linalg][gpu] Clean up printing. NFC. (#136330)
* Use `llvm::interleaved` from #135517 to simplify printing
* Avoid needless vector allocations
Commit: 430b0c44341f913552a7badf1860acc4a84033ca
https://github.com/llvm/llvm-project/commit/430b0c44341f913552a7badf1860acc4a84033ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
CodeGenPrepare: Check use_empty instead of getNumUses == 0 (#136334)
Commit: e2886705f010762d27d090cf98e11ef5169d5cf4
https://github.com/llvm/llvm-project/commit/e2886705f010762d27d090cf98e11ef5169d5cf4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
SLPVectorizer: Use use_empty instead of getNumUses (#136336)
Commit: cfc035a2b1cc2b79b9b73320f7501dac0328685d
https://github.com/llvm/llvm-project/commit/cfc035a2b1cc2b79b9b73320f7501dac0328685d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
Log Message:
-----------
Attributor: Use use_empty instead of getNumUses == 0 (#136339)
Commit: 34f34665ac11a6bbbc641696ffd869cce5b90920
https://github.com/llvm/llvm-project/commit/34f34665ac11a6bbbc641696ffd869cce5b90920
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
Log Message:
-----------
LowerGlobalDtors: Use use_empty instead of getNumUses == 0 (#136337)
Commit: 21a406c92c6cd79116a03443bccc47c1700d73db
https://github.com/llvm/llvm-project/commit/21a406c92c6cd79116a03443bccc47c1700d73db
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/type-info.h
M flang-rt/lib/runtime/derived-api.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/test/Semantics/typeinfo01.f90
Log Message:
-----------
[flang] Improve runtime SAME_TYPE_AS() (#135670)
The present implementation of the intrinsic function SAME_TYPE_AS()
yields false positive .TRUE. results for distinct derived types that
happen to have the same name.
Replace with an implementation that can now depend on derived type
information records being the same type if and only if they are at the
same location, or are PDT instantiations of the same uninstantiated
derived type. And ensure that the derived type information includes
references from instantiated PDTs to their original types. (The derived
type information format supports these references already, but they were
not being set, perhaps because the current faulty SAME_TYPE_AS
implementation didn't need them, and nothing else does.)
Fixes https://github.com/llvm/llvm-project/issues/135580.
Commit: 46387cd18420e120bbcfa3a646d48e2903a5c28c
https://github.com/llvm/llvm-project/commit/46387cd18420e120bbcfa3a646d48e2903a5c28c
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/docs/ModFiles.md
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve11.f90
Log Message:
-----------
[flang] Compile the output of -fdebug-unparse-with-modules (#135696)
The output of a compilation with the -fdebug-unparse-with-modules option
comprises its normal unparsed output along with the regenerated contents
of any modules that were required from module files. This is handy for
producing stand-alone test cases.
The modules' contents are generated by the same code that writes module
files, so they can contain some USE associations to private entities in
other modules that are necessary to complete local declarations, usually
initializers. Such USE associations to private entities are not flagged
as fatal errors when modules are read from module files, but they
currently are caught when the output produced by this option is being
read back in to the compiler.
Handle this case by softening the error to a warning when one module
uses a private entity from another with an alias containing the
non-conforming '$' character. (I could have omitted the message
altogether, but there are other valid warnings that will occur due to
undefined function result variables; further, I didn't want to provide a
general hole around the protection of private names.)
Commit: b4ff435b84f0f4e05a932c8bfa0c033c87665d5b
https://github.com/llvm/llvm-project/commit/b4ff435b84f0f4e05a932c8bfa0c033c87665d5b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/test/Parser/continuation-in-conditional-compilation.f
M flang/test/Parser/unmatched-parens.f90
M flang/test/Preprocessing/implicit-contin3.F90
Log Message:
-----------
[flang] Fix fixed-form continuations of !$ OpenMP conditional lines (#135852)
I broke fixed-form line continuation (without !$) for OpenMP !$
conditional compilation lines. Fix it.
Commit: 6a7044a7b88a2e5e4ea7f3f9c128b4fbb33233f8
https://github.com/llvm/llvm-project/commit/6a7044a7b88a2e5e4ea7f3f9c128b4fbb33233f8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Parser/openacc-parsers.cpp
A flang/test/Semantics/OpenACC/bug135810-1.f90
A flang/test/Semantics/OpenACC/bug135810-2.f90
Log Message:
-----------
[flang] Improve OpenACC SELF clause parser (#135883)
The current parser can fail on "self(x * 2)" by recognizing just "x" as
a one-element list of object names and then failing at a higher level
because it never reached the right parenthesis. Add lookahead checks and
error recovery.
Fixes https://github.com/llvm/llvm-project/issues/135810.
Commit: 32145a5e18f87e4f672bbc051f00b8d57be98eb3
https://github.com/llvm/llvm-project/commit/32145a5e18f87e4f672bbc051f00b8d57be98eb3
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang-rt/lib/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Better handling for integer input into null address (#135987)
The original descriptor-only path for I/O checks for null data addresses
and crashes with a readable message, but there's no such check on the
new fast path for formatted integer input, and so a READ into (say) a
deallocated allocatable will crash with a segfault. Put a null data
address check on the new fast path.
Commit: 544940846d5b99831307595b82818b2b4aba6377
https://github.com/llvm/llvm-project/commit/544940846d5b99831307595b82818b2b4aba6377
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/cuf19.cuf
Log Message:
-----------
[flang][CUDA] Add error & warning for device argument first dimension… (#136058)
… discontiguity
For dummy assumed-shape/-rank device arrays, test the associated actual
argument for stride-1 contiguity, and report an error when the actual
argument is known to not be stride-1 contiguous and nonempty, or a
warning when when the actual argument is not known to be empty or
stride-1 contiguous.
Commit: aac53ad4d6eafda84ca92196a62e75e96e5fad25
https://github.com/llvm/llvm-project/commit/aac53ad4d6eafda84ca92196a62e75e96e5fad25
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/include/flang/Parser/token-sequence.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/token-sequence.cpp
A flang/test/Preprocessing/exponent-bug.F90
Log Message:
-----------
[flang] Don't perform macro replacement on exponents (#136176)
See new test. I inadvertently broke this behavior with a recent fix for
another problem, because the effects of the overloaded
TokenSequence::Put() member function on token merging were confusing.
Rename and document the various overloads.
Commit: 0dd2ed4ea3b16ee0cd88becf4dc9eb5bacd08ca9
https://github.com/llvm/llvm-project/commit/0dd2ed4ea3b16ee0cd88becf4dc9eb5bacd08ca9
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[flang][OpenACC] Fix crash due to truncated scope source range (#136206)
A combined construct needs to ensure that the source range of their
initial statement is part of the source range of their scope.
Fixes https://github.com/llvm/llvm-project/issues/136076.
Commit: 03b3620538bcd2514ecf49ab03573014b3346672
https://github.com/llvm/llvm-project/commit/03b3620538bcd2514ecf49ab03573014b3346672
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang-rt/lib/runtime/edit-output.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
Log Message:
-----------
[flang] Tweak integer output under width-free I/G editing (#136316)
A recent patch fixed Fujitsu test case 0561_0168 by emitting a leading
space for "bare" (no width 'w') I and G output editing of integer
values. This fix has broken another Fujitsu test case (0561_0168), since
the leading space should not be produced at the first column of the
output record. Adjust.
Commit: daf3c985f75bae2f4f01594be2fbc02f953e7b06
https://github.com/llvm/llvm-project/commit/daf3c985f75bae2f4f01594be2fbc02f953e7b06
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
A clang/test/CIR/CodeGen/typedef.c
Log Message:
-----------
[CIR] Upstream support for typedef and type aliases (#136335)
Nothing is actually needed in ClangIR to support typedef and type
aliases, but the Decl kinds need to be explicitly ignored in the
emitDecl handlers to avoid hitting the default NYI errors. This change
does that and adds tests.
Commit: a3f8836ae84dd697e096446d3ca666461da839ed
https://github.com/llvm/llvm-project/commit/a3f8836ae84dd697e096446d3ca666461da839ed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
Log Message:
-----------
AMDGPU: Regenerate baseline checks
Clean up now unnecessary second check prefix.
Commit: 7c9f4f1128ce6fd87aa274089b7c4271185331d9
https://github.com/llvm/llvm-project/commit/7c9f4f1128ce6fd87aa274089b7c4271185331d9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/test/Semantics/OpenACC/acc-kernels.f90
M llvm/include/llvm/Frontend/OpenACC/ACC.td
Log Message:
-----------
[flang][openacc] Make num_gangs, num_workers and vector_length behavior homogenous with parallel (#136341)
Commit: 15e662bf0646200d1fbe28a651fc8d4247bd13cf
https://github.com/llvm/llvm-project/commit/15e662bf0646200d1fbe28a651fc8d4247bd13cf
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/Intrinsics/getpid.f90
M flang/test/Lower/Intrinsics/time.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-declare-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-private-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
Log Message:
-----------
[NFC][flang] Removed literal numerical references from some LIT tests. (#136346)
Commit: 058992ea9fc62a9f79ab90eaebecb267469795a7
https://github.com/llvm/llvm-project/commit/058992ea9fc62a9f79ab90eaebecb267469795a7
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
[lldb] Fix Python GIL-not-held issue in CreateStructuredDataFromScriptObject (#136309)
TestStructuredDataAPI.py fails with Python debug build ver. 3.12+ due to
call to Py_XINCREF while GIL is not held.
Commit: e5f326044fdca0ba8a4ce42cafd0927776bcabff
https://github.com/llvm/llvm-project/commit/e5f326044fdca0ba8a4ce42cafd0927776bcabff
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] Port 860e88411d94
Commit: 30747cfe41f5d4f0b0083750ba9c20cfcccec117
https://github.com/llvm/llvm-project/commit/30747cfe41f5d4f0b0083750ba9c20cfcccec117
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[ci] add all projects as dependencies of ci (#136153)
Add all projects as dependencies of .ci, to make sure everything is
tested when it changes.
Originally split-off from #135499
Commit: e232d28eff876b1babbb731f1a0e5502c611a0ee
https://github.com/llvm/llvm-project/commit/e232d28eff876b1babbb731f1a0e5502c611a0ee
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
R llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
R llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
M llvm/unittests/Transforms/Vectorize/VPlanSlpTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Move plain CFG construction to VPlanConstruction. (NFC)
Follow-up as discussed in https://github.com/llvm/llvm-project/pull/129402.
After bc03d6cce257, the VPlanHCFGBuilder doesn't actually build a HCFG
any longer. Move what remains directly into VPlanConstruction.cpp.
Commit: 9c3ffa7940c5acd8ec48723748199fe9ed368fde
https://github.com/llvm/llvm-project/commit/9c3ffa7940c5acd8ec48723748199fe9ed368fde
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port e232d28eff87
Commit: 3ad353c91a0e759df5adb2d27c8b1ae214acab4f
https://github.com/llvm/llvm-project/commit/3ad353c91a0e759df5adb2d27c8b1ae214acab4f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
OMPIRBuilder: Avoid getNumUses (#136350)
Commit: 34e78093975b7c3be0fbd088429d8124702d8336
https://github.com/llvm/llvm-project/commit/34e78093975b7c3be0fbd088429d8124702d8336
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/LazyCallGraphTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ValueHandleTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
Log Message:
-----------
unittests: Avoid using getNumUses (#136352)
Commit: f2c175f626df67a028e2c56c56db76980135b72f
https://github.com/llvm/llvm-project/commit/f2c175f626df67a028e2c56c56db76980135b72f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
Log Message:
-----------
OpenMPOpt: Avoid using getNumUses (#136349)
Commit: 5dcfa6146f8f44b0ba9937a37c612d54be6f95e7
https://github.com/llvm/llvm-project/commit/5dcfa6146f8f44b0ba9937a37c612d54be6f95e7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
Log Message:
-----------
NVPTX: Avoid getNumUses (#136351)
Commit: a79e257ff15504fca877601c842b91244e3c0ab0
https://github.com/llvm/llvm-project/commit/a79e257ff15504fca877601c842b91244e3c0ab0
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smoothstep.ll
Log Message:
-----------
[HLSL] XFAIL `smoothstep.ll` and `SV_GroupIndex.ll` SPIR-V backend tests (#136343)
When SPIRV-Tools is enabled, tests that specify the target environment
`vulkan1.3` in the validation step fail. This is because SPIRV-Tools
seems to have [grown some capability checks for vulkan
1.3](https://github.com/KhronosGroup/SPIRV-Tools/commit/7e41c7130f8258bf2d62179d8d6dbf3b68a7978b).
The failing tests are:
- `CodeGen/SPIRV/hlsl-intrinsics/SV_GroupIndex.ll`
- `CodeGen/SPIRV/hlsl-intrinsics/smoothstep.ll`
For now, the fix is to XFAIL these tests to unblock the pipeline.
Issue #136344 tracks the long-term solution for this.
Commit: d36ce05237ce5e2c1f9d6cccc79e23241d661999
https://github.com/llvm/llvm-project/commit/d36ce05237ce5e2c1f9d6cccc79e23241d661999
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
Log Message:
-----------
ComplexDeinterleaving: Avoid using getNumUses (#136354)
Commit: 540ea4ddff75f7bdec41533c1e9059b6a4ec81c1
https://github.com/llvm/llvm-project/commit/540ea4ddff75f7bdec41533c1e9059b6a4ec81c1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
Log Message:
-----------
ARM: Avoid using getNumUses (#136355)
Commit: aed4ecc456a00385b8be04c3e3b4680a09c24463
https://github.com/llvm/llvm-project/commit/aed4ecc456a00385b8be04c3e3b4680a09c24463
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/and-or-setcc.ll
M llvm/test/CodeGen/X86/and-or-setcc.ll
Log Message:
-----------
[DAGCombiner] Fold and/or of NaN SETCC - tests follow up (#136168)
Follow up to #135645 to address test cleanup review.
Commit: 0baa0b38ae105d3b0ec30000960cf31bfcd057de
https://github.com/llvm/llvm-project/commit/0baa0b38ae105d3b0ec30000960cf31bfcd057de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
Log Message:
-----------
AArch64: Use use_empty instead of getNumUses == 0 (#136356)
Commit: d1cce66469d0739f332b11fdb0fa2a441b1e0483
https://github.com/llvm/llvm-project/commit/d1cce66469d0739f332b11fdb0fa2a441b1e0483
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
A clang/lib/Sema/SemaOpenACCClauseAppertainment.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-set-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/combined-construct-if-clause.c
M clang/test/SemaOpenACC/combined-construct-num_gangs-clause.c
M clang/test/SemaOpenACC/combined-construct-num_workers-clause.c
M clang/test/SemaOpenACC/combined-construct-tile-clause.cpp
M clang/test/SemaOpenACC/combined-construct-vector_length-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.c
M clang/test/SemaOpenACC/compute-construct-num_workers-clause.c
M clang/test/SemaOpenACC/compute-construct-vector_length-clause.c
M clang/test/SemaOpenACC/data-construct-copy-clause.c
M clang/test/SemaOpenACC/data-construct-copyin-clause.c
M clang/test/SemaOpenACC/data-construct-copyout-clause.c
M clang/test/SemaOpenACC/data-construct-create-clause.c
M clang/test/SemaOpenACC/data-construct-default-clause.c
M clang/test/SemaOpenACC/data-construct-delete-clause.c
M clang/test/SemaOpenACC/data-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct-no_create-clause.c
M clang/test/SemaOpenACC/data-construct-use_device-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
M clang/test/SemaOpenACC/init-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/loop-construct-tile-clause.cpp
M clang/test/SemaOpenACC/no-empty-pqr-list.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/test/SemaOpenACC/set-construct.cpp
M clang/test/SemaOpenACC/shutdown-construct.cpp
M clang/test/SemaOpenACC/update-construct.cpp
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenACC/ACC.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[OpenACC] Switch Clang to use the Flang 'appertainment' rules for cla… (#135372)
…uses
The Flang implemenation of OpenACC uses a .td file in the llvm/Frontend
directory to determine appertainment in 4 categories:
-Required: If this list has items in it, the directive requires at least
1 of these be present.
-AllowedExclusive: Items on this list are all allowed, but only 1 from
the list may be here (That is, they are exclusive of eachother).
-AllowedOnce: Items on this list are all allowed, but may not be
duplicated.
Allowed: Items on this list are allowed. Note th at the actual list of
'allowed' is all 4 of these lists together.
This is a draft patch to swtich Clang over to use those tables. Surgery
to get this to happen in Clang Sema was somewhat reasonable. However,
some gaps in the implementations are obvious, the existing clang
implementation disagrees with the Flang interpretation of it. SO, we're
keeping a task list here based on what gets discovered.
Changes to Clang:
- [x] Switch 'directive-kind' enum conversions to use tablegen See
ff1a7bddd9435b6ae2890c07eae60bb07898bbf5
- [x] Switch 'clause-kind' enum conversions to use tablegen See
ff1a7bddd9435b6ae2890c07eae60bb07898bbf5
- [x] Investigate 'parse' test differences to see if any new
disagreements arise.
- [x] Clang/Flang disagree as to whether 'collapse' can be multiple
times on a loop. Further research showed no prose to limit this, and the
comment on the clang implementation said "no good reason to allow", so
no standards justification.
- [x] Clang/Flang disagree whether 'num_gangs' can appear >1 on a
compute/combined construct. This ended up being an unjustified
restriction.
- [x] Clang/Flang disagree as to the list of required clauses on a 'set'
construct. My research shows that Clang mistakenly included 'if' in the
list, and that it should be just 'default_async', 'device_num', and
'device_type'.
- [x] Order of 'at least one of' diagnostic has changed. Tests were
updated.
- [x] Ensure we are properly 'de-aliasing' clause names in appertainment
checks?
- [x] What is 'shortloop'? 'shortloop' seems to be an old non-standard
extension that isn't supported by flang, but is parsed for backward
compat reasons. Clang won't parse, but we at least have a spot for it in
the clause list.
- [x] Implemented proposed change for 'routine' gang/worker/vector/seq.
(see issue 539)
- [x] Implement init/shutdown can only have 1 'if' (see issue 540)
- [x] Clang/Flang disagree as to whether 'tile' is permitted more than
once on a 'loop' or combined constructs (Flang prohibits >1). I see no
justification for this in the standard. EDIT: I found a comment in clang
that I did this to make SOMETHING around duplicate checks easier.
Discussion showed we should actually have a better behavior around
'device_type' and duplicates, so I've since implemented that.
- [x] Clang/Flang disagree whether 'gang', 'worker', or 'vector' may
appear on the same construct as a 'seq' on a 'loop' or 'combined'. There
is prose for this in 2022: (a gang, worker, or vector clause may not
appear if a 'seq' clause appears). EDIT: These don't actually disagree,
but aren't in the .td file, so I restored the existing code to do this.
- [x] Clang/Flang disagree on whether 'bind' can appear >1 on a
'routine'. I believe line 3096 (A bind clause may not bind to a routine
name that has a visible bind clause) makes this limitation (Flang
permits >1 bind). we discussed and decided this should have the same
rules as worker/vector/etc, except without the 'exactly 1 of' rule (so
no dupes in individual sections).
- [x] Clang/Flang disagree on whether 'init'/'shutdown' can have
multiple 'device_num' clauses. I believe there is no supporting prose
for this limitation., We decided that `device_num` should only happen
1x.
- [x] Clang/Flang disagree whether 'num_gangs' can appear >1 on a
'kernels' construct. Line 1173 (On a kernels construct, the num_gangs
clause must have a single argument) justifies limiting on a
per-arguement basis, but doesn't do so for multiple num_gangs clauses.
WE decided to do this with the '1-per-device-type' region for num_gangs,
num_workers, and vector_length, see openacc bug here:
https://github.com/OpenACC/openacc-spec/issues/541
Changes to Flang:
- [x] Clang/Flang disgree on whether 'atomic' can take an 'if' clause.
This was added in OpenACC3.3_Next See #135451
- [x] Clang/Flang disagree on whether 'finalize' can be allowed >1 times
on a 'exit_data' construct. see #135415.
- [x] Clang/Flang disagree whether 'if_present' should be allowed >1
times on a 'host_data'/'update' construct. see #135422
- [x] Clang/Flang disagree on whether 'init'/'shutdown' can have
multiple 'device_type' clauses. I believe there is no supporting prose
for this limitation.
- [ ] SEE change for num_gangs/etc above.
Changes that need discussion/research:
Commit: 9e46830f4ad340ffcbe11174139013c36d5428d9
https://github.com/llvm/llvm-project/commit/9e46830f4ad340ffcbe11174139013c36d5428d9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port d1cce66469d0
Commit: eec1af21c0828544fc49ee1a982a9cdef455b92a
https://github.com/llvm/llvm-project/commit/eec1af21c0828544fc49ee1a982a9cdef455b92a
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Sema/CMakeLists.txt
Log Message:
-----------
Fix build regression from d1cce66469d0739f332b11fdb0fa2a441b1e0483
Commit: 59eafd1bdc2881b18639c8798997313c2dab0b80
https://github.com/llvm/llvm-project/commit/59eafd1bdc2881b18639c8798997313c2dab0b80
Author: Dan Liew <dan at su-root.co.uk>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaBoundsSafety.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/Sema/attr-counted-by-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-counted-by-or-null-last-field.c
M clang/test/Sema/attr-counted-by-or-null-late-parsed-struct-ptrs.c
A clang/test/Sema/attr-counted-by-or-null-struct-ptrs-completable-incomplete-pointee.c
M clang/test/Sema/attr-counted-by-or-null-struct-ptrs.c
A clang/test/Sema/attr-counted-by-struct-ptrs-completable-incomplete-pointee.c
M clang/test/Sema/attr-counted-by-struct-ptrs.c
M clang/test/Sema/attr-counted-by-vla.c
Log Message:
-----------
[BoundsSafety][Sema] Allow counted_by and counted_by_or_null on pointers where the pointee type is incomplete but potentially completable (#106321)
Previously using the `counted_by` or `counted_by_or_null` attribute on a
pointer with an incomplete pointee type was forbidden. Unfortunately
this prevented a situation like the following from being allowed.
Header file:
```
struct EltTy; // Incomplete type
struct Buffer {
size_t count;
struct EltTy* __counted_by(count) buffer; // error before this patch
};
```
Implementation file:
```
struct EltTy {
// definition
};
void allocBuffer(struct Buffer* b) {
b->buffer = malloc(sizeof(EltTy)* b->count);
}
```
To allow code like the above but still enforce that the pointee
type size is known in locations where `-fbounds-safety` needs to
emit bounds checks the following scheme is used.
* For incomplete pointee types that can never be completed (e.g. `void`)
these are treated as error where the attribute is written (just like
before this patch).
* For incomplete pointee types that might be completable later on
(struct, union, and enum forward declarations)
in the translation unit, writing the attribute on the incomplete
pointee type is allowed on the FieldDecl declaration but "uses" of the
declared pointer are forbidden if at the point of "use" the pointee
type is still incomplete.
For this patch a "use" of a FieldDecl covers:
* Explicit and Implicit initialization (note see **Tentative Definition
Initialization** for an exception to this)
* Assignment
* Conversion to an lvalue (e.g. for use in an expression)
In the swift lang fork of Clang the `counted_by` and
`counted_by_or_null` attribute are allowed in many more contexts. That
isn't the case for upstream Clang so the "use" checks for the attribute
on VarDecl, ParamVarDecl, and function return type have been omitted
from this patch because they can't be tested. However, the
`BoundsSafetyCheckAssignmentToCountAttrPtrWithIncompletePointeeTy` and
`BoundsSafetyCheckUseOfCountAttrPtrWithIncompletePointeeTy` functions
retain the ability to emit diagnostics for these other contexts to avoid
unnecessary divergence between upstream Clang and Apple's internal fork.
Support for checking "uses" will be upstreamed when upstream Clang
allows the `counted_by` and `counted_by_or_null` attribute in additional
contexts.
This patch has a few limitations:
** 1. Tentative Defition Initialization **
This patch currently allows something like:
```
struct IncompleteTy;
struct Buffer {
int count;
struct IncompleteTy* __counted_by(count) buf;
};
// Tentative definition
struct Buffer GlobalBuf;
```
The Tentative definition in this example becomes an actual definition
whose initialization **should be checked** but it currently isn't.
Addressing this problem will be done in a subseqent patch.
** 2. When the incomplete pointee type is a typedef diagnostics are slightly misleading **
For this situation:
```
struct IncompleteTy;
typedef struct IncompleteTy Incomplete_t;
struct Buffer {
int count;
struct IncompleteTy* __counted_by(count) buf;
};
void use(struct Buffer b) {
b.buf = 0x0;
}
```
This code emits `note: forward declaration of 'Incomplete_t' (aka
'struct IncompleteTy')` but the location is on the `struct
IncompleteTy;` forward declaration. This is misleading because
`Incomplete_t` isn't actually forward declared there (instead the
underlying type is). This could be resolved by additional diagnostics
that walk the chain of typedefs and explain each step of the walk.
However, that would be very verbose and didn't seem like a direction
worth pursuing.
rdar://133600117
Commit: 15ea45b100af4f97c5e6e7aca3168e4b8fb9c9fa
https://github.com/llvm/llvm-project/commit/15ea45b100af4f97c5e6e7aca3168e4b8fb9c9fa
Author: Brad Smith <brad at comstyle.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[sanitizer_common] Updated build fix for newer NetBSD (#134742)
Co-authored-by: Thomas Klausner <wiz at gatalith.at>
Commit: 808f63824acec53d60252bef0bd0f6876b3de0c9
https://github.com/llvm/llvm-project/commit/808f63824acec53d60252bef0bd0f6876b3de0c9
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M .ci/monolithic-linux.sh
Log Message:
-----------
[ci] set up llvm-symbolizer environment variable (#136156)
Set up llvm-symbolizer environment variable so that its preferred over
any symbolizer just built, as it can be much slower when built for
debugging.
Commit: 2ce97fd43c929404d3420aee7c0f24ef6731f2c5
https://github.com/llvm/llvm-project/commit/2ce97fd43c929404d3420aee7c0f24ef6731f2c5
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M .ci/monolithic-linux.sh
Log Message:
-----------
[ci] upload any generated clang reproducers as artifacts (#136157)
Make sure any generated clang reproducers end up as artifacts.
Commit: 7f41095db59526f0e83940cdeb2d7f0a117709c2
https://github.com/llvm/llvm-project/commit/7f41095db59526f0e83940cdeb2d7f0a117709c2
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
Log Message:
-----------
[AArch64] Use helper class for emitting CFI instructions into MIR (NFCI) (#136004)
Pull Request: https://github.com/llvm/llvm-project/pull/136004
Commit: db97d56c97513d561cfdc3a0b1df6c5b5b909d42
https://github.com/llvm/llvm-project/commit/db97d56c97513d561cfdc3a0b1df6c5b5b909d42
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/nf-regressions.ll
Log Message:
-----------
[X86][APX] Handle AND_NF instruction for compare peephole (#136233)
Commit: 50db7a7d269b42f0cda63eb005aadfdbe25f56cb
https://github.com/llvm/llvm-project/commit/50db7a7d269b42f0cda63eb005aadfdbe25f56cb
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Driver/emit-mlir.f90
M flang/test/Lower/HLFIR/calls-f77.f90
A flang/test/Lower/HLFIR/dummy-scope.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/main_location.f90
A flang/test/Transforms/tbaa-with-dummy-scope2.fir
Log Message:
-----------
[flang] Fixed fir.dummy_scope generation to work for TBAA. (#136382)
The nesting of fir.dummy_scope operations defines the roots
of the TBAA forest. If we do not generate fir.dummy_scope
in functions that do not have any dummy arguments, then
the globals accessed in the function and the dummy arguments
accessed by the callee may end up in different sub-trees
of the same root. The added tbaa-with-dummy-scope2.fir
demonstrates the issue.
Commit: 5c4e6c61136f5edbaf779bdcf1bda0ed88c7c3ff
https://github.com/llvm/llvm-project/commit/5c4e6c61136f5edbaf779bdcf1bda0ed88c7c3ff
Author: Rafael Auler <rafaelauler at fb.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/nobits-symbol.s
Log Message:
-----------
[BOLT] Don't choke on nobits symbols (#136384)
Commit: 9e3982d9ae8173171cd7247ee505e9c02079c6bf
https://github.com/llvm/llvm-project/commit/9e3982d9ae8173171cd7247ee505e9c02079c6bf
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M libcxx/include/__algorithm/sort.h
M libcxx/include/__bit/countl.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__hash_table
Log Message:
-----------
[libc++] Replace __libcpp_{ctz, clz} with __builtin_{ctzg, clzg} (#133920)
`__libcpp_{ctz, clz}` were previously used as fallbacks for `__builtin_{ctzg, clzg}` to ensure compatibility with older compilers (Clang 18 and earlier), as `__builtin_{ctzg, clzg}` became available in Clang 19. Now that support for Clang 18 has been officially dropped in #130142, we can now safely replace all instances of `__libcpp_{ctz, clz}` with `__count{l,r}_zero` (which internally call `__builtin_{ctzg, clzg}` and eliminate the fallback logic.
Closes #131179.
Commit: 062db99353749ec73a19b030b5553beee59cb0c0
https://github.com/llvm/llvm-project/commit/062db99353749ec73a19b030b5553beee59cb0c0
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/Mapper.cpp
Log Message:
-----------
[clang-doc][NFC] Use destructuring in Mapper.cpp (#135515)
Destructuring makes the intent a bit clearer over first/second.
Commit: 5c3789811fd5b50df1178e7068efb75c5b359383
https://github.com/llvm/llvm-project/commit/5c3789811fd5b50df1178e7068efb75c5b359383
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/test/clang-doc/basic-project.test
Log Message:
-----------
[clang-doc] Handle static members and functions (#135457)
clang-doc didn't visit VarDecl, and hence never collected info
from class statics members and functions.
Fixes #59813.
Commit: 667209e45122d0cb7a4c2ac27018d31165b1be70
https://github.com/llvm/llvm-project/commit/667209e45122d0cb7a4c2ac27018d31165b1be70
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/CMakeLists.txt
A llvm/include/llvm/Config/Targets.h.cmake
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
Config: Move LLVM_HAS_*_TARGET definitions to a new header.
When enabling or disabling a target we typically need to rebuild most
of LLVM because of the change to the values of the LLVM_HAS_*_TARGET
macros in llvm-config.h, which is included by most of the code, but
are unused by LLVM itself. To avoid this, move the LLVM_HAS_*_TARGET
macros to a separate header, Targets.h.
Update the only in-tree user of the macros (MLIR) to refer to the new
header. I expect that out-of-tree users will detect the change either
at compile time if they build with -Wundef, or at runtime. As far as
I can tell, the usage of these macros is rare in out-of-tree projects,
I found no out-of-tree users in projects indexed by Debian code search
[1], and one user [2] in projects indexed by GitHub code search [3]
(excluding forks of LLVM).
[1] https://codesearch.debian.net/search?q=%23.*LLVM_HAS_.*_TARGET&literal=0
[2] https://github.com/AndreyPavlenko/graph-compiler/blob/238706b12b63945dc490f9f5f33a2d20b3c58944/lib/gc/Target/LLVM/XeVM/Target.cpp#L72
[3] https://github.com/search?q=%2F%23.*LLVM_HAS_.*_TARGET%2F&type=code
Reviewers: nico, grypp, mstorsjo, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/136388
Commit: c64f670255d3fa279f026994da2cd80f3394e0c8
https://github.com/llvm/llvm-project/commit/c64f670255d3fa279f026994da2cd80f3394e0c8
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a crash in EnumTrailingComma (#135903)
Fix #135819
Commit: ab4c939579fe6ca85d9a1022511635c4e6f83f55
https://github.com/llvm/llvm-project/commit/ab4c939579fe6ca85d9a1022511635c4e6f83f55
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in annotating TT_PointerOrReference (#136073)
Fix #135972
Commit: 58a5c469d97302bb33a54338cf827a4cbe4e416a
https://github.com/llvm/llvm-project/commit/58a5c469d97302bb33a54338cf827a4cbe4e416a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in BWACS_MultiLine (#136281)
Fixes #136266
Commit: f9bd89b7ac35920241740969b2b83c45a6a6ddb3
https://github.com/llvm/llvm-project/commit/f9bd89b7ac35920241740969b2b83c45a6a6ddb3
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MCFixup: Add isRelocation/isRelocRelocation helpers
Add two helper functions to simplify checks for relocation types,
replacing direct comparisons with FirstRelocationKind and
FirstLiteralRelocationKind. Note: Some targets haven't utilized
isRelocation yet.
Also, update RelaxFixupKind to use 0 as the sentinel value.
Commit: b9e11eade7f1c1e2464f9f891d3769d8e48c6509
https://github.com/llvm/llvm-project/commit/b9e11eade7f1c1e2464f9f891d3769d8e48c6509
Author: YLChenZ <chentongyongcz at gmail.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/invalid-label-param.ll
Log Message:
-----------
[llvm][ir]: fix llc crashes on function definitions with label parameters (#136285)
Closes #136144.
After the patch:
```llvm
; label-crash.ll
define void @invalid_arg_type(i32 %0) {
1:
call void @foo(label %1)
ret void
}
declare void @foo(label)
```
```
lambda at ubuntu22:~/test$ llc -o out.s label-crash.ll
Function argument cannot be of label type!
label %0
ptr @foo
llc: error: 'label-crash.ll': input module cannot be verified
```
Commit: 7962820d4dc23852456e1891f785225c4fbc7b36
https://github.com/llvm/llvm-project/commit/7962820d4dc23852456e1891f785225c4fbc7b36
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
Log Message:
-----------
MC: Simplify code with isRelocation
Commit: 06de4d52d5eff6ee083e901d24362a77e102fb16
https://github.com/llvm/llvm-project/commit/06de4d52d5eff6ee083e901d24362a77e102fb16
Author: A. Jiang <de34 at live.cn>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M libcxx/include/__utility/pair.h
A libcxx/test/std/utilities/utility/pairs/pairs.pair/explicit_deduction_guides.pass.cpp
Log Message:
-----------
[libc++] Properly decay functions in CTAD for `pair` (#134544)
This patch makes instantiation of `pair` in CTAD a bit lazier to avoid
instantiating invalid `pair` specialization before the decaying explicit
deduction guide works.
Commit: 7b0409ad0e5a7e06fd36a3565b7c24f9586344e6
https://github.com/llvm/llvm-project/commit/7b0409ad0e5a7e06fd36a3565b7c24f9586344e6
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Log Message:
-----------
MC: Simplify code with isRelocation
Commit: 6311b11595f152a8f4aa02cfa544e72ede66688a
https://github.com/llvm/llvm-project/commit/6311b11595f152a8f4aa02cfa544e72ede66688a
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/Xclangas.s
Log Message:
-----------
[clang][Driver] Support passing arbitrary args to `-cc1as` with `-Xclangas`. (#100714)
Unlike the `-Xassembler` idea mentioned in #97517, this one comes with
no GCC compatibility concerns, and simply mirrors what `-Xclang` does
for `-cc1`.
This is useful for mostly the same reasons that `-Xclang` is. The
motivating use case is `zig cc`, however, where we use `-Xclang
-target-feature` to pass the exhaustive list of target features to Clang
for C-family files. Before this commit, there was no way to do the same
for assembly files.
For context, Zig bases all of its target feature info directly on the
info in LLVM's backends, including all the dependency relationships
therein. So it just makes more sense for Zig to be able to directly pass
all this info to the assembler, rather than having to manually
reconstruct the corresponding frontend command line flags for every
target.
Closes #97517.
Commit: f336c908cdae0135d05763e4bb05913d27076fc8
https://github.com/llvm/llvm-project/commit/f336c908cdae0135d05763e4bb05913d27076fc8
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
Log Message:
-----------
LoongArch: Use mc::isRelocation. NFC
Commit: 0c0b5abff7ebedde53ccb84a04dadb00b9b91f2b
https://github.com/llvm/llvm-project/commit/0c0b5abff7ebedde53ccb84a04dadb00b9b91f2b
Author: Selim Keles <mehmetselimkeles at outlook.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/tools/clang-format/clang-format-diff.py
Log Message:
-----------
[clang-format] Handle spaces in filename paths in clang-format-diff.py (#135779)
This PR resolves an issue in clang-format-diff.py where
filenames containing spaces were not correctly extracted from Git diffs.
Due to the previous regex implementation, filenames were being
truncated, causing the script to fail when processing diffs with such
filenames.
Fixes #135619.
Commit: 40789ce7f1b7cff6de82b7f93db25a8c54194d46
https://github.com/llvm/llvm-project/commit/40789ce7f1b7cff6de82b7f93db25a8c54194d46
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCFixup.h
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Log Message:
-----------
MCFixup: Move relocation values before FK_NONE
Simplify the process of encoding a raw relocation type using MCFixupKind.
Currently, FirstRelocationkind is utilized by AArch64, LoongArch, and
RISCV.
Commit: dca0ccff4f2e6e5df6345352a0392f7230c6bd57
https://github.com/llvm/llvm-project/commit/dca0ccff4f2e6e5df6345352a0392f7230c6bd57
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
Log Message:
-----------
LoongArch: Remove unreachable TLS fixup from adjustFixupValue
Commit: 609586f7f61abf170425883fd8ae390b4a69cc0c
https://github.com/llvm/llvm-project/commit/609586f7f61abf170425883fd8ae390b4a69cc0c
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
Log Message:
-----------
LoongArch: Remove fixup kinds that map to relocation types
Follow-up to 40789ce7f1b7cff6de82b7f93db25a8c54194d46
("MCFixup: Move relocation values before FK_NONE")
Commit: 89687e6f383b742a3c6542dc673a84d9f82d02de
https://github.com/llvm/llvm-project/commit/89687e6f383b742a3c6542dc673a84d9f82d02de
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
Log Message:
-----------
LoongArch: Remove TLS fixup kinds that map to relocationtypes
Follow-up to 40789ce7f1b7cff6de82b7f93db25a8c54194d46
("MCFixup: Move relocation values before FK_NONE")
Commit: 68cef491ebdcaffa0585cb2b22e2be88bd6e36ef
https://github.com/llvm/llvm-project/commit/68cef491ebdcaffa0585cb2b22e2be88bd6e36ef
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/test/MC/RISCV/compressed-relocations.s
M llvm/test/MC/RISCV/fixups-compressed.s
M llvm/test/MC/RISCV/fixups.s
M llvm/test/MC/RISCV/xqcibi-relocations.s
Log Message:
-----------
[RISCV,test] Remove CHECK lines for MCAsmStreamer's fixup output
The fixup output is a debug aid and should not be used to test
target-specific relocation generation implementation. The llvm-mc
-filetype=obj output is what truly matters.
Commit: e00693659b9b18647565e380c27da039507673f4
https://github.com/llvm/llvm-project/commit/e00693659b9b18647565e380c27da039507673f4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdNumbersCheck.cpp
Log Message:
-----------
[clang-tidy] Use llvm::less_second (NFC) (#136396)
Commit: bb2e222407c199e330976aebfccb0e05bdf03957
https://github.com/llvm/llvm-project/commit/bb2e222407c199e330976aebfccb0e05bdf03957
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M lld/MachO/MapFile.cpp
Log Message:
-----------
[lld] Use llvm::less_first (NFC) (#136397)
Commit: 356ff75e077ce0684b439869f79c72c6df7db687
https://github.com/llvm/llvm-project/commit/356ff75e077ce0684b439869f79c72c6df7db687
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
Log Message:
-----------
[mlir] Use llvm::less_first (NFC) (#136398)
Commit: c239acb5b6b80ddb3c6407ffc9e051f636ae41c1
https://github.com/llvm/llvm-project/commit/c239acb5b6b80ddb3c6407ffc9e051f636ae41c1
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCFixupKindInfo.h
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
Log Message:
-----------
MCFixup: Make FixupKindInfo smaller and change getFixupKindInfo to return value
We will increase the use of raw relocation types and eliminate fixup
kinds that correspond to relocation types. The getFixupKindInfo
functions will return an rvalue instead. Let's update the return type
from a const reference to a value type.
Commit: 3bcb724903d82414a0952fe0349d5181ff2f0f26
https://github.com/llvm/llvm-project/commit/3bcb724903d82414a0952fe0349d5181ff2f0f26
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/high-segments.s
Log Message:
-----------
[BOLT] Add --custom-allocation-vma flag (#136385)
Add an advanced-user flag so we are able to rewrite binaries when we fail
to identify a suitable location to put new code. User then can supply a
custom location via --custom-allocation-vma. This happens more obviously if the
binary has segments mapped to very high addresses.
Commit: c3000333cda22ec7d5ae2597c6aadcdc5d6ea7f8
https://github.com/llvm/llvm-project/commit/c3000333cda22ec7d5ae2597c6aadcdc5d6ea7f8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
R clang/test/CodeGen/AArch64/ubsan-handler-pass-by-ref.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
R clang/test/CodeGen/ubsan-attr.cpp
Log Message:
-----------
Revert "[Reland][Clang][CodeGen][UBSan] Add more precise attributes to recoverable ubsan handlers" (#136402)
Reverts llvm/llvm-project#135135
Breaks several bots, details in #135135.
Commit: ee4c8b556c5cf42c55ce9540bbb0e29c11894a71
https://github.com/llvm/llvm-project/commit/ee4c8b556c5cf42c55ce9540bbb0e29c11894a71
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
Log Message:
-----------
[TableGen] Use llvm::enumerate in one place (NFC) (#136399)
Commit: a71a2542a1a6d66425a7f078cf5391e95ff3d374
https://github.com/llvm/llvm-project/commit/a71a2542a1a6d66425a7f078cf5391e95ff3d374
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[clang][bazel] Port d1cce66469d0739f332b11fdb0fa2a441b1e0483
Commit: 5607a3b09c6fb6026adfcfb42710306a63523c57
https://github.com/llvm/llvm-project/commit/5607a3b09c6fb6026adfcfb42710306a63523c57
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
Log Message:
-----------
[clang-doc][NFC] Use LLVM style naming in YAMLGenerator.cpp (#136393)
Commit: e27aa12d47468e4717622a230bb560490b66c3e7
https://github.com/llvm/llvm-project/commit/e27aa12d47468e4717622a230bb560490b66c3e7
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
Log Message:
-----------
[clang-doc][NFC] Use qualified auto (#136394)
Commit: 8376edb143c4ea0d4d166b81c9667c2341a9533d
https://github.com/llvm/llvm-project/commit/8376edb143c4ea0d4d166b81c9667c2341a9533d
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
Log Message:
-----------
[clang-doc][NFC] Avoid C-style casts (#136390)
Commit: c5c285178ccb1769e6d4dfeeb8df7663ec068a55
https://github.com/llvm/llvm-project/commit/c5c285178ccb1769e6d4dfeeb8df7663ec068a55
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
Log Message:
-----------
[clang-doc][NFC] Avoid else after return (#136389)
Commit: c274bbed6aa5254ec3b97b25471dd08c67224350
https://github.com/llvm/llvm-project/commit/c274bbed6aa5254ec3b97b25471dd08c67224350
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc][NFC] Prefer static functions for internal APIs (#136391)
Additionally moving the declarations from Generator.cpp
prevents misc-use-internal-linkage warnings from clang-tidy.
We fix those here too, since the static functions are part
of the same diagnostic
Commit: e1df0defa8a16b9769f6bde83ee4e4f79426d53f
https://github.com/llvm/llvm-project/commit/e1df0defa8a16b9769f6bde83ee4e4f79426d53f
Author: Petr Hosek <phosek at google.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/tools/lto/CMakeLists.txt
Log Message:
-----------
[CMake] Disable LTO library when PIC is disabled (#136372)
Building shared libraries requires PIC. This matches what we do for
Remarks which is another tool library.
Commit: 9b6fbc06ad532e455960bbe6e4bffa5e72eb9e8c
https://github.com/llvm/llvm-project/commit/9b6fbc06ad532e455960bbe6e4bffa5e72eb9e8c
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
Log Message:
-----------
[CIR] Infer MLIR context in type builders when possible (#136362)
This mirrors incubator changes from
https://github.com/llvm/clangir/pull/1570
Commit: e2944b5897e70f17edb366c1ce10a2479ddc4bda
https://github.com/llvm/llvm-project/commit/e2944b5897e70f17edb366c1ce10a2479ddc4bda
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Rename InvalidRegClassGPRX0->InvalidRegClassGPRNoX0. NFC
Commit: 1c4ff5128a03772572dbaf021e93d6dadb17f898
https://github.com/llvm/llvm-project/commit/1c4ff5128a03772572dbaf021e93d6dadb17f898
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M .ci/monolithic-linux.sh
M lldb/test/requirements.txt
Log Message:
-----------
[ci] add dependencies for lldb python binding tests (#136158)
Commit: d4340978d153fc7ea6445da793320b4104062b12
https://github.com/llvm/llvm-project/commit/d4340978d153fc7ea6445da793320b4104062b12
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
Log Message:
-----------
X86: Avoid using getNumUses (#136348)
Commit: bbd1a153f521e7faf73e04c95322d7ca2b790609
https://github.com/llvm/llvm-project/commit/bbd1a153f521e7faf73e04c95322d7ca2b790609
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
Log Message:
-----------
SPIRV: Use use_empty instead of getNumUses == 0 (#136338)
Commit: 90de46c51b52226f41354da6d6c488500632f566
https://github.com/llvm/llvm-project/commit/90de46c51b52226f41354da6d6c488500632f566
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
Log Message:
-----------
[clang-doc] Fix warnings
This patch fixes:
clang-tools-extra/clang-doc/BitcodeReader.cpp:47:20: error: unused
function 'decodeRecord' [-Werror,-Wunused-function]
clang-tools-extra/clang-doc/BitcodeReader.cpp:437:31: error: unused
function 'getCommentInfo<std::unique_ptr<clang::doc::CommentInfo>
&>' [-Werror,-Wunused-function]
Commit: c47042c5b3f5e87761715a9277712721512cd48d
https://github.com/llvm/llvm-project/commit/c47042c5b3f5e87761715a9277712721512cd48d
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
Log Message:
-----------
[mlir][SPRIV][NFC] Avoid rollback in `TypeCastingOpPattern` (#136284)
This pattern used to create an op and then attached the converted
rounding mode attribute. When the latter failed, the pattern aborted and
a rollback was triggered.
This commit inverses the logic: the converted rounding mode is computed
first, so that no changes have to be rolled back.
Note: This is in preparation of the One-Shot Dialect Conversion
refactoring.
Commit: f91df0d58df4fcb5edcb89f204f0d22ade9a9262
https://github.com/llvm/llvm-project/commit/f91df0d58df4fcb5edcb89f204f0d22ade9a9262
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Diagnose failed MemberPtrPtr casts differently (#136407)
Return Invalid() here instead of just false to match the diagnostic
output of the current interpreter.
Commit: e9280a1d39af88468ffea9a14fad5bf96d51d6e6
https://github.com/llvm/llvm-project/commit/e9280a1d39af88468ffea9a14fad5bf96d51d6e6
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/for_each.h
M libcxx/include/algorithm
M libcxx/include/array
M libcxx/include/bitset
M libcxx/include/codecvt
M libcxx/include/condition_variable
M libcxx/include/ios
M libcxx/include/locale
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/system_error
M libcxx/include/vector
M libcxx/test/libcxx/algorithms/robust_against_copying_comparators.pass.cpp
Log Message:
-----------
[libc++] Backport segmented iterator optimization for std::for_each to C++11 (#134960)
Previously, the segmented iterator optimization for `std::for_each` was restricted to C++23 and later due to its dependency on `__movable_box`, which is not available in earlier standards. This patch eliminates that restriction, enabling consistent optimizations starting from C++11.
By backporting this enhancement, we improve performance across older standards and create opportunities to extend similar optimizations to other algorithms by forwarding their calls to `std::for_each`.
Commit: 19c708c18963ac24822564824cb5401e71a49943
https://github.com/llvm/llvm-project/commit/19c708c18963ac24822564824cb5401e71a49943
Author: Robert Dazi <14996868+v01dXYZ at users.noreply.github.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang/lib/AST/Decl.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
FunctionDecl::getFunctionTypeLoc: ignore function type attributes (#118420)
Related to #118290.
---------
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Co-authored-by: Owen Anderson <resistor at mac.com>
Commit: a15ef95de47620d580df21bdf35afeeb324e452d
https://github.com/llvm/llvm-project/commit/a15ef95de47620d580df21bdf35afeeb324e452d
Author: Owen Anderson <resistor at mac.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang/lib/AST/Decl.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
Revert "FunctionDecl::getFunctionTypeLoc: ignore function type attributes (#118420)"
This reverts commit 19c708c18963ac24822564824cb5401e71a49943 because it caused test failures on non-x86 targets.
Commit: fc55ad4ceb7dda17d4d7eb3d44ac3833ecda1a84
https://github.com/llvm/llvm-project/commit/fc55ad4ceb7dda17d4d7eb3d44ac3833ecda1a84
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/test/Transforms/StructurizeCFG/simple-structurizecfg-crash.ll
Log Message:
-----------
Revert "[StructurizeCFG] Refactor insertConditions. NFC. (#115476)" (#136370)
Commit: 8fdebff69d92fd3c6023bf2d0646ca909bb4ec05
https://github.com/llvm/llvm-project/commit/8fdebff69d92fd3c6023bf2d0646ca909bb4ec05
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M lld/ELF/Driver.cpp
A lld/test/ELF/lto/aarch64-pac-got-func.ll
Log Message:
-----------
[PAC][ThinLTO] Fix auth key for GOT entries of function symbols (#131467)
Symtab is first filled with the data from the bitcode file, and all
undefined symbols except TLS ones are `STT_NOTYPE`. Since auth key for a
signed GOT entry depends on the symbol type being `STT_FUNC` or not, we
need to update the symtab after the bitcode is compiled to an ELF object
and update symbol types for function symbols. This patch implements the
described behavior.
Commit: 6196b4ee8c47dc4a2267b7c704d1811e68c7f1c1
https://github.com/llvm/llvm-project/commit/6196b4ee8c47dc4a2267b7c704d1811e68c7f1c1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/arrays.cpp
Log Message:
-----------
[clang][bytecode] Don't set OnePastEnd bit for array elements (#136422)
If we refer to arr[N], don't set the OnePastEnd bit of the APValue,
since that is already encoded in the array index.
Commit: 5e80487dd63c53545560726583ef25a160cd8a40
https://github.com/llvm/llvm-project/commit/5e80487dd63c53545560726583ef25a160cd8a40
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#136414)
Commit: e7c07a021034c7469c3c4a6f65299152291091ed
https://github.com/llvm/llvm-project/commit/e7c07a021034c7469c3c4a6f65299152291091ed
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] Construct SmallVector with iterator ranges (NFC) (#136415)
Commit: 6b2fd90bb8e9567e5f200ae343d6d0eaedc03782
https://github.com/llvm/llvm-project/commit/6b2fd90bb8e9567e5f200ae343d6d0eaedc03782
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
Log Message:
-----------
[Hexagon] Construct SmallVector with an iterator range (NFC) (#136416)
This patch switches to SmallVector so that we can construct an
instance with an iterator range.
Commit: 584aefbc9be371fceb5f8f494a7e49a0f24e98a3
https://github.com/llvm/llvm-project/commit/584aefbc9be371fceb5f8f494a7e49a0f24e98a3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
Log Message:
-----------
[llvm] Use range-based for loops with llvm::drop_begin (NFC) (#136417)
Commit: 198c5dac37dbe9c6a5f10e2b5113afc39b6eb93d
https://github.com/llvm/llvm-project/commit/198c5dac37dbe9c6a5f10e2b5113afc39b6eb93d
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/Transform/DebugExtension/DebugExtensionOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Transform/Interfaces/MatchInterfaces.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
Log Message:
-----------
[mlir][transform] Clean up prints. NFC. (#136401)
Use `llvm::interleaved` from #135517 to simplify printing.
Commit: 4d756917617c3fa2990fd41a5efc3c97bd3506d8
https://github.com/llvm/llvm-project/commit/4d756917617c3fa2990fd41a5efc3c97bd3506d8
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
Log Message:
-----------
[Hexagon] Change placeholder from `undef` to `poison` (#135555)
A `poison` vector should be used when performing an identity shuffle.
Co-authored-by: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Commit: d46c7334e86040a71b4002786fe021ebf6946694
https://github.com/llvm/llvm-project/commit/d46c7334e86040a71b4002786fe021ebf6946694
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#136264)
Commit: 0ed1c9862df408d3df171762bd8fa0dafbe1b7e2
https://github.com/llvm/llvm-project/commit/0ed1c9862df408d3df171762bd8fa0dafbe1b7e2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/Analysis/FlowSensitive/CNFFormula.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/unittests/Interpreter/ExceptionTests/InterpreterExceptionTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[clang] llvm::append_range (NFC) (#136440)
Commit: 0c4309bcc4154562ae91c3705a9e6c398833119b
https://github.com/llvm/llvm-project/commit/0c4309bcc4154562ae91c3705a9e6c398833119b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
IR: Avoid repeating assert condition in Value destructor (#136340)
Commit: 031475594abd8a66b88a1687706651579e840421
https://github.com/llvm/llvm-project/commit/031475594abd8a66b88a1687706651579e840421
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Support/SuffixTree.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
Log Message:
-----------
[llvm] Use llvm::SmallVector::pop_back_val (NFC) (#136441)
Commit: c2d6c7cea7d857f7a9268703e30a7d1ffed7d64b
https://github.com/llvm/llvm-project/commit/c2d6c7cea7d857f7a9268703e30a7d1ffed7d64b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/Analysis/IntervalPartition.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Format/SortJavaScriptImports.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/tools/clang-installapi/Options.cpp
M clang/unittests/Format/MacroCallReconstructorTest.cpp
Log Message:
-----------
[clang] Use llvm::append_range (NFC) (#136448)
Commit: 1cf188a1bca6d1ce135eab4cce5dead4f8f55026
https://github.com/llvm/llvm-project/commit/1cf188a1bca6d1ce135eab4cce5dead4f8f55026
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M mlir/lib/Analysis/Liveness.cpp
M mlir/lib/Rewrite/ByteCode.cpp
Log Message:
-----------
[mlir] Use llvm::SmallVector::pop_back_val() (NFC) (#136452)
Commit: 94733492b720c2e65a8fe9bd2179a35a7b7d9916
https://github.com/llvm/llvm-project/commit/94733492b720c2e65a8fe9bd2179a35a7b7d9916
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/lib/Analysis/CFG.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[clang] Use llvm::SmallVector::pop_back_val (NFC) (#136451)
Commit: f347a0659132705f32551e3e599fd051d1b5e58e
https://github.com/llvm/llvm-project/commit/f347a0659132705f32551e3e599fd051d1b5e58e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M lld/COFF/MapFile.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/BPSectionOrderer.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/include/lld/Common/BPSectionOrdererBase.inc
Log Message:
-----------
[lld] Use llvm::unique (NFC) (#136453)
Commit: ec6828c1ecad7fe2f799f7b5af3361885a5d5bb9
https://github.com/llvm/llvm-project/commit/ec6828c1ecad7fe2f799f7b5af3361885a5d5bb9
Author: John Harrison <harjohn at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
Log Message:
-----------
[lldb-dap] Remove an incorrect assumption on reverse requests. (#136210)
Reverse requests do have a 'seq' set still from VSCode. I incorrectly
interpreted
https://github.com/microsoft/vscode/blob/dede7bb4b7e9c9ec69155a243bb84037a40588fe/src/vs/workbench/contrib/debug/common/abstractDebugAdapter.ts#L65
to mean they have a 'seq' of '0', however the 'seq' is set in
'internalSend' here
https://github.com/microsoft/vscode/blob/dede7bb4b7e9c9ec69155a243bb84037a40588fe/src/vs/workbench/contrib/debug/common/abstractDebugAdapter.ts#L178.
Removing the check that 'seq=0' on reverse requests and updating the
dap_server.py impl to also set the seq.
Commit: e8245d53247f155d234e1de647aac2678c49ac28
https://github.com/llvm/llvm-project/commit/e8245d53247f155d234e1de647aac2678c49ac28
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/X86InstrBuilder.h
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/test/CodeGen/X86/GlobalISel/GV.ll
M llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
M llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir
M llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir
M llvm/test/CodeGen/X86/GlobalISel/select-memop-v128.mir
M llvm/test/CodeGen/X86/GlobalISel/select-memop-v256.mir
M llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
M llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
M llvm/test/CodeGen/X86/isel-and.ll
M llvm/test/CodeGen/X86/isel-buildvector-sse.ll
M llvm/test/CodeGen/X86/isel-buildvector-sse2.ll
M llvm/test/CodeGen/X86/isel-icmp.ll
M llvm/test/CodeGen/X86/isel-or.ll
M llvm/test/CodeGen/X86/isel-phi.ll
M llvm/test/CodeGen/X86/isel-sdiv.ll
M llvm/test/CodeGen/X86/isel-select-cmov.ll
M llvm/test/CodeGen/X86/isel-srem.ll
M llvm/test/CodeGen/X86/isel-traps.ll
M llvm/test/CodeGen/X86/isel-udiv.ll
M llvm/test/CodeGen/X86/isel-urem.ll
M llvm/test/CodeGen/X86/isel-x87.ll
M llvm/test/CodeGen/X86/isel-xor.ll
Log Message:
-----------
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
addr matching was the only gatekeeper for starting selecting G_LOAD
and G_STORE using SDAG patterns.
* Introduce a complex renderer gi_addr for addr. In this patch only
the existing functionality has been implemented. The renderer's name is
the same as in SDAG: selectAddr. Apparently the type of
GIComplexOperandMatcher doesn't matter as RISCV also uses s32 for
both 64 and 32 bit pointers.
* X86SelectAddress now is used for both: pattern matching and manual
selection. As a result it accumulates all the code that previously was
distributed among different selection functions.
* Replace getLoadStoreOp with getPtrLoadStoreOp in Load/Store
selector as GlobalISel matcher or emitter can't map the pointer type
into i32/i64 types used in SDAG patterns for pointers. So the load and
store selection of pointers is still manual. getLoadStoreOp is still
present because it is used in G_FCONSTANT lowering that requires extra
efforts to select it using SDAG patterns.
* Since truncating stores are not supported, we custom legalize them by
matching types of store and MMO.
* Introduce a constant pool flag in X86AddressMode because otherwise
we need to introduce a GlobalISel copy for X86ISelAddressMode.
* Also please notice in the tests that GlobalISel prefers to fold memory
operands immediately comparing to SDAG. The reason is that GlobalISel
doesn't have target hooks in GIM_CheckIsSafeToFold. Or maybe another
check on profitability is required along with safety check that is
currently not present.
Commit: 3215fd70294369b73b0e944238097a28550e7435
https://github.com/llvm/llvm-project/commit/3215fd70294369b73b0e944238097a28550e7435
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/PBQP/Math.h
Log Message:
-----------
[PBQP] Add begin and end to Vector (NFC) (#136454)
This patch adds begin and end to Vector.
The new functions will allow us to use llvm::interleaved in operator<<
for example.
Commit: e5aae97f577b64a5d3285ccec8795d417a330dab
https://github.com/llvm/llvm-project/commit/e5aae97f577b64a5d3285ccec8795d417a330dab
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/PBQP/Math.h
Log Message:
-----------
[PBQP] Use llvm::interleaved (NFC) (#136462)
Commit: 6aab2b14e6e5f80d6a10cd56c16ab33cde5b71d3
https://github.com/llvm/llvm-project/commit/6aab2b14e6e5f80d6a10cd56c16ab33cde5b71d3
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
Log Message:
-----------
[mlir][linalg] Clean up debug prints. NFC. (#136438)
Use `llvm::interleaved` from #135517 to simplify printing.
Commit: e9487fed29f386bd67e468b6c7a9c86684a6247d
https://github.com/llvm/llvm-project/commit/e9487fed29f386bd67e468b6c7a9c86684a6247d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/FunctionTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/IntervalTest.cpp
Log Message:
-----------
[llvm] Construct SmallVector with iterator ranges (NFC) (#136460)
Commit: eb78b9b42f56c59a7fec7fae8f14b570e0a94646
https://github.com/llvm/llvm-project/commit/eb78b9b42f56c59a7fec7fae8f14b570e0a94646
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Debug/Observers/ActionLogging.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/Syntax.cpp
M mlir/lib/IR/ExtensibleDialect.cpp
M mlir/lib/IR/PDL/PDLPatternMatch.cpp
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
Log Message:
-----------
[mlir] Clean up prints with `llvm::interleaved`. NFC. (#136468)
Commit: f2ec5e40d96d6ba8f99e419009b6547965905cfe
https://github.com/llvm/llvm-project/commit/f2ec5e40d96d6ba8f99e419009b6547965905cfe
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[clang] Use llvm::unique (NFC) (#136469)
Commit: 9bcb18db89c5a3b317c0de2a5e94f18044390c3f
https://github.com/llvm/llvm-project/commit/9bcb18db89c5a3b317c0de2a5e94f18044390c3f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/SourceCode.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/index/Relation.cpp
M clang-tools-extra/clangd/index/dex/Trigram.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/refactor/tweaks/RemoveUsingNamespace.cpp
Log Message:
-----------
[clangd] Use llvm::unique (NFC) (#136470)
Commit: ac8fc09688e10e983b99224b5dc5cbbeeedb1879
https://github.com/llvm/llvm-project/commit/ac8fc09688e10e983b99224b5dc5cbbeeedb1879
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M offload/DeviceRTL/CMakeLists.txt
Log Message:
-----------
[offload] Unset `-march` when building GPU libraries (#136442)
Unset `-march` when invoking the compiler and linker to build the GPU
libraries. These libraries use GPU targets rather than the CPU targets,
and an incidental `-march=native` causes Clang to be able to determine
the GPU used — which causes the build to fail when there is no GPU
available. Resetting `-march=` should suffice to revert to building
generic code for the time being.
See the discussion in:
https://github.com/llvm/llvm-project/pull/126143#issuecomment-2816718492
Commit: cd84ba2e4d554242e5ddea1d130018bbd701f8af
https://github.com/llvm/llvm-project/commit/cd84ba2e4d554242e5ddea1d130018bbd701f8af
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-04-19 (Sat, 19 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
Log Message:
-----------
[llvm] Use masm for UEFI (#132461)
For UEFI targets use Microsoft masm.
Commit: f88fd89909deaf7a174544b02c973a3c2ada02d6
https://github.com/llvm/llvm-project/commit/f88fd89909deaf7a174544b02c973a3c2ada02d6
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Extract tryUnsignedBitfieldExtract as a member function of RISCVDAGToDAGISel. NFC.
Commit: 71037ee9decd05ec07617e5ee77a05e0114b9b67
https://github.com/llvm/llvm-project/commit/71037ee9decd05ec07617e5ee77a05e0114b9b67
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
A utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/Targets.h
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[llvm][bazel] Port 667209e45122d0cb7a4c2ac27018d31165b1be70.
Commit: 8553efd2e98575fbee2c81a334ec28b12e055406
https://github.com/llvm/llvm-project/commit/8553efd2e98575fbee2c81a334ec28b12e055406
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/FunctionCallUtils.h
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/PrintCallHelper.cpp
M mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/FunctionCallUtils.cpp
Log Message:
-----------
[mlir][LLVM] Add `OpBuilder &` to `lookupOrCreateFn` functions (#136421)
These functions are called from lowering patterns. All IR modifications
in a pattern must be performed through the provided rewriter, but these
functions used to instantiate a new `OpBuilder`, bypassing the provided
rewriter.
Commit: 366ff3a89880139a132fe2738f36b39c89f5333e
https://github.com/llvm/llvm-project/commit/366ff3a89880139a132fe2738f36b39c89f5333e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Get address space from inferred pointer type (NFC)
Remove a use of the underlying ingredient by getting the address space
from the inferred pointer type.
Commit: 90c845fb3babac387688dfa6d560d3ba8ed8e340
https://github.com/llvm/llvm-project/commit/90c845fb3babac387688dfa6d560d3ba8ed8e340
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/test/AST/ByteCode/builtin-object-size.cpp
Log Message:
-----------
[clang][bytecode] Start implementing __builtin_{,dynamic}_object_size (#136478)
Commit: bb21a6819b3fb9d689de776f7ee768030dfbacea
https://github.com/llvm/llvm-project/commit/bb21a6819b3fb9d689de776f7ee768030dfbacea
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
R mlir/include/mlir/Conversion/MemRefToLLVM/AllocLikeConversion.h
R mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
M mlir/lib/Conversion/MemRefToLLVM/CMakeLists.txt
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
Log Message:
-----------
[mlir][memref] Move `AllocLikeConversion.h` helpers into `MemRefToLLVM.cpp` (#136424)
This commit moves code around: The helper functions/classes are moved
into `MemRefToLLVM.cpp`. This simplifies the code a bit: fewer
templatized functions, fewer function calls, fewer lines of code.
This commit also moves checks in `matchAndRewrite` to the beginning of
the functions, such that patterns bail out (`return failure()`) before
starting to modify any IR. (Apart from that, this change is NFC.) This
is in preparation of the One-Shot Dialect Conversion refactoring, which
will disallow pattern rollbacks.
Commit: fc71b2c8db5d0a648ca5417e4c502755bfbe75b6
https://github.com/llvm/llvm-project/commit/fc71b2c8db5d0a648ca5417e4c502755bfbe75b6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Get opcode from recipe in VPWidenMemRecipe::computeCost (NFC).
Remove some uses of the underlying ingredient by getting the opcode
directly via the recipe ID.
Commit: 060f9556a2f6ef4669f1c2cd8c4a4d76748a440f
https://github.com/llvm/llvm-project/commit/060f9556a2f6ef4669f1c2cd8c4a4d76748a440f
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/test/Analysis/builtin_overflow.c
M clang/test/Analysis/builtin_overflow_notes.c
Log Message:
-----------
[clang][analyzer] Fix error path of builtin overflow (#136345)
According to
https://clang.llvm.org/docs/LanguageExtensions.html#checked-arithmetic-builtins,
result of builtin_*_overflow functions will be initialized even in case
of overflow. Align analyzer logic to docs and always initialize 3rd
argument of such builtins.
Closes #136292
Commit: 461168a3d3bb1e75ff41d351a5cc506e103da5d6
https://github.com/llvm/llvm-project/commit/461168a3d3bb1e75ff41d351a5cc506e103da5d6
Author: Fangyi Zhou <me at fangyi.io>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
A clang/test/Analysis/PR135665.cpp
Log Message:
-----------
[clang][analyzer] Handle CXXParenInitListExpr alongside InitListExpr (#136041)
As reported in #135665, C++20 parenthesis initializer list expressions
are not handled correctly and were causing crashes. This commit attempts
to fix the issue by handing parenthesis initializer lists along side
existing initializer lists.
Fixes #135665.
Commit: 839f52147c0cdbe7d4590cfdda089f250e5ec119
https://github.com/llvm/llvm-project/commit/839f52147c0cdbe7d4590cfdda089f250e5ec119
Author: Ely Ronnen <elyronnen at gmail.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
Log Message:
-----------
[lldb-dap] fix inconsistent debugAdapterHostname argument name (#135544)
the argument is written as `debugAdapterHostname` in package.json but
used as `debugAdapterHost`
Commit: ea3eb8d6258a018f118b5d41057ca333d1c8d4a0
https://github.com/llvm/llvm-project/commit/ea3eb8d6258a018f118b5d41057ca333d1c8d4a0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-object-size.cpp
Log Message:
-----------
[clang][bytecode] Fix bos/bdos with non-zero offset applied (#136482)
Compute the offset from the record layout.
Unfortunately, not all the test cases from the current interpreter work.
Commit: f0cc50cdc969d141015cd132cf56a2ab8447f763
https://github.com/llvm/llvm-project/commit/f0cc50cdc969d141015cd132cf56a2ab8447f763
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/include/llvm/ADT/Hashing.h
M llvm/unittests/ADT/HashingTest.cpp
Log Message:
-----------
[ADT] Add hash_combine_range that takes a range (NFC) (#136459)
The new function will allow us to replace:
hash_combine_range(Ops.begin(), Ops.end())
with:
hash_combine_range(Ops)
Commit: 842e5915778a820c63cf38b75bec932a6ea8c18b
https://github.com/llvm/llvm-project/commit/842e5915778a820c63cf38b75bec932a6ea8c18b
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang-tools-extra/clang-tidy/abseil/CleanupCtadCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SignalHandlerCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/StringviewNullptrCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableTable/BuildConfusableTable.cpp
M clang-tools-extra/clang-tidy/modernize/MacroToEnumCheck.cpp
M clang-tools-extra/clang-tidy/objc/AssertEquals.cpp
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/portability/StdAllocatorConstCheck.cpp
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExprSequence.cpp
Log Message:
-----------
[clang-tidy][NFC] fix `clang-tidy` warnings in `clang-tools-extra/clang-tidy` directory (#136097)
Mostly stylistic changes to `clang-tidy` source code.
Command run:
`python3 clang-tools-extra/clang-tidy/tool/run-clang-tidy.py -p build/
-j $(nproc) clang-tools-extra/clang-tidy`
Commit: 3ac1aa4c88d4fe40166209cad616f4ae867c20a2
https://github.com/llvm/llvm-project/commit/3ac1aa4c88d4fe40166209cad616f4ae867c20a2
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/SemaCXX/bitfield-preferred-type-sizing.cpp
Log Message:
-----------
[Clang] Consider preferred_type in bitfield warnings (#116760) (#116785)
Very simply extends the bitfield sema checks for assignment to fields
with a preferred type specified to consider the preferred type if the
decl storage type is not explicitly an enum type.
This does mean that if the preferred and explicit types have different
storage requirements we may not warn in all possible cases, but that's a
scenario for which the warnings are much more complex and confusing.
Commit: f87109f018faad5f3f1bf8a4668754c24e84e886
https://github.com/llvm/llvm-project/commit/f87109f018faad5f3f1bf8a4668754c24e84e886
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M compiler-rt/lib/builtins/int_lib.h
Log Message:
-----------
[compiler-rt] allow building with uefi (#131499)
I'm trying to put together an LLVM built toolchain (including LLVM libc)
targeting UEFI, currently I get an error saying "Unknown target". This
PR enables compiling compiler-rt for UEFI.
Commit: b01e25debaf3fde3c76c9763e78e118a7da3d592
https://github.com/llvm/llvm-project/commit/b01e25debaf3fde3c76c9763e78e118a7da3d592
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/include/llvm/ADT/ArrayRef.h
M llvm/include/llvm/ADT/Hashing.h
M llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/RegisterBankInfo.cpp
M llvm/lib/ExecutionEngine/Orc/IRPartitionLayer.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/LLVMContextImpl.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/tools/llvm-profgen/PerfReader.h
Log Message:
-----------
[llvm] Call hash_combine_range with ranges (NFC) (#136511)
Commit: 5e834b9ec7fc85072ec12de780d3c793c03b7d00
https://github.com/llvm/llvm-project/commit/5e834b9ec7fc85072ec12de780d3c793c03b7d00
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Polynomial/IR/Polynomial.h
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/TypeRange.h
M mlir/lib/Dialect/Quant/IR/TypeDetail.h
M mlir/lib/Dialect/SPIRV/Linking/ModuleCombiner/ModuleCombiner.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/unittests/IR/OpPropertiesTest.cpp
Log Message:
-----------
[mlir] Call hash_combine_range with ranges (NFC) (#136512)
Commit: b07d2e62c63414bbce5c1d61bf72153071a8c05d
https://github.com/llvm/llvm-project/commit/b07d2e62c63414bbce5c1d61bf72153071a8c05d
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
Log Message:
-----------
[Mips] Use helper class for emitting CFI instructions (NFCI) (#136242)
Commit: c6e7bb19f70f6509e1f54e6010a6de50f6a4804f
https://github.com/llvm/llvm-project/commit/c6e7bb19f70f6509e1f54e6010a6de50f6a4804f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M bolt/lib/Core/BinaryBasicBlock.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/DebugNames.cpp
Log Message:
-----------
[BOLT] Use llvm::unique (NFC) (#136513)
Commit: be48727b95bf9075e4290cc8938ab87db8b7410c
https://github.com/llvm/llvm-project/commit/be48727b95bf9075e4290cc8938ab87db8b7410c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-include-fixer/IncludeFixerContext.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
Log Message:
-----------
[clang-tools-extra] Use llvm::unique (NFC) (#136514)
Commit: 27653bdc49161b6d0e785185384a5c96a55e9e24
https://github.com/llvm/llvm-project/commit/27653bdc49161b6d0e785185384a5c96a55e9e24
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/include/clang/Basic/FPOptions.def
M clang/include/clang/Basic/LangOptions.def
Log Message:
-----------
Ensure bit-fields storing FPEvalMethodKind are wide enough to do so (#136515)
After landing #116760 we hit build failures due to existing fields
storing FPEvalMethodKind not being wide enough.
Commit: 0e3e0bf42c25b280d8caa455c6ae7e4a04d3667a
https://github.com/llvm/llvm-project/commit/0e3e0bf42c25b280d8caa455c6ae7e4a04d3667a
Author: Chyaka <lilium23187 at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add processor definition for XiangShan-KunMingHu-V2R2 (#123193)
XiangShan-KunMingHu is the third generation of Open-source
high-performance RISC-V processor developed by Beijing Institute of Open
Source Chip (BOSC) , and its latest version is V2R2.
The KunMingHu manual is now available at
https://github.com/OpenXiangShan/XiangShan-User-Guide/releases.
It will be updated on the official XiangShan documentation site:
https://docs.xiangshan.cc/zh-cn/latest
You can find the corresponding ISA extension from the XiangShan Github
repository:
https://github.com/OpenXiangShan/XiangShan/blob/master/src/main/scala/xiangshan/Parameters.scala
If you want to track the latest performance data of KunMingHu, please
check XiangShan Biweekly: https://docs.xiangshan.cc/zh-cn/latest/blog
This PR adds the processor definition for KunMingHu V2R2, developed by
the XSCC team https://github.com/orgs/OpenXiangShan/teams/xscc.
The scheduling model for XiangShan-KunMingHu V2R2 will be submitted in a
subsequent PR.
---------
Co-authored-by: Shenglin Tang <tangshenglin at ict.ac.cn>
Co-authored-by: Xu, Zefan <ceba_robot at outlook.com>
Co-authored-by: Tang Haojin <tanghaojin at outlook.com>
Commit: ddee2d8559fd18519f712989dc59d299c3334fc1
https://github.com/llvm/llvm-project/commit/ddee2d8559fd18519f712989dc59d299c3334fc1
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/cf.ll
Log Message:
-----------
[X86][APX] Combine (X86Sub 0, AND(X, Y)) to (X86And X, Y) for CLOAD/CSTORE (#136429)
https://godbolt.org/z/TsWochrbf
Commit: f86953c733c084fd410ca9906f6a2c53641de519
https://github.com/llvm/llvm-project/commit/f86953c733c084fd410ca9906f6a2c53641de519
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M llvm/docs/CodeOfConduct.rst
Log Message:
-----------
[docs] Correct my email address
Commit: a8644b3d881fabaac217ba8d8b4afa446e29b453
https://github.com/llvm/llvm-project/commit/a8644b3d881fabaac217ba8d8b4afa446e29b453
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M bolt/lib/Profile/YAMLProfileWriter.cpp
Log Message:
-----------
[BOLT] Call hash_combine_range with ranges (NFC) (#136524)
Commit: 02b55d2b78d318dad331a66ddac81c7318b0b87a
https://github.com/llvm/llvm-project/commit/02b55d2b78d318dad331a66ddac81c7318b0b87a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang/lib/AST/ItaniumCXXABI.cpp
Log Message:
-----------
[AST] Call hash_combine_range with a range (NFC) (#136525)
Commit: 6274442f8c657597233b9691298df7b5cd743e66
https://github.com/llvm/llvm-project/commit/6274442f8c657597233b9691298df7b5cd743e66
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
Log Message:
-----------
[clangd] Call hash_combine_range with a range (NFC) (#136526)
Commit: 2ba20c52e43ae881dc54037fff94d7e2f217c99d
https://github.com/llvm/llvm-project/commit/2ba20c52e43ae881dc54037fff94d7e2f217c99d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Target/Target.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
Log Message:
-----------
[lldb] Use llvm::unique (NFC) (#136527)
Commit: f024aab844ab89ab6455ddf1e2232a957c72328e
https://github.com/llvm/llvm-project/commit/f024aab844ab89ab6455ddf1e2232a957c72328e
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll
Log Message:
-----------
[RISCV] Remove the TODO that lbu and lhu should be selected to avoid the unnecessary masking. NFC.
RISCVTargetLowering::isZExtFree has been implemented in
https://github.com/llvm/llvm-project/commit/15e894baeeb96612ae471fa83d1729a2d3388fc8.
Commit: e183459b8b341ec787b2856be7e86a9e6200e2f8
https://github.com/llvm/llvm-project/commit/e183459b8b341ec787b2856be7e86a9e6200e2f8
Author: David Green <david.green at arm.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[CostModel] Make sure getCmpSelInstrCost is passed a CondTy (#135535)
It is already required along certain code paths that the CondTy is
valid. Fix some of the uses to make sure it is passed.
Commit: 2ba455ff3dd192ff814514647d485491510a6342
https://github.com/llvm/llvm-project/commit/2ba455ff3dd192ff814514647d485491510a6342
Author: David Green <david.green at arm.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64] Add CostKind to getSpliceCost (#135537)
This likely does not alter much yet with how the costs are used. Like
other cost functions the CostKind should be passed into and through the
function.
Commit: 8435de0916d9df5a3a9dd9eeb44d5bf4aba87ba3
https://github.com/llvm/llvm-project/commit/8435de0916d9df5a3a9dd9eeb44d5bf4aba87ba3
Author: Tongsheng Wu <tongshengwu0 at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/IncludeCleaner.cpp
Log Message:
-----------
[clangd] Print include spelling in IncludeCleaner error message (#136237)
Commit: 050ca5e27082055f41ad7e3dd2dea2f39364b3ab
https://github.com/llvm/llvm-project/commit/050ca5e27082055f41ad7e3dd2dea2f39364b3ab
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Simplify BoolAttr builders (#136366)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1572
Commit: b6820c35c59a4da3e59c11f657093ffbd79ae1db
https://github.com/llvm/llvm-project/commit/b6820c35c59a4da3e59c11f657093ffbd79ae1db
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/test/CodeGen/Hexagon/swp-epilog-phi11.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
Log Message:
-----------
[MachinePipeliner] Remove UB from tests (NFC) (#123169)
This patch removes UB from some tests for MachinePipeliner. This patch
fixes following cases.
- Branching on an `undef` value.
- Using `undef`/`null` as a pointer operand of a load/store.
There are other tests of pipeliner that contain the same UB, but for
now, this patch fixes particularly unstable cases when I developed
pipeliner.
Commit: 4853bf0956058f4433fb81e880a2087da4487f26
https://github.com/llvm/llvm-project/commit/4853bf0956058f4433fb81e880a2087da4487f26
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
M llvm/test/CodeGen/LoongArch/lsx/broadcast-load.ll
Log Message:
-----------
[LoongArch] Lower build_vector to broadcast load if possible (#135896)
Commit: 053451cb3502144564b4d0b30a9046045d1820d4
https://github.com/llvm/llvm-project/commit/053451cb3502144564b4d0b30a9046045d1820d4
Author: Luke Lau <luke at igalia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
Log Message:
-----------
[RISCV] Handle scalarized reductions in getArithmeticReductionCost
This fixes a crash reported at
https://github.com/llvm/llvm-project/pull/114250#issuecomment-2813686061
If the vector type isn't legal at all, e.g. bfloat with +zvfbfmin,
then the legalized type will be scalarized. So use getScalarType()
instead of getVectorElement() when checking for f16/bf16.
Commit: 6423c901fd5a5a8370a5326c5fbe16eb5a837374
https://github.com/llvm/llvm-project/commit/6423c901fd5a5a8370a5326c5fbe16eb5a837374
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
Log Message:
-----------
[mlir][LLVM][NFC] Avoid rollback in FuncOp --> LLVM lowering (#136477)
This pattern used to create an `llvm.func` op, then check additional
requirements and return "failure". This commit moves the checks before
the creation of the replacement op, so that no rollback is necessary
when one of the checks fails.
Note: This is in preparation of the One-Shot Dialect Conversion
refactoring, which removes the rollback functionality.
Commit: 47ca7f1cce56332ee8ac0d525a0172d3bce8508e
https://github.com/llvm/llvm-project/commit/47ca7f1cce56332ee8ac0d525a0172d3bce8508e
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
Log Message:
-----------
[X86] Remove unused BitVector TILERegs (NFC) (#136508)
It is not used.
Commit: c347ad21ab55fc28cbc1366e86de3ad073dd693a
https://github.com/llvm/llvm-project/commit/c347ad21ab55fc28cbc1366e86de3ad073dd693a
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (#136552)
fix, warning:
RISCVAsmParser::parsePseudoQCJumpSymbol(llvm::OperandVector&)’ defined
but not used [-Wunused-function]
Commit: 940108b24d1d7cb25b06dd66c6529bddc7daefab
https://github.com/llvm/llvm-project/commit/940108b24d1d7cb25b06dd66c6529bddc7daefab
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (#136551)
Commit: 788b50a4384985f2c221cfd8d290cabc6f59e646
https://github.com/llvm/llvm-project/commit/788b50a4384985f2c221cfd8d290cabc6f59e646
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/test/CodeGen/X86/combine-fcopysign.ll
Log Message:
-----------
[X86] Add test coverage for #136368
Commit: f12078e72601e7c03e5d66afab034313caf8f791
https://github.com/llvm/llvm-project/commit/f12078e72601e7c03e5d66afab034313caf8f791
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/optimize-cond-branch.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/PowerPC/undef-args.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
Log Message:
-----------
[SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#122741)
The PR will fix the issue
https://github.com/llvm/llvm-project/issues/122728
This patch addresses the signed/zero extension of poison by using a
poison value of the extended type instead of a constant zero of the
extended type.
Commit: 111af76bd74708929a048f94ef5c52af646f1c64
https://github.com/llvm/llvm-project/commit/111af76bd74708929a048f94ef5c52af646f1c64
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
A clang/test/CodeGenDirectX/unsupported_intrinsic.hlsl
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
Log Message:
-----------
[DirectX] add Function name to DiagnosticInfoUnsupported Msg in DXILOpLowering (#136234)
fixes #135654
In #128613 we added safe guards to prevent the lowering of just any
intrinsic in the backend. We used `DiagnosticInfoUnsupported` to do
this.
What we found was when using `opt` the diagnostic print function was
called but when using clang the diagnostic message was used.
Printing message in the clang version means we miss valuable debugging
information like function name and function type when LLVMContext was
only needed to call `getBestLocationFromDebugLoc`.
There are a few potential fixes
1. Write a custom DiagnosticInfoUnsupported so we can change the Message
just for DirectX. Too heavy handed so rejected.
2. Add the function name to the Message in DirectX code. Very simple one
line change. Downside is when using opt you see the function name twice.
But makes the clang-dxc bugs more actionable.
3. change CodeGenAction.cpp to always use the print function and not the
message directly. Downside is a bunch of innacurate information shows up
in the message if you don't specify `-debug-info-kind=standalone`.
4. add some book keeping to know which function called the intrinsic
keep a map of these so we can pass the calling function to
`DiagnosticInfoUnsupported` instead of the intrinsic. This would only be
useful if we had debug info so we could distinguish different uses of
the intrinsic by line\col number. We would also need to change from
iterating on every function to doing something like a LazyCallGraph
which is a nonstarter.
5. pick a different means of doing a Diagnostic error, because other
uses of `DiagnosticInfoUnsupported` error when we are in the body of a
function not when we see one being used like in the intrinsic case.
This PR went with a combo of option 2 & 5. Its low code change that also
only impacts the DirectX backend.
Commit: e18a77cfbe7549720d1a2584ab160edeb60963a6
https://github.com/llvm/llvm-project/commit/e18a77cfbe7549720d1a2584ab160edeb60963a6
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/optimize-cond-branch.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/PowerPC/undef-args.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
Log Message:
-----------
Revert "[SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#122741)"
This reverts commit f12078e72601e7c03e5d66afab034313caf8f791.
Breaks `check-llvm`, see comments on https://github.com/llvm/llvm-project/pull/122741
Commit: 1cb82ff9cd95c216f6d8da18637ee47a15bd41f6
https://github.com/llvm/llvm-project/commit/1cb82ff9cd95c216f6d8da18637ee47a15bd41f6
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
Log Message:
-----------
[clang][CIR] Fix various warnings. NFC
- Fix various warnings including '-Wparentheses', '-Wunused-variable',
and '-Wreturn-type'.
Commit: 08b0c2517eb859667d59873bf04b6aa78a7583a7
https://github.com/llvm/llvm-project/commit/08b0c2517eb859667d59873bf04b6aa78a7583a7
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/Parser.cpp
A clang/test/Parser/extern-template-attributes.cpp
Log Message:
-----------
[Clang] disallow use of attributes before extern template declarations (#136328)
Fixes #79893
---
This PR addresses the issue of _attributes_ being incorrectly allowed on
`extern template` declarations
```cpp
[[deprecated]] extern template struct S<int>;
```
Commit: cfc2b0d094f705aa0995eff0dc5f1faf1440a769
https://github.com/llvm/llvm-project/commit/cfc2b0d094f705aa0995eff0dc5f1faf1440a769
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/Support/SuffixTree.cpp
Log Message:
-----------
[llvm] Use llvm::SmallVector::pop_back_val (NFC) (#136533)
Commit: e1bb7f6ddec37567230d3e46719aee5bcd268d5a
https://github.com/llvm/llvm-project/commit/e1bb7f6ddec37567230d3e46719aee5bcd268d5a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#136456)
- Add command line option `num-to-skip-size` to parameterize the size of
`NumToSkip` bytes in the decoder table. Default value will be 2, and
targets that need larger size can use 3.
- Keep all existing targets, except AArch64, to use size 2, and change
AArch64 to use size 3 since it run into the "disassembler decoding table
too large" error with size 2.
- Additional fixes on top of earlier revert: mark `decodeNumToSkip` as
static (not necessary anymore as the generated code is now in anonymous
namespace, but doing it for consistency) and incorporate Bazel build
changes from https://github.com/llvm/llvm-project/pull/136212
- Following is a rough reduction in size for the decoder tables by
switching to size 2.
```
Target Old Size New Size % Reduction
================================================
AArch64 153254 153254 0.00
AMDGPU 471566 412805 12.46
ARC 5724 5061 11.58
ARM 84936 73831 13.07
AVR 1497 1306 12.76
BPF 2172 1927 11.28
CSKY 10064 8692 13.63
Hexagon 47967 41965 12.51
Lanai 1108 982 11.37
LoongArch 24446 21621 11.56
MSP430 4200 3716 11.52
Mips 36330 31415 13.53
PPC 31897 28098 11.91
RISCV 37979 32790 13.66
Sparc 8331 7252 12.95
SystemZ 36722 32248 12.18
VE 48296 42873 11.23
XCore 2590 2316 10.58
Xtensa 3827 3316 13.35
```
Commit: 52a5332a710d4db22327c3777ebf6873ff20732f
https://github.com/llvm/llvm-project/commit/52a5332a710d4db22327c3777ebf6873ff20732f
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
Log Message:
-----------
[HLSL] Make it possible to assign an array from a cbuffer (#134174)
Update Sema Checking to always do an HLSL Array RValue cast in the case
we are dealing with hlsl constant array types
Instead of comparing canonical types, compare canonical unqualified
types
Add a test to show it is possible to assign an array from a cbuffer.
Closes #133767
Commit: 93b74f7178e510a12f0eae700a25f7d3eb226265
https://github.com/llvm/llvm-project/commit/93b74f7178e510a12f0eae700a25f7d3eb226265
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-insert-icp-mdprof.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
Log Message:
-----------
[ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (#136015)
`TotalRootEntryCount` captures how many times that root was entered - regardless if a profile was also collected or not (profile collection for a given root happens on only one thread at a time).
We don't do this in compiler_rt because the goal there is to flush out the data as fast as possible, so traversing and multiplying vectors is punted to the profile user.
We really just need to do this when flattening the profile so that the values across roots and flat profiles match. We could do it earlier, too - like when loading the profile - but it seems beneficial (at least for debugging) to keep the counter values the same as the loaded ones. We can revisit this later.
Commit: 86a03367bf62375cf0cc299a56f09bed5f0c4875
https://github.com/llvm/llvm-project/commit/86a03367bf62375cf0cc299a56f09bed5f0c4875
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
Log Message:
-----------
[flang] Support fir.pack_array in FIR alias analysis. (#131946)
`fir.pack_array` is just a pass-through op for the process
of finding the source in FIR alias analysis (as defined in #127147).
Commit: 5133b432bc89f66547f6aab9a935f0a29f3b4572
https://github.com/llvm/llvm-project/commit/5133b432bc89f66547f6aab9a935f0a29f3b4572
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
A flang/test/Driver/m32-option.f90
Log Message:
-----------
Enable `-m32`, `-maix32` and `-maix64` for Flang on AIX. (#136202)
This PR enables `-m32`, -`maix32` and `-maix64` for AIX only. For other
platforms, the driver will issue an error that `-m32` is not supported.
Commit: 76ced7fa782f0d7db9efea871fa6de74706dd9cc
https://github.com/llvm/llvm-project/commit/76ced7fa782f0d7db9efea871fa6de74706dd9cc
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/ptrmask.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll
A llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
[AMDGPU] Insert readfirstlane in the function returns in sgpr. (#135326)
insert `readfirstlane` in the function returns in sgpr.
Commit: f0a59c49aaa951a25bea57cf753a8eb1735fd810
https://github.com/llvm/llvm-project/commit/f0a59c49aaa951a25bea57cf753a8eb1735fd810
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
Log Message:
-----------
Revert "[HLSL] Make it possible to assign an array from a cbuffer" (#136576)
Reverts llvm/llvm-project#134174
Revert due to test error in hlsl/ArrayAssignable.hlsl breaking a lot of bots.
Commit: b95ec24ff08c6ffc300bd85c8b0e53dfda4bceef
https://github.com/llvm/llvm-project/commit/b95ec24ff08c6ffc300bd85c8b0e53dfda4bceef
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
Log Message:
-----------
[SDAG] Handle insert_subvector in isKnownNeverNaN (#131989)
Propagate nnan across insert_subvector.
Commit: c17984711343c6cd16454431000b55627fc338eb
https://github.com/llvm/llvm-project/commit/c17984711343c6cd16454431000b55627fc338eb
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/blockaddress-canonicalize.mlir
A mlir/test/Dialect/LLVMIR/indirectbr.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/indirectbr.ll
A mlir/test/Target/LLVMIR/indirectbr.mlir
M mlir/test/mlir-translate/import-diagnostics.ll
Log Message:
-----------
Reapply [MLIR][LLVM] Support for indirectbr (#136378)
Fix msan issue that caused revert in
https://github.com/llvm/llvm-project/pull/135695
### Original message
Now that LLVM dialect has `blockaddress` support, introduce
import/translation for `indirectbr` instruction.
Commit: f02b285dbd284057d5f1dd5fb599d1c2155670f5
https://github.com/llvm/llvm-project/commit/f02b285dbd284057d5f1dd5fb599d1c2155670f5
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
Log Message:
-----------
[HLSL] Reland; Make it possible to assign an array from a cbuffer (#136580)
Reland #134174
Update Sema Checking to always do an HLSL Array RValue cast in the case
we are dealing with hlsl constant array types
Instead of comparing canonical types, compare canonical unqualified
types
Add a test to show it is possible to assign an array from a cbuffer.
Closes https://github.com/llvm/llvm-project/issues/133767
Commit: 5739a22fbb593eb44490d23e0c8cc12386e4b5b6
https://github.com/llvm/llvm-project/commit/5739a22fbb593eb44490d23e0c8cc12386e4b5b6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[VPlan] Also duplicated scalar-steps when it enables sinking scalars. (#136021)
Extend sinking logic to duplicate scalar steps recipe if it enables
sinking, that is if all users in a destination block require all lanes.
This should be the last step before removing legacy sinkScalarOperands.
PR: https://github.com/llvm/llvm-project/pull/136021
Commit: d08e9800650b78fdd9cbed1375faa0f55e4ac09c
https://github.com/llvm/llvm-project/commit/d08e9800650b78fdd9cbed1375faa0f55e4ac09c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-launch.fir
Log Message:
-----------
[flang][cuda] Only convert launch from CUDA Fortran kernels (#136221)
Make sure `gpu.launch_func` has a CUDA proc attribute and update the
conversion pattern to only convert those with the attribute.
Commit: 3e5a9d9aa04e2c99601ffb6f65032a299a56069c
https://github.com/llvm/llvm-project/commit/3e5a9d9aa04e2c99601ffb6f65032a299a56069c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Rename setFlags -> applyFlags (NFC).
Update name to apply flags to instructions, as suggested in
https://github.com/llvm/llvm-project/pull/135272.
Also changes the arg to a reference.
Commit: 1ab9e53e4910557f2a4c0f00c7a7f8b5ac493b48
https://github.com/llvm/llvm-project/commit/1ab9e53e4910557f2a4c0f00c7a7f8b5ac493b48
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
Log Message:
-----------
[lldb][Mach-O corefiles] Don't init Target arch to corefile (#136065)
This patch is making three changes, when loading a Mach-O corefile:
1. At the start of `DoLoadCore`, if a binary was provided in addition to
the corefile, initialize the Target's ArchSpec.
2. Before ProcessMachCore does its "exhaustive search" fallback, looking
through the corefile contents for a userland dyld or mach kernel, we
must make sure the Target has an ArchSpec, or methods that check the
address word size, or initialize a DataExtractor based on the Target
arch will not succeed.
3. Add logging when setting the Target's arch listing exactly what that
setting was based on -- the corefile itself, or the main binary.
Jonas landed a change last August (started with a patch from me) which
removed the Target ArchSpec initialization at the start of DoLoadCore,
in a scenario where the corefile had arch armv7 and the main binary had
arch armv7em (Cortex-M), and there was python code in the main binary's
dSYM which sets the operating system threads provider based on the
Target arch. It did different things for armv7 or armv7em, and so it
would fail.
Jonas' patch removed any ArchSpec setting at the start of DoLoadCore, so
we wouldn't have an incorrect arch value, but that broke the exhaustive
search for kernel binaries, because we didn't have an address word size
or endianness.
This patch should navigate the needs of both use cases.
I spent a good bit of time trying to construct a test to capture all of
these requirements -- but it turns out to be a good bit difficult,
encompassing both a genuine kernel corefiles and a microcontroller
firmware corefiles.
rdar://146821929
Commit: 846986f35b5a7baa498db7c61ae15dd9b2dee797
https://github.com/llvm/llvm-project/commit/846986f35b5a7baa498db7c61ae15dd9b2dee797
Author: Petr Hosek <phosek at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Disable PIC (#136376)
We aren't distributing any shared libraries so we don't need PIC and
using PIE instead of PIC can improve performance.
Commit: 3d14596ccfa3aa6b0735a630e3efb575a2085a06
https://github.com/llvm/llvm-project/commit/3d14596ccfa3aa6b0735a630e3efb575a2085a06
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
Log Message:
-----------
[CIR][NFC] Fix an unused variable warning (#136431)
This fixes a warning where a variable assigned in 'if' statement wasn't
referenced again.
Commit: 09006611151c7f85862a9da8da34872c456c2c37
https://github.com/llvm/llvm-project/commit/09006611151c7f85862a9da8da34872c456c2c37
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
Log Message:
-----------
[clang] Enable making `CompilerInstance` VFS thread-safe (#135737)
The `llvm::vfs::FileSystem` interface makes no promises around
thread-safety. To enable making `CompilerInstance` thread-safe, this PR
allows passing an explicit VFS to `cloneForModuleCompile()`. This will
be used from the dependency scanner.
Commit: 4c0ea476c40f7e426c84c37aaf5787aa80fb5e3b
https://github.com/llvm/llvm-project/commit/4c0ea476c40f7e426c84c37aaf5787aa80fb5e3b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Report error if Zilsd is used on RV64. (#136577)
Fixes #136564.
Commit: 9968ba8652b8a2936858a1a307207a9c8690ee5c
https://github.com/llvm/llvm-project/commit/9968ba8652b8a2936858a1a307207a9c8690ee5c
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/ptrmask.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll
R llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Revert "[AMDGPU] Insert readfirstlane in the function returns in sgpr. (#135326)"
This reverts commit 76ced7fa782f0d7db9efea871fa6de74706dd9cc since it breaks a
lot of bots.
Commit: c873ca25976d81f54421d9f4e24c5f700824d0d1
https://github.com/llvm/llvm-project/commit/c873ca25976d81f54421d9f4e24c5f700824d0d1
Author: royitaqi <royitaqi at users.noreply.github.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M lldb/include/lldb/Target/Statistics.h
M lldb/source/Target/Statistics.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
Log Message:
-----------
[lldb] Add symbol/table count into statistics (#136226)
# New stats
The following stats are added and are available in both "statistics
dump" command and in python API.
1. In summary:
1. Add `totalSymbolsLoaded`. The total number of symbols loaded in all
modules.
2. Add `totalSymbolTablesLoaded `. The total number symbol tables loaded
in all modules.
2. In each module's stats:
1. Add `symbolsLoaded`. The number of symbols loaded in the current
module.
# Example
Example `statistics dump` output:
```
(lldb) statistics dump
{
...,
"modules": [
{
"path": "/Users/<username>/demo/simple/a.out",
"symbolsLoaded": 6,
...
},
...
],
...
"totalSymbolTablesLoaded": 42,
"totalSymbolsLoaded": 32198
}
```
# Tests
**Manual test**: Built and ran lldb on a helloworld program. Ran
`statistics dump`. Verified the above stats.
**Unit test**: Ran the following tests:
```
$ bin/lldb-dotest -p TestStats.py ~/llvm-sand/external/llvm-project/lldb/test/API/commands/statistics/basic/
...
Ran 18 tests in 192.676s
OK (skipped=3)
```
Commit: e0c1e23b99e9719d0a01ab7dfc0807d891004bd4
https://github.com/llvm/llvm-project/commit/e0c1e23b99e9719d0a01ab7dfc0807d891004bd4
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
Log Message:
-----------
[TTI] Constify BasicTTIImplBase::thisT() (NFCI) (#136575)
The main change is making `thisT` method `const`, the rest of the
changes is fixing compilation errors (*).
(*) There are two tricky methods, `getVectorInstrCost()` and
`getIntImmCost()`.
They have several overloads; some of these overloads are typically
pulled in to derived classes using the `using` directive, and then
hidden by methods in the derived class.
The compiler does not complain if the hiding methods are not marked as
`const`, which means that clients will use the methods from the base
class. If after this change your target fails cost model tests, this
must be the reason. To resolve the issue you need to make all hiding
overloads `const`. See the second commit in this PR.
Pull Request: https://github.com/llvm/llvm-project/pull/136575
Commit: 0ae9dac262afccea1e1a2e02520f737ab38b286c
https://github.com/llvm/llvm-project/commit/0ae9dac262afccea1e1a2e02520f737ab38b286c
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
Log Message:
-----------
[OpenACC][CIR] Lower 'num_workers' for parallel/kernels (#136578)
This patch also includes the first one to handle 'device_type' properly,
which is where most of the 'challenge' here comes from.
>From the best I can tell: we must keep two lists of the same size, 1 of
all of the 'num_workers' items, and 1 of the 'device_type' value for
that 'num_workers'. Additionally, the 'device_type' list can only handle
single 'device_type' values, so we have to duplicate the 'num_workers'
items in cases where there are multiple applicable 'device_type' values.
This patch accomplishes this by keeping the two in sync, and saving the
current 'device_type' in the visitor.
Commit: 4b98955680e0aad33cad0e810f1daaa8bc7c0a23
https://github.com/llvm/llvm-project/commit/4b98955680e0aad33cad0e810f1daaa8bc7c0a23
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
Log Message:
-----------
Fix capitalization re review from 0ae9dac
Commit: 99e4b3927c5b8700b818ca2436f3c8394245e97c
https://github.com/llvm/llvm-project/commit/99e4b3927c5b8700b818ca2436f3c8394245e97c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/LazyBlockFrequencyInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CallGraph.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/DomPrinter.cpp
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/GlobalsModRef.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/IVUsers.cpp
M llvm/lib/Analysis/LazyBlockFrequencyInfo.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/LoopPass.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
M llvm/lib/Analysis/PhiValues.cpp
M llvm/lib/Analysis/PostDominators.cpp
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
M llvm/lib/Analysis/RegionInfo.cpp
M llvm/lib/Analysis/RegionPrinter.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
Log Message:
-----------
[LLVM] Cleanup pass initialization for Analysis passes (#135858)
- Do not call pass initialization from pass constructors.
- Instead, pass initialization should happen in the `initializeAnalysis`
function.
- https://github.com/llvm/llvm-project/issues/111767
Commit: b7c521b922f8b81544ecb0ccff2847644cac3107
https://github.com/llvm/llvm-project/commit/b7c521b922f8b81544ecb0ccff2847644cac3107
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
Log Message:
-----------
[OpenACC][CIR] Lowering for 'vector_length' on compute constructs
This is the same as the 'num_workers', with slightly different names in
places, so we just do the same exact implementation. This extracts the
implementation as well, which should make it easier to reuse.
Commit: 1b4919d0824411ab1a4fb055b22532fd466541f7
https://github.com/llvm/llvm-project/commit/1b4919d0824411ab1a4fb055b22532fd466541f7
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn
Log Message:
-----------
[gn] port e1bb7f6ddec375
Commit: 8c83355d5baa6ecbb5884240df195826380ed952
https://github.com/llvm/llvm-project/commit/8c83355d5baa6ecbb5884240df195826380ed952
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Handle VPIRPhi in VPRecipeBase::isPhi (NFC).
Also handle VPIRPhi in VPRecipeBase::isPhi, to simplify existing code
dealing with VPIRPhis.
Suggested as part of https://github.com/llvm/llvm-project/pull/136455.
Commit: c1049e42a1beab9b240cec80418b3ce32c9da03e
https://github.com/llvm/llvm-project/commit/c1049e42a1beab9b240cec80418b3ce32c9da03e
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
[AMDGPU] Correct VOP3P encoding. NFC. (#136005)
VOP3P encoding field was defined as 9 bit in GFX8/GFX9 and opcode
was 7 bit, while it is 8 and 8 since GFX10. There are no changes
to instructions, but it fixes difference with SP3 in terms of
fields breakdown.
Commit: 56bf0e720288ae6ba6e8635c7ec12f1e7d6f783b
https://github.com/llvm/llvm-project/commit/56bf0e720288ae6ba6e8635c7ec12f1e7d6f783b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/src/Kernel.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/include/Shared/Environment.h
Log Message:
-----------
[OpenMP] Remove dependency on LLVM include directory from DeviceRTL (#136359)
Summary:
Currently we depend on a single LLVM include directory. This is actually
only required to define one enum, which is highly unlikely to change.
THis patch makes the `Environment.h` include directory more hermetic so
we no long depend on other libraries. In exchange, we get a simpler
dependency list for the price of hard-coding `1` somewhere. I think it's
a valid trade considering that this flag is highly unlikely to change at
this point.
@ronlieb AMD version
https://gist.github.com/jhuber6/3313e6f957be14dc79fe85e5126d2cb3
Commit: 863ead29e92de800fe50e56958b6eba6ede023e9
https://github.com/llvm/llvm-project/commit/863ead29e92de800fe50e56958b6eba6ede023e9
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/include/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add a helper library with all deps of generated headers. (#136582)
Create "public_header_deps" that is a convenient way to express
dependencies of a generated headers as a single (and same) target. It's
also convenient to use it in unit tests - which is also demonstrated in
this PR by adding the BUILD.bazel placeholder for test/include unit
tests, and creating a libc_test target for one of these tests.
See issue #134780.
Commit: 704fc6542cf171c603bd387663a2de3a3fa9c4ff
https://github.com/llvm/llvm-project/commit/704fc6542cf171c603bd387663a2de3a3fa9c4ff
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (#136600)
If an ATOMIC_LOAD has ZEXTLOAD/SEXTLOAD extension type we should trust
that over getExtendForAtomicOps().
SystemZ is the only target that uses setAtomicLoadExtAction and they
return ANY_EXTEND from getExtendForAtomicOps(). So I'm not sure there's
a way to get a contradiction currently.
Note, type legalization uses getExtendForAtomicOps() when promoting
ATOMIC_LOAD so we may not need to check getExtendForAtomicOps() for
ATOMIC_LOAD. I have not done much investigating of this.
Commit: aa5cdc0600ac8157a80f54fa2555ae7dfd5fc520
https://github.com/llvm/llvm-project/commit/aa5cdc0600ac8157a80f54fa2555ae7dfd5fc520
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-vl-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
Log Message:
-----------
[msan][NFCI] Add avx512fp16-{arith-intrinsics, arith-vl-intrinsics, intrinsics} tests (#136260)
Forked from llvm/test/CodeGen/X86/avx512fp16-{arith-intrinsics,
arith-vl-intrinsics, intrinsics}.ll
The tests show that many instructions are handled suboptimally or
heuristically, but this commit message is too narrow to contain them.
Commit: 1e803770a5a0d7e5a12511f6d505b779a1931724
https://github.com/llvm/llvm-project/commit/1e803770a5a0d7e5a12511f6d505b779a1931724
Author: lexi-nadia <me at lexibromfield.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][SMT] update Bazel configuration to match 697aa99 (#136616)
Update Bazel configuration to match
697aa9995c24a977425e672d76a4a434384b16e3.
Commit: a27f7ac5c4e44b495f52e8d77b68a164dd833fda
https://github.com/llvm/llvm-project/commit/a27f7ac5c4e44b495f52e8d77b68a164dd833fda
Author: gulfemsavrun <gulfem at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[Fuchsia] Disable PIC" (#136617)
Reverts llvm/llvm-project#136376 because it broke Fuchsia Clang
toolchain builders.
Commit: a945f5917cb01350487999b24b068e18111bfbfe
https://github.com/llvm/llvm-project/commit/a945f5917cb01350487999b24b068e18111bfbfe
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
R llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.fpmath.ll
A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
Log Message:
-----------
AMDGPU: Add global-isel checks and rename fptrunc.v2f16.fpmath.ll (#136609)
Also remove the checks with -enable-unsafe-fp-math (already in fptrunc.f16.ll)
Commit: 3ceb3d96ff166305f015f1f00b2740e148347532
https://github.com/llvm/llvm-project/commit/3ceb3d96ff166305f015f1f00b2740e148347532
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/test/Semantics/OpenACC/acc-kernels.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Semantics/OpenACC/acc-serial.f90
M llvm/include/llvm/Frontend/OpenACC/ACC.td
Log Message:
-----------
[flang][openacc] Make async clause behavior homogenous (#136610)
The `async` clause was not handed in a similar way on `serial`,
`parallel` and `kernels` directive. This patches updates the `ACC.td`
file and the flang semantic to make it homogenous.
Commit: 515564aa6ebeadc06eea03ff92aeda64727f1da5
https://github.com/llvm/llvm-project/commit/515564aa6ebeadc06eea03ff92aeda64727f1da5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] Partially revert my llvm::less_second patch (#136615)
This patch partially reverts:
commit 5e1b0f97735083b6762834b83fdbb35e76002e03
Author: Kazu Hirata <kazu at google.com>
Date: Fri Apr 18 10:05:55 2025 -0700
to fix:
LLVM :: CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
LLVM :: CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
under LLVM_ENABLE_EXPENSIVE_CHECKS.
Commit: de0153da325b21340747d8a064906a8c1c2f95ea
https://github.com/llvm/llvm-project/commit/de0153da325b21340747d8a064906a8c1c2f95ea
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/BuiltinsARM.def
M clang/lib/Headers/arm_acle.h
M clang/lib/Sema/SemaARM.cpp
A clang/test/CodeGen/arm-former-microsoft-intrinsics-header-warning.c
A clang/test/CodeGen/arm-former-microsoft-intrinsics.c
M clang/test/CodeGen/arm-microsoft-intrinsics.c
A clang/test/CodeGen/arm64-former-microsoft-intrinsics-header-warning.c
A clang/test/CodeGen/arm64-former-microsoft-intrinsics.c
M clang/test/CodeGen/arm64-microsoft-intrinsics.c
M clang/test/CodeGen/builtins-arm-microsoft.c
M clang/test/Headers/Inputs/include/stdint.h
M clang/test/Headers/ms-intrin.cpp
Log Message:
-----------
[clang][ARM][AArch64] Define intrinsics guarded by __has_builtin on all platforms (#128222)
Instead of defining ARM ACLE intrinsics only on MSVC and guarding
wrapper functions in headers with `__has_builtin`, universally define
the intrinsics as target header builtins.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 7810d8484413ae64029c93f8dfc43f77b0ba98c3
https://github.com/llvm/llvm-project/commit/7810d8484413ae64029c93f8dfc43f77b0ba98c3
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
Log Message:
-----------
[HLSL] Boolean in a RawBuffer should be i32 and Boolean vector in a RawBuffer should be <N x i32> (#135848)
Instead of converting the type in a RawBuffer to its HLSL type using
'ConvertType', use 'ConvertTypeForMem'.
ConvertTypeForMem handles booleans being i32 and boolean vectors being <
N x i32 >.
Add tests to show booleans and boolean vectors in RawBuffers now have
the correct type of i32, and <N x i32> respectively.
Closes #135635
Commit: 8389d6fad76bd880f02bddce7f0f2612ff0afc40
https://github.com/llvm/llvm-project/commit/8389d6fad76bd880f02bddce7f0f2612ff0afc40
Author: Pranav Kant <prka at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M lld/ELF/ICF.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
A lld/test/ELF/aarch64-got-merging-icf.s
M lld/test/ELF/icf-preemptible.s
Log Message:
-----------
[lld] Merge equivalent symbols found during ICF (#134342)
Fixes a correctness issue for AArch64 when ADRP and LDR instructions are
outlined in separate sections and sections are fed to ICF for
deduplication.
See test case (based on
https://github.com/llvm/llvm-project/issues/129122) for details. All
rodata.* sections are folded into a single section with ICF. This leads
to all f2_* function sections getting folded into one (as their
relocation target symbols g* belong to .rodata.g* sections that have
already been folded into one). Since relocations still refer original g*
symbols, we end up creating duplicate GOT entry for all such symbols.
This PR addresses that by tracking such folded symbols and create one
GOT entry for all such symbols.
Fixes https://github.com/llvm/llvm-project/issues/129122
Co-authored by: @jyknight
Commit: 92c0b425ad4ca7f4c9b8f7f663e6e64d1e070353
https://github.com/llvm/llvm-project/commit/92c0b425ad4ca7f4c9b8f7f663e6e64d1e070353
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
A llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
Log Message:
-----------
[NVPTX] add test case for vector reduction intrinsics (#136381)
Test how these intrinsics are handled by the NVPTX backend. Currently, these intrinsics are lowered to sequential reductions by the ExpandReductions pass.
Commit: 6d765e1c916aba7a038f5ace963001fca4fc9314
https://github.com/llvm/llvm-project/commit/6d765e1c916aba7a038f5ace963001fca4fc9314
Author: Owen Anderson <resistor at mac.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang/lib/AST/Decl.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
Reapply 19c708c "FunctionDecl::getFunctionTypeLoc: ignore function type attributes (#118420)" (#136484)
Avoid using PreservesMost in the testcase as it is not supported on all
targets.
Original PR #118290.
Co-authored-by: Robert Dazi <14996868+v01dXYZ at users.noreply.github.com>
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Commit: 3ca2fa704e149ca22bd9739101ee7d5c498eb1a6
https://github.com/llvm/llvm-project/commit/3ca2fa704e149ca22bd9739101ee7d5c498eb1a6
Author: Theo de Magalhaes <theodemagalhaes at icloud.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/test/SemaCXX/windows-Wpadded-bitfield.cpp
Log Message:
-----------
[CLANG][MS-STRUCT] bitfield padding warning presents padding to exact bit count (#136062)
Aims to fix #131647.
Commit: c40d3a411ce3f0a35ae4f3d2f0e1e7df45673856
https://github.com/llvm/llvm-project/commit/c40d3a411ce3f0a35ae4f3d2f0e1e7df45673856
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
M llvm/test/CodeGen/PowerPC/dmf-outer-product.ll
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
Log Message:
-----------
[PowerPC] Add dense math bfloat16 floating-point outer-product accumulate to DMR instructions (#133109)
This patch adds the following Dense Math Facility bfloat16
floating-point calculation instructions: dmxvbf16gerx2,
dmxvbf16gerx2pp,dmxvbf16gerx2pn, dmxvbf16gerx2np, dmxvbf16gerx2nn,
pmdmxvbf16gerx2, pmdmxvbf16gerx2pp, pmdmxvbf16gerx2pn,
pmdmxvbf16gerx2np, pmdmxvbf16gerx2nn, along with their corresponding
intrinsics and tests.
Commit: 56910a8b1b302ebf37e9d30bd200091fd23dc232
https://github.com/llvm/llvm-project/commit/56910a8b1b302ebf37e9d30bd200091fd23dc232
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/bug21465.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Improve kernel byval parameter lowering (#136008)
This change introduces a new pattern for lowering kernel byval
parameters in `NVPTXLowerArgs`. Each byval argument is wrapped in a call
to a new intrinsic, `@llvm.nvvm.internal.addrspace.wrap`. This intrinsic
explicitly equates to no instructions and is removed during operation
legalization in SDAG. However, it allows us to change the addrspace of
the arguments to 101 to reflect the fact that they will occupy this
space when lowered by `LowerFormalArgs` in `NVPTXISelLowering`.
Optionally, if a generic pointer to a param is needed, a standard
`addrspacecast` is used. This approach offers several advantages:
- Exposes addrspace optimizations: By using a standard `addrspacecast`
back to generic space we allow InferAS to optimize this instruction,
potentially sinking it through control flow or in other ways unsupported
by `NVPTXLowerArgs`. This is demonstrated in several existing tests.
- Clearer, more consistent semantics: Previously an `addrspacecast` from
generic to param space was implicitly a no-op. This is problematic
because it's not reciprocal with the inverse cast, violating LLVM
semantics. Further it is very confusing given the existence of
`cvta.to.param`. After this change the cast equates to this instruction.
- Allow for the removal of all nvvm.ptr.* intrinsics: In a follow-up
change the nvvm.ptr.gen.to.param and nvvm.ptr.param.to.gen intrinsics
may be removed.
Commit: e79d8f6892aa138bfef65334817c24d3d9881855
https://github.com/llvm/llvm-project/commit/e79d8f6892aa138bfef65334817c24d3d9881855
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
Log Message:
-----------
[flang][acc] Update stride calculation to include inner-dimensions (#136613)
The acc.bounds operation allows specifying stride - but it did not
clarify what it meant. The dialect was updated to specifically note that
stride must capture inner dimension sizes when specified for outer
dimensions.
Flang lowering was also updated for OpenACC to adhere to this. This was
already the case for descriptor-based arrays - but now this is also
being done for all arrays.
Commit: 53e62c654a3fe181686f1ccd960d2e2b981e4313
https://github.com/llvm/llvm-project/commit/53e62c654a3fe181686f1ccd960d2e2b981e4313
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M compiler-rt/test/profile/AIX/pgo-lto-bcdtor-function-section.test
Log Message:
-----------
[compiler-rt][profile][tests][NFC] Avoid using a.out from PATH (#136465)
Fix use of `a.out` from the PATH by specifying `./a.out`.
Commit: d2fedd67debf011cec7465e0c7ac330dfb548b72
https://github.com/llvm/llvm-project/commit/d2fedd67debf011cec7465e0c7ac330dfb548b72
Author: Augie Fackler <augie at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
Log Message:
-----------
[NVPTX] mark unused variable introduced by 56910a8b1b302ebf37e9d30bd200091fd23dc232 [NFC]
Commit: d1f4f52aa6f2276da8880b5003f220ce6211ad44
https://github.com/llvm/llvm-project/commit/d1f4f52aa6f2276da8880b5003f220ce6211ad44
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-intrinsics.ll
Log Message:
-----------
[msan] Handle x86.avx512fp16.{add,sub.mul,div,min,max}.ph.512 (#136619)
These are handled similarly to x86_avx512_(min|max)_p[sd]_512 intrinsics
(https://github.com/llvm/llvm-project/pull/124421) i.e., using
maybeHandleSimpleNomemIntrinsic, with the last parameter being the
rounding method.
Updates the test from https://github.com/llvm/llvm-project/pull/136260
Commit: d5b40c71f6be972f677de5d9886f91866df007b5
https://github.com/llvm/llvm-project/commit/d5b40c71f6be972f677de5d9886f91866df007b5
Author: royitaqi <royitaqi at users.noreply.github.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/source/Core/Module.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Symbol/SymbolFile.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
M lldb/unittests/Symbol/LineTableTest.cpp
M lldb/unittests/Symbol/SymtabTest.cpp
Log Message:
-----------
[lldb] Avoid force loading symbols in statistics collection (#136236)
Currently, `DebuggerStats::ReportStatistics()` calls
`Module::GetSymtab(/*can_create=*/false)`, but then the latter calls
`SymbolFile::GetSymtab()`. This will load symbols if haven't yet. See
stacktrace below.
The problem is that `DebuggerStats::ReportStatistics` should be
read-only. This is especially important because it reports stats for
symtab parsing/indexing time, which could be affected by the reporting
itself if it's not read-only.
This patch fixes this problem by adding an optional parameter
`SymbolFile::GetSymtab(bool can_create = true)` and receive the `false`
value passed down from `Module::GetSymtab(/*can_create=*/false)` when
the call was initiated from `DebuggerStats::ReportStatistics()`.
Commit: a1db2c64918efa3d74dfdb402b8cff30bc555521
https://github.com/llvm/llvm-project/commit/a1db2c64918efa3d74dfdb402b8cff30bc555521
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Remove duplicate call to MFI.getStackID(FI). NFC
Reuse existing local variable.
Commit: 2cdf474f12090919e5b14c6ef922e5d5df407418
https://github.com/llvm/llvm-project/commit/2cdf474f12090919e5b14c6ef922e5d5df407418
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/Transforms/MemProfContextDisambiguation/mergenodes.ll
A llvm/test/Transforms/MemProfContextDisambiguation/mergenodes2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/overlapping-contexts.ll
Log Message:
-----------
[MemProf] Merge callee clones as needed before assigning functions (#135702)
We perform cloning for each allocation node separately. However, this
sometimes results in a situation where the same node calls multiple
clones of the same callee, created for different allocations. This
causes issues when assigning functions to these clones, as each node can
in reality only call a single callee clone.
To address this, before assigning functions, merge callee clone nodes as
needed using a post order traversal from the allocations. We attempt to
use existing clones as the merge node when legal, and to share them
among callers with the same properties (callers calling the same set of
callee clone nodes for the same allocations).
Without this fix, in some cases incorrect function assignment will lead
to calling the wrong allocation clone. In fact, this showed up in an
existing test, that I didn't notice as it existed to test earlier parts
of the cloning process.
Commit: 08b4c52540727455194b0cf0f6310f391e87c2a5
https://github.com/llvm/llvm-project/commit/08b4c52540727455194b0cf0f6310f391e87c2a5
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/source/Core/Module.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Symbol/SymbolFile.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
M lldb/unittests/Symbol/LineTableTest.cpp
M lldb/unittests/Symbol/SymtabTest.cpp
Log Message:
-----------
Revert "[lldb] Avoid force loading symbols in statistics collection (#136236)"
This reverts commit d5b40c71f6be972f677de5d9886f91866df007b5.
This change broke greendragon lldb test:
lldb-api :: commands/statistics/basic/TestStats.py
And is therefore being reverted.
Commit: 2b44eb9f56a51a25391319541de750bb9b5c1fc9
https://github.com/llvm/llvm-project/commit/2b44eb9f56a51a25391319541de750bb9b5c1fc9
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/test/TableGen/VarLenDecoder.td
Log Message:
-----------
[LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (#136632)
Commit: c7ea01b8a0382c21da1f64a9bf077c951096db8e
https://github.com/llvm/llvm-project/commit/c7ea01b8a0382c21da1f64a9bf077c951096db8e
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable.ll
M llvm/test/Transforms/LowerTypeTests/cfi-direct-call1.ll
M llvm/test/Transforms/LowerTypeTests/function-arm-thumb.ll
M llvm/test/Transforms/LowerTypeTests/function-thumb-bti.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable.ll
M llvm/test/Transforms/MergeFunc/cfi-thunk-merging.ll
Log Message:
-----------
LowerTypeTests: Switch to emitting one inline asm call per jump table entry.
With the previous approach of emitting one inline asm call for all jump
table entries we would encounter SelectionDAG's limit on the number
of operands per node (65536) when the number of jump table entries
exceeded that number. Fix the problem by switching to one inline asm
per jump table entry so that each DAG node only needs one operand.
Reviewers: fmayer, vitalybuka
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/136265
Commit: 698cd48db9c2058442e5e6355a77e91e3456ec2c
https://github.com/llvm/llvm-project/commit/698cd48db9c2058442e5e6355a77e91e3456ec2c
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
Log Message:
-----------
[RISCV] Fix Lsb > Msb case in (sra (sext_inreg X, _), C) for th.ext (#136287)
According the
[spec](https://github.com/XUANTIE-RV/thead-extension-spec/releases/tag/2.3.0),
the operation of `th.ext rd, rs1, msb, lsb` is
reg[rd] := sign_extend(reg[rs1][msb:lsb])
The spec doesn't specify if lsb is greater than msb.
I don't think lsb can be greater than msb. So that If the shift-right
amount is greater than msb, we can set lsb equal to msb to extract the
bit rs1[msb] and sign-extend it.
Commit: ddb8870a5f396f2f17462f878fb7c0cffc879ce4
https://github.com/llvm/llvm-project/commit/ddb8870a5f396f2f17462f878fb7c0cffc879ce4
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
Log Message:
-----------
[RISCV] Remove the FIXME for using sraiw+and. NFC.
https://github.com/llvm/llvm-project/pull/102034 has implemented it.
Commit: 46e734746db7176f6e32b3c98beacf1e94fced37
https://github.com/llvm/llvm-project/commit/46e734746db7176f6e32b3c98beacf1e94fced37
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
Log Message:
-----------
[flang][cuda] Update stream type for cuf kernel op (#136627)
Update the type of the stream operand to be similar to KernelLaunchOp.
Commit: b144258b0c0cc63dffba00a911d6539f00ed07bb
https://github.com/llvm/llvm-project/commit/b144258b0c0cc63dffba00a911d6539f00ed07bb
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExpr.cpp
M clang/test/AST/ast-dump-recovery.cpp
M clang/test/AST/new-unknown-type.cpp
M clang/test/Parser/cxx-concepts-requires-clause.cpp
Log Message:
-----------
[Clang] Improve error recovery for invalid calls (#136295)
It doesn't make sense that we only build a RecoveryExpr for expressions
with invalid trailing commas. This patch extends it so that we now
always build up a RecoveryExpr whenever the call contains anything
invalid. As a result, we can back out HasTrailingComma.
There is only one diagnostic change as to concepts, where a RecoveryExpr
than an ExprError is now used to model an invalid requires clause, for
which we suggest adding parentheses around it. (This looks like what GCC
diagnoses)
Commit: 0014b49482c0862c140149c650d653b4e41fa9b4
https://github.com/llvm/llvm-project/commit/0014b49482c0862c140149c650d653b4e41fa9b4
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/VE/VETargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
Log Message:
-----------
[TTI] Make all interface methods const (NFCI) (#136598)
Making `TargetTransformInfo::Model::Impl` `const` makes sure all
interface methods are `const`, in `BasicTTIImpl`, its bases, and in all
derived classes.
Pull Request: https://github.com/llvm/llvm-project/pull/136598
Commit: 9e26c797ae9699fba8bd62af99ab3ad6f9b16462
https://github.com/llvm/llvm-project/commit/9e26c797ae9699fba8bd62af99ab3ad6f9b16462
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/machine-csr-names.s
M llvm/test/MC/RISCV/rv32-machine-csr-names.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add smcntrpmf extension (#136556)
spec: https://github.com/riscvarchive/riscv-smcntrpmf
Commit: 497382ee07100f3698621fc48b66a0bd50a1ca2a
https://github.com/llvm/llvm-project/commit/497382ee07100f3698621fc48b66a0bd50a1ca2a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-21 (Mon, 21 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (#136651)
In theory, the mismatch would have made CSE of AtomicSDNodes not work,
but I don't know how to test it.
Commit: 784dc16088885ebb28437ae2dbb90dcfd5df0457
https://github.com/llvm/llvm-project/commit/784dc16088885ebb28437ae2dbb90dcfd5df0457
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef][IR] Fix default AS documentation for allocas without explicit AS (#135942)
So far, the Language Reference said that the alloca address space from
the datalayout is used if no explicit address space is provided, which
is not what the LLParser and the AsmWriter implement. This patch adjusts
the documentation to match the implementation: The default AS 0 is used
if none is explicitly specified.
This is an alternative to PR #135786, which would change the parser's
behavior to match the Language Reference instead.
Commit: 53927ab726e6d0dfb3255498b6d0b130adeafb8c
https://github.com/llvm/llvm-project/commit/53927ab726e6d0dfb3255498b6d0b130adeafb8c
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
Log Message:
-----------
[CIR] Make ZeroAttr use AttrBuilderWithInferredContext (#136604)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1576
Commit: 0ca2d4d10451874b1d107e89c32eb7fd95e1a608
https://github.com/llvm/llvm-project/commit/0ca2d4d10451874b1d107e89c32eb7fd95e1a608
Author: Kirill Chibisov <contact at kchibisov.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/transforms.mlir
M mlir/test/Target/Cpp/expressions.mlir
Log Message:
-----------
[mlir][emitc] mark `emitc.load` with `CExpression` (#130802)
Follow the `call` and `call_opaque` operations, as well as `apply`,
which already are marked as `CExpression` even though they have side
effects.
Even though `emitc.load` can be included inside the `emitc.expression`,
the inlining and `--form-expression` pass won't actually inline them
inside other expression due to it having a side effect, thus unless the
user manually writes the `emitc.load` inside the `emitc.expression` it
won't appear there.
--
It was brought
https://github.com/llvm/llvm-project/pull/91475#issuecomment-2302529428
and while there was some opposition due to `load` having a side effect,
`emitc` already allows all the rest operations that have it, so for
consistency reasons, enabling it doesn't really hurt from my point of
view. Especially given that `--form-expression` doesn't allow
it to really inline inside other expressions, which makes sense, since
if the users want such behavior, they should explicitly opt-in.
Commit: 8639b365a5988932973a82ffe5e620a9c8ef9039
https://github.com/llvm/llvm-project/commit/8639b365a5988932973a82ffe5e620a9c8ef9039
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
Log Message:
-----------
[CIR] Make UndefAttr use AttrBuilderWithInferredContext (#136605)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1577
Commit: 2d3bbb6aafbc74ef6fc51286f09def0f0e35fe14
https://github.com/llvm/llvm-project/commit/2d3bbb6aafbc74ef6fc51286f09def0f0e35fe14
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/lib/IR/Builders.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Erase materialized constants instead of rollback (#136489)
When illegal (and not legalizable) constant operations are materialized
during a dialect conversion as part of op folding, these operations must
be deleted again. This used to be implemented via the rollback
mechanism. This commit switches the implementation to regular rewriter
API usage: simply delete the materialized constants with `eraseOp`.
This commit is in preparation of the One-Shot Dialect Conversion
refactoring, which will disallow IR rollbacks.
This commit also adds a new optional parameter to `OpBuilder::tryFold`
to get hold of the materialized constant ops.
Commit: 56f5bcb0350b8af44aa5f65ccf865a464df2cc4a
https://github.com/llvm/llvm-project/commit/56f5bcb0350b8af44aa5f65ccf865a464df2cc4a
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
Log Message:
-----------
[CIR] Let ConstantOp builder infer its type automatically (#136606)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1578
Commit: 8bc0d4d1ccb708d20413876258885a48d3ca6b3d
https://github.com/llvm/llvm-project/commit/8bc0d4d1ccb708d20413876258885a48d3ca6b3d
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Add flag to disable rollback (#136490)
This commit adds a new flag to `ConversionConfig` to disallow the
rollback of IR modification. This commit is in preparation of the
One-Shot Dialect Conversion refactoring, which will remove the ability
to roll back IR modifications from the conversion driver.
RFC:
https://discourse.llvm.org/t/rfc-a-new-one-shot-dialect-conversion-driver/79083/46
By default, this flag is set to "true". I.e., the rollback of IR
modifications is allowed. When set to "false", the conversion driver
will report a fatal LLVM error when an IR rollback is requested. The
name of the rolled back pattern is included in the error message.
Moreover, the original IR is no longer restored after a failed
conversion.
Example:
```
within split at llvm-project/mlir/test/Conversion/ArithToSPIRV/fast-math.mlir:1 offset :11:8: error: pattern '(anonymous namespace)::CmpFOpNanKernelPattern' produced IR that could not be legalized
%0 = arith.cmpf ord, %arg0, %arg1 fastmath<fast> : f32
^
within split at llvm-project/mlir/test/Conversion/ArithToSPIRV/fast-math.mlir:1 offset :11:8: note: see current operation: %1 = "arith.cmpf"(%arg0, %arg1) <{fastmath = #arith.fastmath<fast>, predicate = 7 : i64}> : (f32, f32) -> i1
pattern '(anonymous namespace)::CmpFOpNanKernelPattern' rollback of IR modifications requested
UNREACHABLE executed at llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:1231!
```
The majority of patterns in MLIR have already been updated such that
they do not trigger any rollbacks, but a few SPIRV patterns remain. More
information in the RFC.
Commit: a22ad659cd0665669d89fae174f9e6a83d1a446d
https://github.com/llvm/llvm-project/commit/a22ad659cd0665669d89fae174f9e6a83d1a446d
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Log Message:
-----------
[lldb/cmake] Normalize use of HAVE_LIBCOMPRESSION (#135528)
I *think* this was the reason behind the failures in
2fd860c1f559c0b0be66cc000e38270a04d0a1a3: the clang include tool showed
the Config.h headers as unused, and because the macro was referenced
through an `#ifdef`, its removal didn't cause build failures. Switching
to `#cmakedefine01` + `#if` should make sure this does not happen again.
According to D48977, the `#ifndef`+`#cmakedefine` patterns is due to
some files redefining the macro themselves. I no longer see any such
files in the source tree (there also were no files like that in the
source tree at the revision mentioned, but the macro *was* defined in
the hand-maintained XCode project we had at the time).
Commit: f541a3aad8e70b613ea411bf2d3e64a220f98e82
https://github.com/llvm/llvm-project/commit/f541a3aad8e70b613ea411bf2d3e64a220f98e82
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
A llvm/test/CodeGen/AMDGPU/si-instr-info-vopc-exec.mir
Log Message:
-----------
[AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (#134629)
SIInstrInfo::resultDependsOnExec assumes that operand 0 of a comparison
is always the destination of the instruction. This is not true for
instructions in VOPC form where it is "src0". This led to a crash in
machine-cse.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: ef72b936262bc712d65756df1ad3ee095c794e0e
https://github.com/llvm/llvm-project/commit/ef72b936262bc712d65756df1ad3ee095c794e0e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
Log Message:
-----------
[LV] Use requested calling convention for vector math routines (#136122)
Some vector math routines, e.g. ArmPL, specify a particular
calling convention on the routines which can help improve
performance by specifying what registers have to be preserved
across the call.
Commit: 3334c3597dd51f5a102e5005738e3bf4ef7530e2
https://github.com/llvm/llvm-project/commit/3334c3597dd51f5a102e5005738e3bf4ef7530e2
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/VE/VETargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
Log Message:
-----------
[TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (#136655)
These are not diagnosed because implementations hide the methods of the base class rather than overriding them.
This works as long as a hiding function is callable with the same arguments as the same function from the base class.
Pull Request: https://github.com/llvm/llvm-project/pull/136655
Commit: a35f940b876a09211f3e68dd25d00271b7195145
https://github.com/llvm/llvm-project/commit/a35f940b876a09211f3e68dd25d00271b7195145
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang/lib/Index/IndexBody.cpp
Log Message:
-----------
[clangd] Support operators new and delete in textDocument/references (#135620)
Commit: c3f815ba82defc84244a9688fd2578da513340fb
https://github.com/llvm/llvm-project/commit/c3f815ba82defc84244a9688fd2578da513340fb
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/source/Core/DataFileCache.cpp
M llvm/include/llvm/Support/Caching.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Support/Caching.cpp
M llvm/tools/gold/gold-plugin.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/Caching.cpp
Log Message:
-----------
Modify the localCache API to require an explicit commit on CachedFile… (#136121)
…Stream.
CachedFileStream has previously performed the commit step in its
destructor, but this means its only recourse for error handling is
report_fatal_error. Modify this to add an explicit commit() method, and
call this in the appropriate places with appropriate error handling for
the location.
Currently the destructor of CacheStream gives an assert failure in Debug
builds if commit() was not called. This will help track down any
remaining uses of the API that assume the old destructior behaviour. In
Release builds we fall back to the previous behaviour and call
report_fatal_error if the commit fails.
This is version 2 of this PR, superseding reverted PR
https://github.com/llvm/llvm-project/pull/115331 . I have incorporated a
change to the testcase to make it more reliable on Windows, as well as
two follow-up changes
(https://github.com/llvm/llvm-project/commit/df79000896101acc9b8d7435e59f767b36c00ac8
and
https://github.com/llvm/llvm-project/commit/b0baa1d8bd68a2ce2f7c5f2b62333e410e9122a1)
that were also reverted when 115331 was reverted.
---------
Co-authored-by: Augie Fackler <augie at google.com>
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: 382263376fcfed967f5bc17400d9e4542b37801c
https://github.com/llvm/llvm-project/commit/382263376fcfed967f5bc17400d9e4542b37801c
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/docs/resources/build.rst
Log Message:
-----------
[lldb][docs] Repeat required Python version number
We do say it in the table below but if you didn't
want any optional stuff you'd miss it.
Commit: 278c429d11e63bc709ea8c537b23c4e350ce2a07
https://github.com/llvm/llvm-project/commit/278c429d11e63bc709ea8c537b23c4e350ce2a07
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)
After #135642 we have a range attribute on the intrinsic declaration,
so we should not need the special handling here.
Commit: 4bcc414af3782c333f3d535c0e0a92e6120868f5
https://github.com/llvm/llvm-project/commit/4bcc414af3782c333f3d535c0e0a92e6120868f5
Author: Robert Konicar <rkonicar at mail.muni.cz>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/SMT/IR/SMTAttributes.td
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/TableGen/AttrOrTypeDef.h
M mlir/lib/Dialect/SMT/IR/SMTAttributes.cpp
M mlir/lib/TableGen/AttrOrTypeDef.cpp
A mlir/test/mlir-tblgen/apint-param-error.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
Log Message:
-----------
[MLIR][TableGen] Error on APInt parameter without custom comparator (#135970)
The error is triggered when an attribute or type uses an APInt typed
parameter with the generated equality operator. If the compared APInts
have different bit widths the equality operator triggers an assert. This
is dangerous, since `StorageUniquer` for types and attributes uses the
equality operator when a hash collision appears. As such, it is
necessary to use custom provided comarator or `APIntParameter` that
already has it.
This commit also replaces uses of the raw `APInt` parameter with the
`APIntParameter` and removes the no longer necessary custom StorageClass
for the `BitVectorAttr` from the SMT dialect that was a workaround for
the described issue.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: d8b0e616b746a6c7bdd0492f2f349105028684b0
https://github.com/llvm/llvm-project/commit/d8b0e616b746a6c7bdd0492f2f349105028684b0
Author: Nathan Gauër <brioche at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
Log Message:
-----------
[SPIR-V] Fix OpVectorShuffle operands on load (#135954)
The generated OpVectorShuffle was wrong, as the indices we pass are not
to select the vector to sample from, but the position in the vector.
Commit: e12681ae733e8341c161534d4d4de2611573b616
https://github.com/llvm/llvm-project/commit/e12681ae733e8341c161534d4d4de2611573b616
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang-cl] Parse the /dynamicdeopt option
which was mentioned in
https://devblogs.microsoft.com/cppblog/cpp-dynamic-debugging-full-debuggability-for-optimized-builds/
(That post also mentions /d2DDTrimInlines, which we already parse via
a /d2 catch-all.)
Commit: adb671ea23af72c0fa1acd42103a5e9ca413d729
https://github.com/llvm/llvm-project/commit/adb671ea23af72c0fa1acd42103a5e9ca413d729
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
Log Message:
-----------
[lldb] Clean up StartDebugserverProcess before I start refactoring it (#135342)
- use early exits where possible
- avoid the listen thread by using Socket APIs which allow separate
"listen" and "accept" steps
- use formatv-like log statements
There "should" be no functional changes from this patch.
Commit: a86f4ee774e6d2eb9f38502ddda65842179a246a
https://github.com/llvm/llvm-project/commit/a86f4ee774e6d2eb9f38502ddda65842179a246a
Author: Yuval Deutscher <yuvald at sweet.security>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/test/API/commands/platform/launchgdbserver/TestPlatformLaunchGDBServer.py
M lldb/tools/lldb-server/SystemInitializerLLGS.h
Log Message:
-----------
[lldb] Use correct path for debugserver (#131609)
This solves an issue that arises when running lldb-server through a
symlink which is not named exactly `lldb-server`. For example, in many
distros lldb-server is packaged as e.g.
`/usr/lib/llvm-19/bin/lldb-server` which is then accessed through a
symlink such as `/usr/bin/lldb-server-19`.
It turns out that there is a cascade of bugs here:
* `GetShlibDir` attempts to locate the LLVM library directory by calling
`GetModuleFileSpecForHostAddress` on the address of the function
`ComputeSharedLibraryDirectory`, assuming that it is inside
`liblldb.so`. However, in every packaging I've seen of lldb-server the
function `ComputeSharedLibraryDirectory` is statically linked into the
`lldb-server` binary and is not in `liblldb.so`.
* When run through a symlink, `GetModuleFileSpecForHostAddress` on an
address that is in `lldb-server` returns the path of the symlink, not
the path of the binary itself. So we get e.g. `/usr/bin/` and not
`/usr/lib/llvm-19/bin/`.
* `GetDebugserverPath` attempts to concat `"lldb-server"` to the
directory we obtained, and thus fails when the symlink is not named
exactly `lldb-server`.
* Ironically, the reason that this works in the first place is precisely
because `GetModuleFileSpecForHostAddress` returns an incorrect path -
when the server is run as `lldb-server-19 ...` it returns
`"lldb-server-19"` which then causes `ComputePathRelativeToLibrary` to
fail and then `ComputeSupportExeDirectory` falls back to just using
`GetProgramFileSpec` instead (which is the only option that actually
yields a correct path).
Commit: 9efd798a278a7ddda3b88365558ceb655c329d11
https://github.com/llvm/llvm-project/commit/9efd798a278a7ddda3b88365558ceb655c329d11
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
Log Message:
-----------
[TTI] Make the rest of TTI::Concept/TTI::Model methods const (NFC) (#136668)
This will simplify future changes.
Commit: 112ffe7c621e8bf145c5c5926e36f3af9e0fd045
https://github.com/llvm/llvm-project/commit/112ffe7c621e8bf145c5c5926e36f3af9e0fd045
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Distro.h
M clang/lib/Driver/Distro.cpp
Log Message:
-----------
Add support of the next Ubuntu (Ubuntu 25.10 - Questing Quokka)
Commit: 97eb416c65863cdf25ec3fa19ed056aac38d1013
https://github.com/llvm/llvm-project/commit/97eb416c65863cdf25ec3fa19ed056aac38d1013
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M flang/lib/Parser/unparse.cpp
A flang/test/Parser/OpenMP/cancel.f90
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[flang][Parser][OpenMP] Fix unparser for cancellation_construct_type (#136001)
Previously the unparser would print like
```
!$OMP CANCEL CANCELLATION_CONSTRUCT_TYPE(SECTIONS)
```
This is not valid Fortran. I have fixed it to print without the clause
name.
Commit: c1940cd0deef84c9cbbf6966d956b8fef4519efa
https://github.com/llvm/llvm-project/commit/c1940cd0deef84c9cbbf6966d956b8fef4519efa
Author: Nathan Gauër <brioche at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
A llvm/test/CodeGen/SPIRV/pointers/store-struct.ll
Log Message:
-----------
[SPIR-V] Add store legalization for ptrcast (#135369)
This commits adds handling for spv.ptrcast result being used in a store
instruction, modifying the store to operate on the source type.
Commit: 8f8853a5743fe204b390f0276cb6d0266e4b9a9b
https://github.com/llvm/llvm-project/commit/8f8853a5743fe204b390f0276cb6d0266e4b9a9b
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcia.ll
Log Message:
-----------
[RISCV] Add ISel patterns for Xqcia instructions (#136548)
This patch adds instruction selection patterns for generating the
integer arithmetic instructions.
Commit: a095ebc58c9f7cd0d39796ed0aabc63b23ed88ce
https://github.com/llvm/llvm-project/commit/a095ebc58c9f7cd0d39796ed0aabc63b23ed88ce
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
Log Message:
-----------
[LLVM][CostModel][AArch64] Remove magic numbers from f16 vector compares. (#135795)
The PR also extends the code to cover bfloat vector compares that are
also promoted to float.
NOTE: There is a bail out for the compares that are scalarised that will
be removed by https://github.com/llvm/llvm-project/pull/135398.
Commit: d7d170656404e1cb29a51689fd66a12bc060c630
https://github.com/llvm/llvm-project/commit/d7d170656404e1cb29a51689fd66a12bc060c630
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/include/lldb/Core/IOHandler.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Interpreter/CommandInterpreter.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/terminal/TestEditline.py
Log Message:
-----------
[lldb] Fix use-color settings not persistent (#135626)
Fixes https://github.com/llvm/llvm-project/issues/22981
If `settings set use-color` is changed when lldb is running it does not take effect.
This is fixes that.
---------
Signed-off-by: Ebuka Ezike <yerimyah1 at gmail.com>
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 1a48e1df4541ccccdaf14a6ea379be004e319a09
https://github.com/llvm/llvm-project/commit/1a48e1df4541ccccdaf14a6ea379be004e319a09
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
Log Message:
-----------
[AMDGPU] Do not fold COPY with implicit operands (#136003)
Folding may remove COPY from inside of the divergent loop.
Commit: ef926e7e49cab2d8087ed4ebdbdc686ac99e1c8f
https://github.com/llvm/llvm-project/commit/ef926e7e49cab2d8087ed4ebdbdc686ac99e1c8f
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][mlir] Port a22ad659cd0665669d89fae174f9e6a83d1a446d
Commit: c60f24dca96dad44afc60df3fcb80997737b6306
https://github.com/llvm/llvm-project/commit/c60f24dca96dad44afc60df3fcb80997737b6306
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][mlir] Fix port of a22ad65
Sorry, typo!
Commit: 7851b1bcf1f0966883d5598268f95d355718f9f5
https://github.com/llvm/llvm-project/commit/7851b1bcf1f0966883d5598268f95d355718f9f5
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
A mlir/test/Integration/GPU/CUDA/concurrent-kernels.mlir
M mlir/test/Target/LLVMIR/gpu.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][gpu] Change GPU modules to globals (#135478)
Load/unload GPU modules in global ctors/dtors instead of each time when
launching a kernel.
Loading GPU modules is a heavy-weight operation and synchronizes the GPU
context. Now that the modules are loaded ahead of time, asynchronously
launched kernels can run concurrently, see
https://discourse.llvm.org/t/how-to-lower-the-combination-of-async-gpu-ops-in-gpu-dialect.
The implementations of `embedBinary()` and `launchKernel()` use slightly
different mechanics at the moment but I prefer to not change the latter
more than necessary as part of this PR. I will prepare a follow-up NFC
for `launchKernel()` to align them again.
Commit: 84cd0d3c38e40e4cb5e416684ecd84df914e19aa
https://github.com/llvm/llvm-project/commit/84cd0d3c38e40e4cb5e416684ecd84df914e19aa
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/test/Shell/Unwind/Inputs/eh-frame-small-fde.s
M lldb/test/Shell/Unwind/eh-frame-small-fde.test
M lldb/unittests/Symbol/UnwindPlanTest.cpp
Log Message:
-----------
[lldb] Slide eh_frame unwind plan if it doesn't begin at function boundary (#135333)
This is mainly useful for discontinuous functions because individual
parts of the function will have separate FDE entries, which can begin
many megabytes from the start of the function. However, I'm separating
it out, because it turns out we already have a test case for the
situation where the FDE does not begin exactly at the function boundary.
The test works mostly by accident because the FDE starts only one byte
after the beginning of the function so it doesn't really matter whether
one looks up the unwind row using the function or fde offset. In this
patch, I beef up the test to catch this problem more reliably.
To make this work I've also needed to change a couple of places which
that an unwind plan always has a row at offset zero.
Commit: 3d91a71223801bb73ab3e4ff8ab3f883639ed79f
https://github.com/llvm/llvm-project/commit/3d91a71223801bb73ab3e4ff8ab3f883639ed79f
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
A clang/test/SemaCXX/cxx20-c99-designator.cpp
M clang/test/SemaCXX/decltype.cpp
Log Message:
-----------
Reorganize -Winitializer-overrides and -Wreorder-init-list (#136586)
These are both now grouped under -Wc99-designator as they both relate to
the C99 feature as it was introduced into C++20.
Fixes #47037
Commit: a25fdd7aca240c5e1a1051ee0509c9c6a4440009
https://github.com/llvm/llvm-project/commit/a25fdd7aca240c5e1a1051ee0509c9c6a4440009
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/ptrmask.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll
A llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (#136678)
Reapply #135326 and fix the target-dependent constant check.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 7f684c9fca76a166efe4e03c6e2bc969e8aed81b
https://github.com/llvm/llvm-project/commit/7f684c9fca76a166efe4e03c6e2bc969e8aed81b
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/test/Dialect/SCF/invalid.mlir
Log Message:
-----------
[mlir] Avoid doublespace in error (NFC). (#136560)
This was resulting in 2 spaces in the error message.
Commit: e428afdfcf56ccadbbcff16e8fe52e51622baed7
https://github.com/llvm/llvm-project/commit/e428afdfcf56ccadbbcff16e8fe52e51622baed7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port c3f815ba82de
Commit: 587206a442ebb656f9d72e7e0cc5845ef3a2f7ed
https://github.com/llvm/llvm-project/commit/587206a442ebb656f9d72e7e0cc5845ef3a2f7ed
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/test/API/commands/platform/launchgdbserver/TestPlatformLaunchGDBServer.py
Log Message:
-----------
[lldb] Avoid modifying the source tree in TestPlatformLaunchGDBServer
The test binary gets uploaded to the "remote" platform's working
directory which, by default is in the source tree. Change that.
Commit: 47903e3372b8ab942f0d36f135edba5a8de07cf9
https://github.com/llvm/llvm-project/commit/47903e3372b8ab942f0d36f135edba5a8de07cf9
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
Log Message:
-----------
[AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (#135339)
Commit: ec3a90509d7db3b32d6102351c86470d9799dc9b
https://github.com/llvm/llvm-project/commit/ec3a90509d7db3b32d6102351c86470d9799dc9b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
Log Message:
-----------
[AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (#135340)
wb/wbinv use storecnt, inv uses loadcnt.
Track them as VMEM_WRITE_ACCESS and VMEM_READ_ACCESS to avoid
InsertWaitCnt incorrectly eliminating the waitcnts after these instructions.
Solves SWDEV-526604
Commit: 2b712693886a2a8339c0452f12f06b676e946d49
https://github.com/llvm/llvm-project/commit/2b712693886a2a8339c0452f12f06b676e946d49
Author: Iris <0.0 at owo.li>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
Log Message:
-----------
[SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (#136565)
Closes #51823.
Commit: 2e145f11c0bcfa2052416d96d682c75f33971a8c
https://github.com/llvm/llvm-project/commit/2e145f11c0bcfa2052416d96d682c75f33971a8c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/docs/gpu/building.rst
Log Message:
-----------
[LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (#136208)
Summary:
For purposes of determining the triple, it's more correct to use
`LLVM_DEFAULT_TARGET_TRIPLE`.
Commit: 974a8ccb2b9f5b930ce47f65122b5a86481e57fe
https://github.com/llvm/llvm-project/commit/974a8ccb2b9f5b930ce47f65122b5a86481e57fe
Author: Muhammad Omair Javaid <omair.javaid at linaro.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/test/API/commands/statistics/basic/TestStats.py
Log Message:
-----------
[LLDB] Silence Windows buildbot failure caused by #136226
This patch temporarily silences a LLDB test failure caused by PR 136226.
The PR added symbol/table count statistics but caused failures in the
lldb-aarch64-windows buildbot where the reported number of symbols and
symbol tables were incorrectly showing as 0.
https://lab.llvm.org/buildbot/#/builders/141/builds/8084
Commit: a5cdbef5f06904fab27219955604a2759e4dd482
https://github.com/llvm/llvm-project/commit/a5cdbef5f06904fab27219955604a2759e4dd482
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/docs/gpu/building.rst
Log Message:
-----------
Revert "[LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (#136208)"
This reverts commit 2e145f11c0bcfa2052416d96d682c75f33971a8c.
Somehow causes some static assertions to fail?
Commit: dba8acde6d6a320dad42cdbfe7c8261938348e23
https://github.com/llvm/llvm-project/commit/dba8acde6d6a320dad42cdbfe7c8261938348e23
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
Revert "[ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)"
This does seem to cause some functionality to change, see comment on
https://github.com/llvm/llvm-project/commit/278c429d11e63bc709ea8c537b23c4e350ce2a07
This reverts commit 278c429d11e63bc709ea8c537b23c4e350ce2a07.
Commit: 616e8cc1fa0319819aa6978af0af9a3e4896103a
https://github.com/llvm/llvm-project/commit/616e8cc1fa0319819aa6978af0af9a3e4896103a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M lldb/test/API/commands/platform/launchgdbserver/TestPlatformLaunchGDBServer.py
M lldb/tools/lldb-server/SystemInitializerLLGS.h
Log Message:
-----------
Revert "[lldb] Use correct path for debugserver (#131609)"
This reverts commit a86f4ee774e6d2eb9f38502ddda65842179a246a and the fixup in
587206a442ebb656f9d72e7e0cc5845ef3a2f7ed because brakage on macos
(TestAutoInstallMainExecutable.py).
Commit: c9eb1ffcfe7cf8c9751afe436a6fcab9cb5b9c9b
https://github.com/llvm/llvm-project/commit/c9eb1ffcfe7cf8c9751afe436a6fcab9cb5b9c9b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/SemaOpenACC/compute-construct-async-clause.c
Log Message:
-----------
[OpenACC][CIR] Implement 'async' lowering. (#136626)
Async acts just like num_workers/vector_length in that it gets a new
variant per device_type and is lowered as an operand.
However, it has one additional complication, in that it can have a
variant that has no argument, which produces an attribute with the
correct devicetype.
Additionally, this syncronizes us with the implementation of flang,
which prohibits multiple 'async' clauses per-device_type.
Commit: cfeaa395970b7a2a2f0389d06a20d0970d591807
https://github.com/llvm/llvm-project/commit/cfeaa395970b7a2a2f0389d06a20d0970d591807
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (#136475)
Update the tests to reflect the change in instruction ordering.
Otherwise there are no changes from the previous commit.
This reverts commit 5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4.
Commit: d20604e5b6792bd010dd4dfd36f3e836ae0fe7b2
https://github.com/llvm/llvm-project/commit/d20604e5b6792bd010dd4dfd36f3e836ae0fe7b2
Author: David Green <david.green at arm.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[CostModel] Plumb CostKind into getExtractWithExtendCost (#135523)
This will likely not affect much with the current uses of the function,
but if we have getExtractWithExtendCost we can plumb CostKind through it
in the same way as other costmodel functions.
Commit: e87aa0c6ab7b9d1abbf86e8df84053cd4de92656
https://github.com/llvm/llvm-project/commit/e87aa0c6ab7b9d1abbf86e8df84053cd4de92656
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Arith/Utils/Utils.h
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-sink-transform.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Sink vector.extract/splat into load/store ops (#134389)
```
vector.load %arg0[%arg1] : memref<?xf32>, vector<4xf32>
vector.extract %0[1] : f32 from vector<4xf32>
```
Gets converted to:
```
%c1 = arith.constant 1 : index
%0 = arith.addi %arg1, %c1 overflow<nsw> : index
%1 = memref.load %arg0[%0] : memref<?xf32>
```
```
%0 = vector.splat %arg2 : vector<1xf32>
vector.store %0, %arg0[%arg1] : memref<?xf32>, vector<1xf32>
```
Gets converted to:
```
memref.store %arg2, %arg0[%arg1] : memref<?xf32>
```
Commit: 278062f119795373c5e43a62280b4b6f2bffbd48
https://github.com/llvm/llvm-project/commit/278062f119795373c5e43a62280b4b6f2bffbd48
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
Log Message:
-----------
[CVP] Add test showing how a call-site range can pessimize opt (NFC)
Commit: d51b2785abf77978d9218a7b6fb5b8ec6c770c31
https://github.com/llvm/llvm-project/commit/d51b2785abf77978d9218a7b6fb5b8ec6c770c31
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
Log Message:
-----------
[IR] Intersect call and fn range in CallBase::getRange()
To make sure that a larger range on the call-site does not suppress
information from a smaller range at the declaration.
Commit: 980531cac0988e509425e64fbd279ee98e25307c
https://github.com/llvm/llvm-project/commit/980531cac0988e509425e64fbd279ee98e25307c
Author: Luke Lau <luke at igalia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (#136684)
These seem to be the wrong way round, e.g. see the definition at
Instruction::mayReadFromMemory().
If an instruction only writes to memory then it's known to not read
memory, and so on.
Only noticed this when using VPWidenIntrinsicRecipe in a local patch and
wondered why it kept on getting DCEd despite the intrinsic writing to
memory.
Commit: c2ae5723b5418fa0f5901f2c21c2c905fa48a498
https://github.com/llvm/llvm-project/commit/c2ae5723b5418fa0f5901f2c21c2c905fa48a498
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Allow reinterpret casts from/to the same pointer type (#136692)
Commit: c5a5f4330a0014b9beafef1c75cc66dba917fa09
https://github.com/llvm/llvm-project/commit/c5a5f4330a0014b9beafef1c75cc66dba917fa09
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
Reapply [ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)
Reapply after d51b2785abf77978d9218a7b6fb5b8ec6c770c31, which should
fix optimization regressions.
After #135642 we have a range attribute on the intrinsic declaration,
so we should not need the special handling here.
Commit: 901ac60db7d864c79aa34d93fc46f2635e3afd50
https://github.com/llvm/llvm-project/commit/901ac60db7d864c79aa34d93fc46f2635e3afd50
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
Log Message:
-----------
[RISCV] Use ri.vzip2{a,b} for interleave2 if available (#136364)
If XRivosVizip is available, the ri.vzip2a and ri.vzip2b instructions
can be used perform a interleave shuffle. This patch only effects the
intrinsic lowering (and thus scalable vectors). Fixed vectors go through
shuffle lowering and the zip2a (but not zip2b) case is already handled
there..
Commit: f010725e392c50700dec0dfe7ef3ff1ecfc517bd
https://github.com/llvm/llvm-project/commit/f010725e392c50700dec0dfe7ef3ff1ecfc517bd
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
Log Message:
-----------
[mlir][linalg] Add folder for `linalg.index` (#136640)
We know that the index of unit dims is always 0.
Commit: 0252d338fa9f4f2f1262b5f7d8158e3f5857fcaf
https://github.com/llvm/llvm-project/commit/0252d338fa9f4f2f1262b5f7d8158e3f5857fcaf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
M llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/icmp-altopcode-after-reordering.ll
M llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
Log Message:
-----------
[SLP]Model single unique value insert + shuffle as splat + select, where profitable
When we have the remaining unique scalar, that should be inserted into
non-poison vector and into non-zero position:
```
%vec1 = insertelement %vec, %v, pos1
%res = shuffle %vec1, poison, <0, 1, 2,..., pos1, pos1 + 1, ..., pos1,
...>
```
better to estimate if it is profitable to model it as is or model it as:
```
%bv = insertelement poison, %v, 0
%splat = shuffle %bv, poison, <poison, ..., 0, ..., 0, ...>
%res = shuffle %vec, %splat, <0, 1, 2,..., pos1 + VF, pos1 + 1, ...>
```
Reviewers: preames, hiraditya, RKSimon
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/136590
Commit: 212f14fbc26e71b26d3345b272b97f22c9df4725
https://github.com/llvm/llvm-project/commit/212f14fbc26e71b26d3345b272b97f22c9df4725
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
Log Message:
-----------
[CIR] Change 'CIR-int' to use a 'APIntParameter' argument (#136713)
After 4bcc414af3782c333 an APInt parameter diagnoses, so this switches
us to APIntParameter.
I don't believe we need to put this in the incubator, as it'll get this
in the same
pulldown as the diagnostic.
Commit: c6071805d4750f7c3fb6cede2169adf02ed67b66
https://github.com/llvm/llvm-project/commit/c6071805d4750f7c3fb6cede2169adf02ed67b66
Author: Iris <0.0 at owo.li>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/docs/GitHub.rst
Log Message:
-----------
[docs] Fix typo in GitHub.rst
Commit: b53db8913b1b0adf2236bca8ee68a6a971f9c708
https://github.com/llvm/llvm-project/commit/b53db8913b1b0adf2236bca8ee68a6a971f9c708
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/Lowering/select.cir
Log Message:
-----------
[CIR] Upstream SelectOp and ShiftOp (#133405)
Since SelectOp will only generated by a future pass that transforms a
TernaryOp this only includes the lowering bits.
This patch also improves the testing of the existing binary operators.
---------
Co-authored-by: Morris Hafner <mhafner at nvidia.com>
Commit: a5a6ae12a4f3e7b22e1273465b64e632b49cdd2e
https://github.com/llvm/llvm-project/commit/a5a6ae12a4f3e7b22e1273465b64e632b49cdd2e
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/docs/ResponseGuide.rst
Log Message:
-----------
[docs][CoC] Update verbiage about appeal process (#136715)
Often, when the CoC investigates incidents, most members are available
to discuss & come to a unanimous decision. In the event of an appeal, we
agreed that the effective way to investigate would be for the committee
to consider evidence that was missed in the initial decision-making.
Update the Response guide to reflect this.
Commit: 9c388f1f05f4f5fd661eb67a32cf3c5843b86c02
https://github.com/llvm/llvm-project/commit/9c388f1f05f4f5fd661eb67a32cf3c5843b86c02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-loads-simple.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
Log Message:
-----------
[SLP]Prefer segmented/deinterleaved loads to strided and fix codegen
Need to estimate, which one is preferable, deinterleaved/segmented
loads or strided. Segmented loads can be combined, improving
the overall performance.
Reviewers: RKSimon, hiraditya
Reviewed By: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/135058
Commit: f6178cdad03468a9801a23f8f7e80927614fdb7e
https://github.com/llvm/llvm-project/commit/f6178cdad03468a9801a23f8f7e80927614fdb7e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (#136653)
Rename one signature of getAtomic to getAtomicLoad and pass LoadExtType.
Previously we had to set the extension type after the node was created,
but we don't usually modify SDNodes once they are created. It's possible
the node already existed and has been CSEd. If that happens, modifying
the node may affect the other users. It's therefore safer to add the
extension type at creation so that it is part of the CSE information.
I don't know of any failures related to the current implementation. I
only noticed that it doesn't match how we usually do things.
Commit: 928c33354ee88b98bcf785d8866171857a92dd82
https://github.com/llvm/llvm-project/commit/928c33354ee88b98bcf785d8866171857a92dd82
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/CodeGen/RISCV/di-assignment-tracking-vector.ll
A llvm/test/Verifier/diassignid-vector-stores.ll
Log Message:
-----------
[DebugInfo] Handle additional types of stores in assignment tracking (#129070)
Fixes #126417.
Currently, assignment tracking recognizes allocas, stores, and mem
intrinsics as valid instructions to tag with DIAssignID, with allocas
representing the allocation for a variable and the others representing
instructions that may assign to the variable. There are other intrinsics
that can perform these assignments however, and if we transform a store
instruction into one of these intrinsics and correctly transfer the
DIAssignID over, this results in a verifier error. The
AssignmentTrackingAnalysis pass also does not know how to handle these
intrinsics if they are untagged, as it does not know how to extract
assignment information (base address, offset, size) from them.
This patch adds _some_ support for some intrinsics that may perform
assignments: masked store/scatter, and vp store/strided store/scatter.
This patch does not add support for extracting assignment information
from these, as they may store with either non-constant size or to
non-contiguous blocks of memory; instead it adds support for recognizing
untagged stores with "unknown" assignment info, for which we assume that
the memory location of the associated variable should not be used, as we
can't determine which fragments of it should or should not be used.
In principle, it should be possible to handle the more complex cases
mentioned above, but it would require more substantial changes to
AssignmentTrackingAnalysis, and it is mostly only needed as a fallback
if the DIAssignID is not preserved on these alternative stores.
Commit: 4dbf67de4050cad3371706b991eb9e3cd9d39482
https://github.com/llvm/llvm-project/commit/4dbf67de4050cad3371706b991eb9e3cd9d39482
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a,b} (#136463)
This is a continuation from 22d5890c and adds the neccessary logic to
handle SEW!=64 profitably. The interesting case is needing to handle
e.g. a single m1 which is split via extract_subvector into two operands,
and form that back into a single m1 operation - instead of letting the
vslidedown by vlenb/Constant sequence be generated. This is analogous to
the getSingleShuffleSrc for vnsrl, and we can share a bunch of code.
Commit: b20e063a90cc9277a3f2dc1f4bac39bce812c7ff
https://github.com/llvm/llvm-project/commit/b20e063a90cc9277a3f2dc1f4bac39bce812c7ff
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/test/Fir/OpenACC/openacc-mappable.fir
Log Message:
-----------
[flang][acc] Generate acc.bounds operation from FIR shape (#136637)
This PR adds support to be able to generate `acc.bounds` operation
through `MappableType`'s `generateAccBounds` when there is no fir.box
entity. This is especially useful because the FIR type does not capture
size information for explicit-shape arrays and current implementation
relied on finding the box entity.
This scenario is possible because during HLFIRtoFIR, `fir.array_coor`
and `fir.box_addr` operations are often optimized to use raw address. If
one tries to map the ssa value that represents such a variable, correct
dimensions need extracted from the shape information held in the fir
declare operation.
Commit: 0eba8cbef6a196d5373de17d8844487daf27656a
https://github.com/llvm/llvm-project/commit/0eba8cbef6a196d5373de17d8844487daf27656a
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-sm6_5.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-sm6_6.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
Log Message:
-----------
[DirectX] Implement Max64UAVs shader flag analysis (#136229)
Fixes [#114553](https://github.com/llvm/llvm-project/issues/114553)
This implementation replicates the behavior of DXC in setting the
`m_b64UAVs` flag: the `Max64UAVs` DXIL module flag is set in the
presence of more than 8 UAVs in a DXIL module.
The behavior of how UAV (resource) arrays are counted differs based on
Shader Model version:
- If Shader Model < 6.6, then a UAV array counts as a single UAV
regardless of its range size
- if Shader Model >= 6.6, then a UAV array contributes its range size to
the total number of UAVs
I initially thought the complete implementation of this analysis may be
blocked by the resource arrays implementation, but it seems that it is
not the case, as the `@llvm.dx.resource.handle*` already includes a
range size argument.
Commit: ab4e181ea8a1b11546328cb71c330772b8720db7
https://github.com/llvm/llvm-project/commit/ab4e181ea8a1b11546328cb71c330772b8720db7
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
Log Message:
-----------
[OpenACC][CIR] Implement 'if' and 'device_num' lowering for
init/shutdown
These are pretty simple, the 'if' implementation is the same as compute
constructs, and the 'device_num' is identical to a bunch of others, in
that it is just emitting an integral value.
Commit: c04958381e90c32381ddabf1552d17c63cdd060b
https://github.com/llvm/llvm-project/commit/c04958381e90c32381ddabf1552d17c63cdd060b
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/docs/InterfaceExportAnnotations.rst
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
[llvm] add LLVM_ABI_FRIEND macro for friend function decls (#136595)
## Purpose
Introduce a new `LLVM_ABI_FRIEND` macro to `llvm/Support/Compiler.h` for
annotating `friend` function declarations for DLL export.
## Overview
1. Add a new `LLVM_ABI_FRIEND` macro, which behaves identically to the
existing `LLVM_ABI` macro on Windows and compiles to nothing on other
platforms.
2. Update existing documentation to describe proper usage of the
`LLVM_ABI_FRIEND` annotation.
## Background
* MSVC issues a warning when it encounters a `friend` function
declaration that does not match the DLL import/export annotation of the
original function.
* When compiling ELF and Mach-O shared libraries, `friend` function
declarations with visibility annotations produce compilation errors
(GCC) and warnings (Clang).
* Additional context on the effort to annotate LLVM's public interface
is in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307).
Commit: f52b01b6cfcfffcd93523c9e1b56a695f626f74b
https://github.com/llvm/llvm-project/commit/f52b01b6cfcfffcd93523c9e1b56a695f626f74b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Rename functions/variables, limit visibility to meet the coding standards, NFC
Commit: c05da6e8611e4da7b16729cc2b8d2dc6c77ba4be
https://github.com/llvm/llvm-project/commit/c05da6e8611e4da7b16729cc2b8d2dc6c77ba4be
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/set.c
Log Message:
-----------
[OpenACC][CIR] Implement lowering for 'set' clauses
The 'set' clauses are default_async, device_num, and if. The latter two
are implemented identically to other constructs by that name.
default_async works exactly like device_num, (and others) that take an
int-expression.
Commit: 5e101de13671a525d30ed7f546c1a8611db1da19
https://github.com/llvm/llvm-project/commit/5e101de13671a525d30ed7f546c1a8611db1da19
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/lib/IR/BuiltinAttributes.cpp
Log Message:
-----------
[mlir][nfc] Replace some `std::vector`s with `SmallVector` (#136703)
`SmallVector` is preferable to `std::vector`
https://llvm.org/docs/ProgrammersManual.html#llvm-adt-smallvector-h
Commit: c073c228654e907a619edc03ff87158da772704c
https://github.com/llvm/llvm-project/commit/c073c228654e907a619edc03ff87158da772704c
Author: Steven Perron <stevenperron at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
M clang/test/SemaTemplate/address_space-dependent.cpp
Log Message:
-----------
[HLSL] Use hlsl_device address space for getpointer. (#127675)
We add the hlsl_device address space to represent the device memory
space as defined in section 1.7.1.3 of the [HLSL
spec](https://microsoft.github.io/hlsl-specs/specs/hlsl.pdf).
Fixes https://github.com/llvm/llvm-project/issues/127075
Commit: 68bfb17f1dd15f3b0b2754c8bce1d1c395e553c1
https://github.com/llvm/llvm-project/commit/68bfb17f1dd15f3b0b2754c8bce1d1c395e553c1
Author: Bob Wilson <bob.wilson at apple.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M clang/lib/Frontend/HeaderIncludeGen.cpp
A clang/test/Preprocessor/print-header-crash.modulemap
Log Message:
-----------
[Clang] Fix crash when building a module with CC_PRINT_HEADERS_FORMAT=json (#136227)
There is no main file when building a module, so the code in
HeaderIncludesJSONCallback::EndOfMainFile() needs to check for that to
avoid crashing.
Commit: 55678dcbd5e4a4e096a2c856ac2f5dbfa57acc00
https://github.com/llvm/llvm-project/commit/55678dcbd5e4a4e096a2c856ac2f5dbfa57acc00
Author: Davide Italiano <davidino at meta.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Remove myself from CODEOWNERS.
Commit: 1c722fc8f5671ab1bbb7965b3b5fbba0645884b0
https://github.com/llvm/llvm-project/commit/1c722fc8f5671ab1bbb7965b3b5fbba0645884b0
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)
We had some code which tried to estimate legalization costs for
illegally typed shuffles, but it only handled the case of a widening
shuffle, and used a somewhat adhoc heuristic. We can reuse the
processShuffleMask utility (which we already use for individual vector
register splitting when exact VLEN is known) to perform the same
splitting given the legal vector type as the unit of split instead. This
makes the costing both simpler and more robust.
Note that this swings costs for illegal shuffles pretty wildly as we
were previously sometimes hitting the adhoc code, and sometimes falling
through into generic scalarization costing. I don't know that any of the
costs for the individual tests in tree are significant, but the test
which which triggered me finding this was reported to me by Alexey
reduced from something triggering a bad choice in SLP for x264. So this
has the potential to be somewhat high impact.
Commit: 7c4cb0e8368583bdd48a59b5dd0e9d881cffa3a6
https://github.com/llvm/llvm-project/commit/7c4cb0e8368583bdd48a59b5dd0e9d881cffa3a6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
Fix build error introduced by 1c722fc
The change built before merge, but apparently a constness change landed
since I posted this for review.
Commit: 710ffb69bfdc9281eaaad267ad85ca60ddbb94f0
https://github.com/llvm/llvm-project/commit/710ffb69bfdc9281eaaad267ad85ca60ddbb94f0
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/fake_heap.s
M libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/test/src/__support/CMakeLists.txt
R libc/test/src/__support/fake_heap.s
M libc/test/src/__support/freelist_heap_test.cpp
Log Message:
-----------
[libc] Fix warnings for freelist_heap_test/fuzz (#136634)
Fixes #122367
Commit: 5ebf08cd9a1d4b2697a0d3ad588ddbdc553362dc
https://github.com/llvm/llvm-project/commit/5ebf08cd9a1d4b2697a0d3ad588ddbdc553362dc
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
[DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (#136622)
fixes #136620
It was determined that the lifetime intrinsics generated by clang are
likely more correct than the ones in DXC hence explaining the missing
lifetimes between the IR diffs.
As such we are legalizing lllvm lifetime intrinsics by letting them all
pass on through.
Commit: fcb309715e4bd46d96dda7bdf99291ebf394d130
https://github.com/llvm/llvm-project/commit/fcb309715e4bd46d96dda7bdf99291ebf394d130
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
Log Message:
-----------
[LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)
Fix test to allow any opcode values for the OPC_Decode checks, since the
specific opcode value can be different for downstream configurations.
Commit: 800d949bb315349a116a980e99d0f36645ffefd3
https://github.com/llvm/llvm-project/commit/800d949bb315349a116a980e99d0f36645ffefd3
Author: Callum Fare <callum at codeplay.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M offload/liboffload/API/APIDefs.td
M offload/liboffload/API/Common.td
M offload/liboffload/API/Device.td
A offload/liboffload/API/Event.td
A offload/liboffload/API/Kernel.td
A offload/liboffload/API/Memory.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/API/Platform.td
A offload/liboffload/API/Program.td
A offload/liboffload/API/Queue.td
M offload/liboffload/API/README.md
M offload/liboffload/include/OffloadImpl.hpp
M offload/liboffload/include/generated/OffloadAPI.h
M offload/liboffload/include/generated/OffloadEntryPoints.inc
M offload/liboffload/include/generated/OffloadFuncs.inc
M offload/liboffload/include/generated/OffloadImplFuncDecls.inc
M offload/liboffload/include/generated/OffloadPrint.hpp
M offload/liboffload/src/OffloadImpl.cpp
M offload/liboffload/src/OffloadLib.cpp
M offload/test/tools/offload-tblgen/entry_points.td
M offload/test/tools/offload-tblgen/functions_ranged_param.td
M offload/test/tools/offload-tblgen/print_enum.td
M offload/test/tools/offload-tblgen/print_function.td
M offload/test/tools/offload-tblgen/type_tagged_enum.td
M offload/tools/offload-tblgen/APIGen.cpp
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/tools/offload-tblgen/PrintGen.cpp
M offload/tools/offload-tblgen/RecordTypes.hpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
R offload/unittests/OffloadAPI/device/olGetDevice.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/device/olIterateDevices.cpp
A offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/bar.c
A offload/unittests/OffloadAPI/device_code/foo.c
A offload/unittests/OffloadAPI/kernel/olGetKernel.cpp
A offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
A offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
A offload/unittests/OffloadAPI/memory/olMemFree.cpp
A offload/unittests/OffloadAPI/memory/olMemcpy.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
M offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
M offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
M offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
A offload/unittests/OffloadAPI/program/olCreateProgram.cpp
A offload/unittests/OffloadAPI/program/olDestroyProgram.cpp
A offload/unittests/OffloadAPI/queue/olCreateQueue.cpp
A offload/unittests/OffloadAPI/queue/olDestroyQueue.cpp
A offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
Log Message:
-----------
[Offload] Implement the remaining initial Offload API (#122106)
Implement the complete initial version of the Offload API, to the extent
that is usable for simple offloading programs. Tested with a basic SYCL
program.
As far as possible, these are simple wrappers over existing
functionality in the plugins.
* Allocating and freeing memory (host, device, shared).
* Creating a program
* Creating a queue (wrapper over asynchronous stream resource)
* Enqueuing memcpy operations
* Enqueuing kernel executions
* Waiting on (optional) output events from the enqueue operations
* Waiting on a queue to finish
Objects created with the API have reference counting semantics to handle
their lifetime. They are created with an initial reference count of 1,
which can be incremented and decremented with retain and release
functions. They are freed when their reference count reaches 0. Platform
and device objects are not reference counted, as they are expected to
persist as long as the library is in use, and it's not meaningful for
users to create or destroy them.
Tests have been added to `offload.unittests`, including device code for
testing program and kernel related functionality.
The API should still be considered unstable and it's very likely we will
need to change the existing entry points.
Commit: b5eae19f64d5a53cd85ece433f448be1fd4c8539
https://github.com/llvm/llvm-project/commit/b5eae19f64d5a53cd85ece433f448be1fd4c8539
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/atomic-hint-clause.f90
M flang/test/Semantics/OpenMP/critical-hint-clause.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Introduce OmpHintClause, simplify OmpAtomicClause (#136311)
The OmpAtomicClause is a variant of a few specific clauses that are used
on the ATOMIC construct. The HINT clause, however, was represented as a
generic OmpClause, which somewhat complicated the analysis of an
OmpAtomicClause.
Introduce OmpHintClause to represent the contents of the HINT clause,
and use it on OmpAtomicClause similarly to how OmpFailClause is used.
Commit: 87f93266502c63a8c516a92a19cb97a78e56e9c2
https://github.com/llvm/llvm-project/commit/87f93266502c63a8c516a92a19cb97a78e56e9c2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-04-22 (Tue, 22 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M bolt/lib/Core/BinaryBasicBlock.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/test/AArch64/lite-mode.s
A bolt/test/X86/high-segments.s
A bolt/test/X86/nobits-symbol.s
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-include-fixer/IncludeFixerContext.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/abseil/CleanupCtadCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SignalHandlerCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/StringviewNullptrCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableTable/BuildConfusableTable.cpp
M clang-tools-extra/clang-tidy/modernize/MacroToEnumCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdNumbersCheck.cpp
M clang-tools-extra/clang-tidy/objc/AssertEquals.cpp
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/portability/StdAllocatorConstCheck.cpp
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExprSequence.cpp
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/SourceCode.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/index/Relation.cpp
M clang-tools-extra/clangd/index/dex/Trigram.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/refactor/tweaks/RemoveUsingNamespace.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang-tools-extra/test/clang-doc/basic-project.test
M clang-tools-extra/test/clang-tidy/checkers/abseil/string-find-startswith.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/misplaced-operator-in-strlen-in-alloc.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/reserved-identifier-c.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/reserved-identifier.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/explicit-constructor.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/llvm/qualified-auto.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.c
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-alias-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/make-unique-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/raw-string-literal-delimiter.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/raw-string-literal-replace-shorter.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/shrink-to-fit.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/unary-static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-bool-literals-ignore-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-override-cxx98.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-transparent-functors.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-using.cpp
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ClangOffloadPackager.rst
M clang/docs/CommandGuide/clang.rst
M clang/docs/LibASTImporter.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecordLayout.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/BuiltinsARM.def
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FPOptions.def
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/OpenMPKinds.h
A clang/include/clang/CIR/ABIArgInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
A clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Distro.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/FlowSensitive/CNFFormula.cpp
M clang/lib/Analysis/IntervalPartition.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
A clang/lib/CIR/CodeGen/ABIInfo.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/CodeGen/TargetInfo.cpp
A clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/SortJavaScriptImports.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/HeaderIncludeGen.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Index/IndexBody.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaBoundsSafety.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
A clang/lib/Sema/SemaOpenACCClauseAppertainment.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/builtin-object-size.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/ast-dump-recovery.cpp
M clang/test/AST/ast-print-openacc-set-construct.cpp
M clang/test/AST/new-unknown-type.cpp
A clang/test/Analysis/PR135665.cpp
M clang/test/Analysis/builtin_overflow.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/struct.c
A clang/test/CIR/CodeGen/typedef.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/IR/call.cir
A clang/test/CIR/IR/invalid-call.cir
A clang/test/CIR/Lowering/select.cir
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/CodeGen/AArch64/args.cpp
M clang/test/CodeGen/aapcs64-align.cpp
A clang/test/CodeGen/arm-former-microsoft-intrinsics-header-warning.c
A clang/test/CodeGen/arm-former-microsoft-intrinsics.c
M clang/test/CodeGen/arm-microsoft-intrinsics.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
A clang/test/CodeGen/arm64-former-microsoft-intrinsics-header-warning.c
A clang/test/CodeGen/arm64-former-microsoft-intrinsics.c
M clang/test/CodeGen/arm64-microsoft-intrinsics.c
M clang/test/CodeGen/builtins-arm-microsoft.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/memtag-globals-asm.cpp
M clang/test/CodeGen/memtag-globals.cpp
M clang/test/CodeGen/p0963r3.cpp
M clang/test/CodeGenCXX/mangle-template.cpp
A clang/test/CodeGenDirectX/unsupported_intrinsic.hlsl
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-r600.cl
A clang/test/Driver/Xclangas.s
M clang/test/Driver/cl-options.c
M clang/test/Driver/clang-sycl-linker-test.cpp
M clang/test/Driver/clang-translation.c
M clang/test/Driver/extend-variable-liveness.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/sanitizer-ld.c
M clang/test/Format/lit.local.cfg
M clang/test/Headers/Inputs/include/stdint.h
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/ms-intrin.cpp
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M clang/test/Misc/warning-flags.c
A clang/test/Modules/non-modular-decl-use.c
M clang/test/OpenMP/for_order_messages.cpp
M clang/test/Parser/cxx-concepts-requires-clause.cpp
A clang/test/Parser/extern-template-attributes.cpp
M clang/test/Parser/recovery.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/Preprocessor/print-header-crash.modulemap
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/attr-counted-by-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-counted-by-or-null-last-field.c
M clang/test/Sema/attr-counted-by-or-null-late-parsed-struct-ptrs.c
A clang/test/Sema/attr-counted-by-or-null-struct-ptrs-completable-incomplete-pointee.c
M clang/test/Sema/attr-counted-by-or-null-struct-ptrs.c
A clang/test/Sema/attr-counted-by-struct-ptrs-completable-incomplete-pointee.c
M clang/test/Sema/attr-counted-by-struct-ptrs.c
M clang/test/Sema/attr-counted-by-vla.c
M clang/test/Sema/ptrauth-qualifier.c
M clang/test/Sema/ptrauth.c
M clang/test/SemaCUDA/function-overload.cu
A clang/test/SemaCXX/bitfield-preferred-type-sizing.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
A clang/test/SemaCXX/cxx20-c99-designator.cpp
M clang/test/SemaCXX/decltype.cpp
M clang/test/SemaCXX/implicit-member-functions.cpp
A clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
A clang/test/SemaCXX/uninitialized-no-ctor.cpp
M clang/test/SemaCXX/windows-Wpadded-bitfield.cpp
M clang/test/SemaObjC/ptrauth-qualifier.m
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/combined-construct-if-clause.c
M clang/test/SemaOpenACC/combined-construct-num_gangs-clause.c
M clang/test/SemaOpenACC/combined-construct-num_workers-clause.c
M clang/test/SemaOpenACC/combined-construct-tile-clause.cpp
M clang/test/SemaOpenACC/combined-construct-vector_length-clause.c
M clang/test/SemaOpenACC/compute-construct-async-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.c
M clang/test/SemaOpenACC/compute-construct-num_workers-clause.c
M clang/test/SemaOpenACC/compute-construct-vector_length-clause.c
M clang/test/SemaOpenACC/data-construct-copy-clause.c
M clang/test/SemaOpenACC/data-construct-copyin-clause.c
M clang/test/SemaOpenACC/data-construct-copyout-clause.c
M clang/test/SemaOpenACC/data-construct-create-clause.c
M clang/test/SemaOpenACC/data-construct-default-clause.c
M clang/test/SemaOpenACC/data-construct-delete-clause.c
M clang/test/SemaOpenACC/data-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct-no_create-clause.c
M clang/test/SemaOpenACC/data-construct-use_device-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
M clang/test/SemaOpenACC/init-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/loop-construct-tile-clause.cpp
M clang/test/SemaOpenACC/no-empty-pqr-list.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/test/SemaOpenACC/set-construct.cpp
M clang/test/SemaOpenACC/shutdown-construct.cpp
M clang/test/SemaOpenACC/update-construct.cpp
A clang/test/SemaSYCL/Inputs/vectorcall.hpp
A clang/test/SemaSYCL/sycl-cconv-win.cpp
M clang/test/SemaTemplate/address_space-dependent.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/clang-format/clang-format-diff.py
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-installapi/Options.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/unittests/AST/AttrTest.cpp
M clang/unittests/Format/CMakeLists.txt
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/MacroCallReconstructorTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/ExceptionTests/InterpreterExceptionTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M compiler-rt/lib/builtins/int_lib.h
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/allocator_config.def
M compiler-rt/lib/scudo/standalone/combined.h
R compiler-rt/lib/scudo/standalone/local_cache.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
A compiler-rt/lib/scudo/standalone/size_class_allocator.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M compiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
M compiler-rt/lib/scudo/standalone/tsd.h
M compiler-rt/lib/scudo/standalone/tsd_shared.h
M compiler-rt/lib/scudo/standalone/type_traits.h
M compiler-rt/test/profile/AIX/pgo-lto-bcdtor-function-section.test
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/type-info.h
M flang-rt/lib/cuda/kernel.cpp
M flang-rt/lib/runtime/derived-api.cpp
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/edit-output.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang/docs/ModFiles.md
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/token-sequence.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/runtime-type-info.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
M flang/test/Driver/emit-mlir.f90
A flang/test/Driver/m32-option.f90
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-stream.mlir
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/comdat.fir
M flang/test/Fir/target-rewrite-complex.fir
R flang/test/HLFIR/all-elemental.fir
R flang/test/HLFIR/any-elemental.fir
R flang/test/HLFIR/count-elemental.fir
R flang/test/HLFIR/maxloc-elemental.fir
R flang/test/HLFIR/maxval-elemental.fir
R flang/test/HLFIR/minloc-elemental.fir
R flang/test/HLFIR/minval-elemental.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-maxval.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
A flang/test/HLFIR/simplify-hlfir-intrinsics-minval.fir
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
M flang/test/Lower/HLFIR/calls-f77.f90
A flang/test/Lower/HLFIR/dummy-scope.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/Intrinsics/getpid.f90
M flang/test/Lower/Intrinsics/time.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-declare-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/main_location.f90
M flang/test/Lower/parent-component.f90
A flang/test/Parser/OpenMP/cancel.f90
M flang/test/Parser/continuation-in-conditional-compilation.f
M flang/test/Parser/unmatched-parens.f90
A flang/test/Preprocessing/exponent-bug.F90
M flang/test/Preprocessing/implicit-contin3.F90
M flang/test/Semantics/OpenACC/acc-kernels.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Semantics/OpenACC/acc-serial.f90
A flang/test/Semantics/OpenACC/bug135810-1.f90
A flang/test/Semantics/OpenACC/bug135810-2.f90
A flang/test/Semantics/cuf19.cuf
M flang/test/Semantics/resolve11.f90
M flang/test/Semantics/typeinfo01.f90
M flang/test/Transforms/simplifyintrinsics.fir
A flang/test/Transforms/tbaa-with-dummy-scope2.fir
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/fake_heap.s
M libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/test/src/__support/CMakeLists.txt
R libc/test/src/__support/fake_heap.s
M libc/test/src/__support/freelist_heap_test.cpp
M libcxx/docs/Contributing.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/for_each.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__bit/countl.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__hash_table
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__utility/pair.h
M libcxx/include/algorithm
M libcxx/include/array
M libcxx/include/bitset
M libcxx/include/codecvt
M libcxx/include/condition_variable
M libcxx/include/ios
M libcxx/include/locale
R libcxx/include/module.modulemap
A libcxx/include/module.modulemap.in
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/system_error
M libcxx/include/vector
A libcxx/test/libcxx/Wnon_modular_include_in_module.compile.pass.cpp
M libcxx/test/libcxx/algorithms/robust_against_copying_comparators.pass.cpp
M libcxx/test/libcxx/headers_in_modulemap.sh.py
M libcxx/test/libcxx/lint/lint_headers.sh.py
A libcxx/test/std/utilities/utility/pairs/pairs.pair/explicit_deduction_guides.pass.cpp
M libcxx/utils/libcxx/header_information.py
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/src/demangle/Utility.h
M lld/COFF/MapFile.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/BPSectionOrderer.cpp
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/SyntheticSections.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/MapFile.cpp
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/BPSectionOrdererBase.inc
A lld/test/ELF/aarch64-got-merging-icf.s
M lld/test/ELF/icf-preemptible.s
A lld/test/ELF/lto/aarch64-pac-got-func.ll
A lld/test/wasm/lto/thinlto-signature-mismatch-unknown.ll
M lld/wasm/LTO.cpp
M lldb/docs/resources/build.rst
M lldb/include/lldb/Core/IOHandler.h
M lldb/include/lldb/Host/Config.h.cmake
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Interpreter/CommandInterpreter.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/ThreadPlanStepOut.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/Core/DataFileCache.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py
M lldb/test/API/commands/statistics/basic/TestStats.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/terminal/TestEditline.py
M lldb/test/Shell/Unwind/Inputs/eh-frame-small-fde.s
M lldb/test/Shell/Unwind/eh-frame-small-fde.test
M lldb/test/requirements.txt
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
M lldb/unittests/Core/TelemetryTest.cpp
M lldb/unittests/Symbol/UnwindPlanTest.cpp
M llvm/CMakeLists.txt
M llvm/docs/CodeOfConduct.rst
M llvm/docs/GitHub.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InterfaceExportAnnotations.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/ResponseGuide.rst
M llvm/docs/SandboxIR.md
M llvm/docs/Vectorizers.rst
M llvm/include/llvm/ADT/ArrayRef.h
M llvm/include/llvm/ADT/Hashing.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
M llvm/include/llvm/Analysis/LazyBlockFrequencyInfo.h
M llvm/include/llvm/Analysis/MemoryLocation.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/PBQP/Math.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/UnreachableBlockElim.h
A llvm/include/llvm/Config/Targets.h.cmake
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVOptions.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/Utility.h
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenACC/ACC.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCFixupKindInfo.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/SandboxIR/Constant.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/include/llvm/Support/Caching.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/InterleavedRange.h
M llvm/include/llvm/Support/UnicodeCharRanges.h
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CallGraph.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/DomPrinter.cpp
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/GlobalsModRef.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/IVUsers.cpp
M llvm/lib/Analysis/LazyBlockFrequencyInfo.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/LoopPass.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
M llvm/lib/Analysis/PhiValues.cpp
M llvm/lib/Analysis/PostDominators.cpp
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
M llvm/lib/Analysis/RegionInfo.cpp
M llvm/lib/Analysis/RegionPrinter.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterBankInfo.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/Orc/IRPartitionLayer.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContextImpl.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Support/Caching.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Support/SuffixTree.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16HardFloat.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/VE/VETargetTransformInfo.h
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrBuilder.h
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
R llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
R llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-insert-icp-mdprof.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
A llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/ptrmask.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
A llvm/test/CodeGen/AMDGPU/si-instr-info-vopc-exec.mir
M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll
A llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-sm6_5.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-sm6_6.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
A llvm/test/CodeGen/DirectX/legalize-freeze.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
M llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi11.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
M llvm/test/CodeGen/Hexagon/unreachable-mbb-phi-subreg.mir
A llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
A llvm/test/CodeGen/LoongArch/lsx/broadcast-load.ll
M llvm/test/CodeGen/NVPTX/and-or-setcc.ll
M llvm/test/CodeGen/NVPTX/bug21465.ll
A llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
A llvm/test/CodeGen/NVPTX/fp128-storage-type.ll
M llvm/test/CodeGen/NVPTX/global-variable-big.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
A llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/PowerPC/dmf-outer-product.ll
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/CodeGen/RISCV/di-assignment-tracking-vector.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/pr135206.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/pr125306.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
A llvm/test/CodeGen/RISCV/xqcia.ll
M llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll
A llvm/test/CodeGen/SPARC/bitcast.ll
A llvm/test/CodeGen/SPARC/ctlz.ll
A llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupIndex.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smoothstep.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-struct.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
A llvm/test/CodeGen/SPIRV/pointers/store-struct.ll
M llvm/test/CodeGen/X86/GlobalISel/GV.ll
M llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
M llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir
M llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir
M llvm/test/CodeGen/X86/GlobalISel/select-memop-v128.mir
M llvm/test/CodeGen/X86/GlobalISel/select-memop-v256.mir
M llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
M llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
M llvm/test/CodeGen/X86/and-or-setcc.ll
M llvm/test/CodeGen/X86/apx/cf.ll
M llvm/test/CodeGen/X86/apx/nf-regressions.ll
M llvm/test/CodeGen/X86/combine-fcopysign.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/isel-and.ll
M llvm/test/CodeGen/X86/isel-buildvector-sse.ll
M llvm/test/CodeGen/X86/isel-buildvector-sse2.ll
M llvm/test/CodeGen/X86/isel-icmp.ll
M llvm/test/CodeGen/X86/isel-or.ll
M llvm/test/CodeGen/X86/isel-phi.ll
M llvm/test/CodeGen/X86/isel-sdiv.ll
M llvm/test/CodeGen/X86/isel-select-cmov.ll
M llvm/test/CodeGen/X86/isel-srem.ll
M llvm/test/CodeGen/X86/isel-traps.ll
M llvm/test/CodeGen/X86/isel-udiv.ll
M llvm/test/CodeGen/X86/isel-urem.ll
M llvm/test/CodeGen/X86/isel-x87.ll
M llvm/test/CodeGen/X86/isel-xor.ll
M llvm/test/CodeGen/Xtensa/callw.ll
M llvm/test/CodeGen/Xtensa/div.ll
M llvm/test/CodeGen/Xtensa/mul.ll
A llvm/test/CodeGen/Xtensa/rem.ll
A llvm/test/DebugInfo/AArch64/merge-nested-block-loc.ll
A llvm/test/DebugInfo/AArch64/merge-nested-block-loc2.ll
M llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-vl-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/MC/AArch64/tls-relocs.s
M llvm/test/MC/AVR/inst-adiw.s
M llvm/test/MC/AVR/inst-andi.s
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-call.s
M llvm/test/MC/AVR/inst-cbi.s
M llvm/test/MC/AVR/inst-cpi.s
M llvm/test/MC/AVR/inst-in.s
M llvm/test/MC/AVR/inst-jmp.s
M llvm/test/MC/AVR/inst-ldd.s
M llvm/test/MC/AVR/inst-ldi.s
M llvm/test/MC/AVR/inst-lds-tiny.s
M llvm/test/MC/AVR/inst-lds.s
M llvm/test/MC/AVR/inst-ori.s
M llvm/test/MC/AVR/inst-out.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/AVR/inst-sbci.s
M llvm/test/MC/AVR/inst-sbi.s
M llvm/test/MC/AVR/inst-sbic.s
M llvm/test/MC/AVR/inst-sbis.s
M llvm/test/MC/AVR/inst-sbiw.s
M llvm/test/MC/AVR/inst-sbr.s
M llvm/test/MC/AVR/inst-std.s
M llvm/test/MC/AVR/inst-sts-tiny.s
M llvm/test/MC/AVR/inst-sts.s
M llvm/test/MC/AVR/inst-subi.s
M llvm/test/MC/AVR/modifiers.s
M llvm/test/MC/CSKY/basic-16bit.s
M llvm/test/MC/CSKY/basic.s
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/LoongArch/Relocations/relax-tls-le.s
M llvm/test/MC/LoongArch/Relocations/relocations.s
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/compressed-relocations.s
M llvm/test/MC/RISCV/corev/XCVmem-invalid.s
M llvm/test/MC/RISCV/fixups-binary-expression.s
M llvm/test/MC/RISCV/fixups-compressed.s
M llvm/test/MC/RISCV/fixups.s
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/linker-relaxation.s
M llvm/test/MC/RISCV/machine-csr-names.s
M llvm/test/MC/RISCV/option-exact.s
M llvm/test/MC/RISCV/pseudo-jump.s
M llvm/test/MC/RISCV/relocations.s
M llvm/test/MC/RISCV/rv32-machine-csr-names.s
M llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
M llvm/test/MC/RISCV/tail-call.s
M llvm/test/MC/RISCV/xqcibi-relocations.s
M llvm/test/MC/RISCV/xqcilb-relocations.s
M llvm/test/MC/RISCV/xqcili-relocations.s
M llvm/test/MC/Sparc/sparc-assembly-exprs.s
M llvm/test/MC/Sparc/sparc-ctrl-instructions.s
M llvm/test/MC/Sparc/sparc-little-endian.s
M llvm/test/MC/Sparc/sparc-relocations.s
M llvm/test/MC/Sparc/sparc-synthetic-instructions.s
M llvm/test/MC/Sparc/sparc-tls-relocations.s
M llvm/test/MC/Sparc/sparc64-ctrl-instructions.s
M llvm/test/MC/Sparc/sparcv9-synthetic-instructions.s
A llvm/test/MC/Xtensa/div.s
A llvm/test/MC/Xtensa/mul.s
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
R llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
A llvm/test/Transforms/GVN/pre-invalid-prof-metadata.ll
M llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
M llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
A llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
M llvm/test/Transforms/IndVarSimplify/exit-count-select.ll
M llvm/test/Transforms/IndVarSimplify/exit_value_test3.ll
M llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll
M llvm/test/Transforms/IndVarSimplify/pr116483.ll
M llvm/test/Transforms/IndVarSimplify/pr63763.ll
M llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/icmp-dom.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable.ll
M llvm/test/Transforms/LowerTypeTests/cfi-direct-call1.ll
M llvm/test/Transforms/LowerTypeTests/function-arm-thumb.ll
M llvm/test/Transforms/LowerTypeTests/function-thumb-bti.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable.ll
A llvm/test/Transforms/MemProfContextDisambiguation/mergenodes.ll
A llvm/test/Transforms/MemProfContextDisambiguation/mergenodes2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/overlapping-contexts.ll
M llvm/test/Transforms/MergeFunc/cfi-thunk-merging.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-loads-simple.ll
A llvm/test/Transforms/SLPVectorizer/X86/catchswitch-block-in-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
M llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/icmp-altopcode-after-reordering.ll
M llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
M llvm/test/Transforms/StructurizeCFG/simple-structurizecfg-crash.ll
M llvm/test/Transforms/Util/flatten-cfg.ll
A llvm/test/Verifier/diassignid-vector-stores.ll
A llvm/test/Verifier/invalid-label-param.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
M llvm/test/tools/llvm-reduce/thinlto-preserve-uselistorder.ll
M llvm/tools/gold/gold-plugin.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-gpu-loader/nvptx.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/lto/CMakeLists.txt
M llvm/tools/yaml2obj/CMakeLists.txt
M llvm/unittests/ADT/HashingTest.cpp
M llvm/unittests/Analysis/AliasAnalysisTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/LazyCallGraphTest.cpp
M llvm/unittests/Demangle/ItaniumDemangleTest.cpp
M llvm/unittests/Demangle/OutputBufferTest.cpp
M llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/FunctionTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/ValueHandleTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/Caching.cpp
M llvm/unittests/Support/InterleavedRangeTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/IntervalTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanSlpTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/scudo/standalone/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M mlir/include/mlir-c/Dialect/Linalg.h
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
R mlir/include/mlir/Conversion/MemRefToLLVM/AllocLikeConversion.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/Arith/Utils/Utils.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/FunctionCallUtils.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/Polynomial/IR/Polynomial.h
M mlir/include/mlir/Dialect/SMT/IR/SMTAttributes.td
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinAttributes.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/TypeRange.h
M mlir/include/mlir/TableGen/AttrOrTypeDef.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Liveness.cpp
M mlir/lib/Bindings/Python/DialectLinalg.cpp
M mlir/lib/CAPI/Dialect/Linalg.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/PrintCallHelper.cpp
R mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
M mlir/lib/Conversion/MemRefToLLVM/CMakeLists.txt
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Debug/Observers/ActionLogging.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/LLVMIR/IR/FunctionCallUtils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/Syntax.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Quant/IR/TypeDetail.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SMT/IR/SMTAttributes.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVAttributes.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/Linking/ModuleCombiner/ModuleCombiner.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Traits.cpp
M mlir/lib/Dialect/Transform/DebugExtension/DebugExtensionOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Transform/Interfaces/MatchInterfaces.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/ExtensibleDialect.cpp
M mlir/lib/IR/PDL/PDLPatternMatch.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/TableGen/AttrOrTypeDef.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
A mlir/test/Conversion/AMDGPUToROCDL/swizzle.mlir
R mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-unsupported.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/EmitC/transforms.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/LLVMIR/blockaddress-canonicalize.mlir
A mlir/test/Dialect/LLVMIR/indirectbr.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/subtensor-of-padtensor.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/SCF/invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-sink-transform.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
A mlir/test/Integration/GPU/CUDA/concurrent-kernels.mlir
M mlir/test/Target/Cpp/expressions.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/indirectbr.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/gpu.mlir
A mlir/test/Target/LLVMIR/indirectbr.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
A mlir/test/mlir-tblgen/apint-param-error.td
M mlir/test/mlir-translate/import-diagnostics.ll
M mlir/test/python/dialects/linalg/utils.py
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/unittests/IR/OpPropertiesTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/src/Kernel.cpp
M offload/DeviceRTL/src/Mapping.cpp
R offload/DeviceRTL/src/exports
M offload/include/Shared/Environment.h
M offload/liboffload/API/APIDefs.td
M offload/liboffload/API/Common.td
M offload/liboffload/API/Device.td
A offload/liboffload/API/Event.td
A offload/liboffload/API/Kernel.td
A offload/liboffload/API/Memory.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/API/Platform.td
A offload/liboffload/API/Program.td
A offload/liboffload/API/Queue.td
M offload/liboffload/API/README.md
M offload/liboffload/include/OffloadImpl.hpp
M offload/liboffload/include/generated/OffloadAPI.h
M offload/liboffload/include/generated/OffloadEntryPoints.inc
M offload/liboffload/include/generated/OffloadFuncs.inc
M offload/liboffload/include/generated/OffloadImplFuncDecls.inc
M offload/liboffload/include/generated/OffloadPrint.hpp
M offload/liboffload/src/OffloadImpl.cpp
M offload/liboffload/src/OffloadLib.cpp
M offload/test/jit/empty_kernel.inc
M offload/test/jit/empty_kernel_lvl2.c
M offload/test/lit.cfg
M offload/test/tools/offload-tblgen/entry_points.td
M offload/test/tools/offload-tblgen/functions_ranged_param.td
M offload/test/tools/offload-tblgen/print_enum.td
M offload/test/tools/offload-tblgen/print_function.td
M offload/test/tools/offload-tblgen/type_tagged_enum.td
M offload/tools/offload-tblgen/APIGen.cpp
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/tools/offload-tblgen/PrintGen.cpp
M offload/tools/offload-tblgen/RecordTypes.hpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
R offload/unittests/OffloadAPI/device/olGetDevice.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/device/olIterateDevices.cpp
A offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/bar.c
A offload/unittests/OffloadAPI/device_code/foo.c
A offload/unittests/OffloadAPI/kernel/olGetKernel.cpp
A offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
A offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
A offload/unittests/OffloadAPI/memory/olMemFree.cpp
A offload/unittests/OffloadAPI/memory/olMemcpy.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
M offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
M offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
M offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
A offload/unittests/OffloadAPI/program/olCreateProgram.cpp
A offload/unittests/OffloadAPI/program/olDestroyProgram.cpp
A offload/unittests/OffloadAPI/queue/olCreateQueue.cpp
A offload/unittests/OffloadAPI/queue/olDestroyQueue.cpp
A offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/z_Linux_util.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/include/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
A utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/Targets.h
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
Merge branch 'main' into users/kparzysz/spr/h02-memory-order
Compare: https://github.com/llvm/llvm-project/compare/8df469018b0a...87f93266502c
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