[all-commits] [llvm/llvm-project] 99c08f: Revert "[clang] Unify `SourceLocation` and `Identi...
Koakuma via All-commits
all-commits at lists.llvm.org
Sun Apr 20 00:51:47 PDT 2025
Branch: refs/heads/users/koachan/spr/sparc-promote-i32-cttz-when-we-have-vis3
Home: https://github.com/llvm/llvm-project
Commit: 99c08ff1cb96fc4f471aca0dd253060b3f32e8bc
https://github.com/llvm/llvm-project/commit/99c08ff1cb96fc4f471aca0dd253060b3f32e8bc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
Revert "[clang] Unify `SourceLocation` and `IdentifierInfo*` pair-like data structures to `IdentifierLoc`" (#135974)
Reverts llvm/llvm-project#135808
Example from the LLDB macOS CI:
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/as-lldb-cmake/24084/execution/node/54/log/?consoleFull
```
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp:360:49: error: no viable conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'clang::ModuleIdPath' (aka 'ArrayRef<IdentifierLoc>')
clang::Module *top_level_module = DoGetModule(clang_path.front(), false);
^~~~~~~~~~~~~~~~~~
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:41:40: note: candidate constructor (the implicit copy constructor) not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'const llvm::ArrayRef<clang::IdentifierLoc> &' for 1st argument
class LLVM_GSL_POINTER [[nodiscard]] ArrayRef {
^
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:41:40: note: candidate constructor (the implicit move constructor) not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'llvm::ArrayRef<clang::IdentifierLoc> &&' for 1st argument
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:70:18: note: candidate constructor not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'std::nullopt_t' for 1st argument
/*implicit*/ ArrayRef(std::nullopt_t) {}
```
Commit: ab7e0c0fc00b2c0ccae735cb0def103831d15b3b
https://github.com/llvm/llvm-project/commit/ab7e0c0fc00b2c0ccae735cb0def103831d15b3b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_wmem{cpy,move} (#135969)
Commit: 2e9ab7cf96d802a906de342f32bc844036152ada
https://github.com/llvm/llvm-project/commit/2e9ab7cf96d802a906de342f32bc844036152ada
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
Log Message:
-----------
[NFC][Driver][CFI] Update boolean expression (#135881)
Show why we don't need regular CFI runtime, when CFI diag runtime is
linked.
Commit: f875dd10162dcfb8f4625cef2bfc8e6b9f73f8fc
https://github.com/llvm/llvm-project/commit/f875dd10162dcfb8f4625cef2bfc8e6b9f73f8fc
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M lldb/source/Target/ThreadPlanStepInRange.cpp
Log Message:
-----------
[lldb][nfc] Remove redundant check in if statement (#135869)
We already check this boolean in the `if` statement two lines above.
Commit: d13135134c43af674584780b1494316f6fdaf027
https://github.com/llvm/llvm-project/commit/d13135134c43af674584780b1494316f6fdaf027
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
[NFC][Driver][CFI] Rename to clarify purpose of CFI runtime (#135885)
CFI runtime (diagnostics, or not) is only needed
for cross-dso support.
Commit: b73e5419f66a2501b4491514a72c7e361c25d57e
https://github.com/llvm/llvm-project/commit/b73e5419f66a2501b4491514a72c7e361c25d57e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC][CFI] Don't mix CFI and non-CFI flags on the same line (#135890)
Commit: 8c04656c457e28680c60e8edc15a4b170b684ca2
https://github.com/llvm/llvm-project/commit/8c04656c457e28680c60e8edc15a4b170b684ca2
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix bazel build after 2b983a24583dd4e131d727717872a56712b5dd52. (#135976)
Commit: 30259076fec0af97e604ca943b61fb686b9b21ef
https://github.com/llvm/llvm-project/commit/30259076fec0af97e604ca943b61fb686b9b21ef
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
Log Message:
-----------
[AMDGPU][True16][MC] fix opsel for v_cmpx 16bit inst (#135441)
Fixed inst printer so that no opsel is generated for dst reg of cmpx
16bit insts
Commit: aca710ac3655fcd3f057edc1382ceec7fc58ef19
https://github.com/llvm/llvm-project/commit/aca710ac3655fcd3f057edc1382ceec7fc58ef19
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
[NFC][Clang] Introduce type aliases to replace use of auto in clang/lib/CodeGen/CGCall.cpp. (#135861)
CGCall.cpp declares several functions with a return type that is an
explicitly spelled out specialization of `SmallVector`. Previously,
`auto` was used in several places to avoid repeating the long type name;
a use that Clang maintainers find unjustified. This change introduces
type aliases and replaces the existing uses of `auto` with the
corresponding alias name.
Commit: 81b4fc2bedc411c257fdf24540318e24fe669b8b
https://github.com/llvm/llvm-project/commit/81b4fc2bedc411c257fdf24540318e24fe669b8b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with ArrayRef (NFC) (#135930)
Note that we can drop the call to reserve because the constructor that
takes ArrayRef calls append, which in turn calls reserve.
Commit: 842bc07946e7ac71692ae235e784b9bc6c3d6535
https://github.com/llvm/llvm-project/commit/842bc07946e7ac71692ae235e784b9bc6c3d6535
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[DebugInfo] Use StringRef::starts_with (NFC) (#135933)
Commit: 05772406153c390e61809757643ad49bff7dc71d
https://github.com/llvm/llvm-project/commit/05772406153c390e61809757643ad49bff7dc71d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[Utils] Use StringRef::ends_with (NFC) (#135934)
Commit: 0045b82a42bd36306a14f8b40bd9b54470c299ea
https://github.com/llvm/llvm-project/commit/0045b82a42bd36306a14f8b40bd9b54470c299ea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[Vectorize] Construct SmallVector with an iterator range (NFC) (#135936)
Commit: 419fa1b06a36336ad85f1c71fc72ffa719ceb659
https://github.com/llvm/llvm-project/commit/419fa1b06a36336ad85f1c71fc72ffa719ceb659
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
Log Message:
-----------
[lldb][DataFormatter] Surface CalculateNumChildren errors in std::vector summary (#135944)
When the data-formatters happen to break (e.g., due to layout changes in
libc++), there's no clear indicator of them failing from a user's
perspective. E.g., for `std::vector`s we would just show:
```
(std::vector<int>) v = size=0 {}
```
which is highly misleading, especially if `v.size()` returns a non-zero
size.
This patch surfaces the various errors that could occur when calculating
the number of children of a vector.
rdar://146964266
Commit: 34598fdadc06bd3b21aa97342dda05ecd9233912
https://github.com/llvm/llvm-project/commit/34598fdadc06bd3b21aa97342dda05ecd9233912
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/include/llvm/Demangle/ItaniumDemangle.h
Log Message:
-----------
[llvm][ItaniumDemangle] Use __LDBL_MANT_DIG__ for configuring demangling of long doubles (#135968)
Syncing in the changes from
https://github.com/llvm/llvm-project/pull/134976 using the
`cp-to-llvm.sh` script.
Commit: 7f4422d99115efbb770e13ccb60cf6bfc190c245
https://github.com/llvm/llvm-project/commit/7f4422d99115efbb770e13ccb60cf6bfc190c245
Author: David Green <david.green at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/shuffle-extend.ll
Log Message:
-----------
[AArch64] Add testing for shuffles that extend into new types. NFC
Commit: 24171f4d12a02b49de1cc7a1beb2dc19c740a9f1
https://github.com/llvm/llvm-project/commit/24171f4d12a02b49de1cc7a1beb2dc19c740a9f1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC][CFI] Add test to check for '-flto' and '-fvisibility=' flags (#135892)
Commit: 76b5fcbf975547251faaeed8b567ea09d139a607
https://github.com/llvm/llvm-project/commit/76b5fcbf975547251faaeed8b567ea09d139a607
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[TableGen] Store flat source operand number in OperandMap in PseudoLoweringEmitter. NFC (#135886)
Previously we stored the index into the source CodeGenInstruction's
operand list. Any operand with sub operands stored the same index into
all of the OperandMap entries for that operand. The emitting loop would
look up the MIOperandNo for the source and add the sub index.
This patch moves the logic into the loop that updates the OperandMap.
Now the emitting loop only needs to print the value.
While there, I've added a check that MIOperandNo is the same for source
and destination.
Commit: 76b7ae7e454a1f0d814406d16926aa6722afcda4
https://github.com/llvm/llvm-project/commit/76b7ae7e454a1f0d814406d16926aa6722afcda4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Remove std::placeholders:: qualifiers, NFC
Commit: 726a5c2c57c486e69df2dfc296482e1d8014ab62
https://github.com/llvm/llvm-project/commit/726a5c2c57c486e69df2dfc296482e1d8014ab62
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC][CFI] Avoid clang error in CFI tests (#135981)
In these tests we test correct linking flags set,
and it's confusing that command fails because of
other missing required flags.
Clang diagnostics opportunistically proceed after
error report on required flags, but there is no
guaranty that processing of tested flags are the same
in supported and erroneous flag sets.
Commit: 72506eb37d9440d32e6dada187785b06aecb415c
https://github.com/llvm/llvm-project/commit/72506eb37d9440d32e6dada187785b06aecb415c
Author: Kostiantyn Lazukin <konstantin.lazukin at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M compiler-rt/test/builtins/Unit/addtf3_test.c
Log Message:
-----------
[compiler-rt] Fix `addtf3_test.c` being skipped due to misplaced include (#134106)
[compiler-rt] The test `addtf3_test.c` is currently guarded by `#if
defined(CRT_HAS_IEEE_TF)`, a macro that is declared in `int_lib.h`.
However, `int_lib.h` is included *after* the preprocessor check, which
results in the macro not being defined in time and causes the test to
always be skipped.
This patch moves the includes of `fp_test.h` and `int_lib.h` to the top
of the file so that `CRT_HAS_IEEE_TF` is defined before it is checked.
Co-authored-by: Kostiantyn Lazukin <koslaz01 at ip-10-252-21-142.eu-west-1.compute.internal>
Commit: 51fa6cde7d773aa7f41b410c8263884ad32eca86
https://github.com/llvm/llvm-project/commit/51fa6cde7d773aa7f41b410c8263884ad32eca86
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
Log Message:
-----------
[SLP][NFC]Add a test with missing unsigned promotion for smax reduction, NFC
Commit: ed9bcb52954f8e6171563d2b8310b0ca6d03d655
https://github.com/llvm/llvm-project/commit/ed9bcb52954f8e6171563d2b8310b0ca6d03d655
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[CodeGen][RISCV] Add helper class for emitting CFI instructions into MIR (#135845)
PR: https://github.com/llvm/llvm-project/pull/135845
Commit: 0daf20b3605f19271af7afa4175e7d62194e5578
https://github.com/llvm/llvm-project/commit/0daf20b3605f19271af7afa4175e7d62194e5578
Author: James Newling <james.newling at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
Log Message:
-----------
[mlir][vector] transpose(broadcast) -> broadcast canonicalization (#135096)
Example seen in the 'real world':
```
%0 = vector.broadcast %arg0 : vector<1xi8> to vector<1x8xi8>
%1 = vector.transpose %0, [1, 0] : vector<1x8xi8> to vector<8x1xi8>
```
This PR adds a canonicalizer that rewrites the above as
```
%1 = vector.broadcast %arg0 : vector<1xi8> to vector<8x1xi8>
```
It works by determining if a transpose is only shuffling contiguous
broadcast dimensions.
Commit: d88a3a36ad26e68281873fab9a35389f6eb5c919
https://github.com/llvm/llvm-project/commit/d88a3a36ad26e68281873fab9a35389f6eb5c919
Author: James Newling <james.newling at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Remove redundant shape_cast(shape_cast(x)) pattern (#135447)
This PR removes one OpRewritePattern `shape_cast(shape_cast(x)) -> x`
that is already handled by `ShapeCastOp::fold`.
Note that this might affect downstream users who indirectly call
`populateShapeCastFoldingPatterns(RewritePatternSet &patterns,
PatternBenefit)` and then use `patterns` with a `GreedyRewriteConfig
config` that has `config.fold = false`. (only user I've checked is IREE,
that never uses config.fold = false).
Commit: facc57fc25d0f05f5834fed421662dbad3ec5b50
https://github.com/llvm/llvm-project/commit/facc57fc25d0f05f5834fed421662dbad3ec5b50
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCXX/implicit-member-functions.cpp
A clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
Log Message:
-----------
[Clang][RFC] Bypass TAD during overload resolution if a perfect match exists (#133426)
This implements the same overload resolution behavior as GCC,
as described in https://wg21.link/p3606 (sections 1-2, not 3)
If, during overload resolution, a non-template candidate is always
picked because each argument is a perfect match (i.e., the source and
target types are the same), we do not perform deduction for any template
candidate that might exist.
The goal is to be able to merge #122423 without being too disruptive.
This change means that the selection of the best viable candidate and
template argument deduction become interleaved.
To avoid rewriting half of Clang, we store in `OverloadCandidateSet`
enough information to deduce template candidates from
`OverloadCandidateSet::BestViableFunction`. This means the lifetime of
any object used by the template argument must outlive a call to
`Add*Template*Candidate`.
This two-phase resolution is not performed for some initialization as
there are cases where template candidates are a better match per the
standard. It's also bypassed for code completion.
The change has a nice impact on compile times
https://llvm-compile-time-tracker.com/compare.php?from=edc22c64e527171041876f26a491bb1d03d905d5&to=8170b860bd4b70917005796c05a9be013a95abb2&stat=instructions%3Au
Fixes #62096
Fixes #74581
Fixes #53454
Commit: 73b8750a970ddaec5da1540c100561bd5104bca6
https://github.com/llvm/llvm-project/commit/73b8750a970ddaec5da1540c100561bd5104bca6
Author: James Newling <james.newling at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] fold transpose(poison) -> poison (#135675)
Following on from https://github.com/llvm/llvm-project/pull/133988
---------
Signed-off-by: James Newling <james.newling at gmail.com>
Commit: eea86489dd3df5b66d75ee2590f4824913c411d5
https://github.com/llvm/llvm-project/commit/eea86489dd3df5b66d75ee2590f4824913c411d5
Author: James Newling <james.newling at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Fold broadcast(poison) -> poison (#135677)
In addition to the new folder, I've also a test for broadcast(splat) ->
splat which I think was missing
Signed-off-by: James Newling <james.newling at gmail.com>
Commit: 52e0337ea34142f55c427493e9ca2be5fce2dd38
https://github.com/llvm/llvm-project/commit/52e0337ea34142f55c427493e9ca2be5fce2dd38
Author: Chris B <chris.bieneman at me.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
A clang/test/SemaHLSL/Language/ImpCastAddrSpace.hlsl
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
Log Message:
-----------
[HLSL][OpenCL] Strip addrspace from implicit cast diags (#135830)
The address space of a source value for an implicit cast isn't really
relevant when emitting conversion warnings. Since the lvalue->rvalue
cast effectively removes the address space they don't factor in, but
they do create visual noise in the diagnostics.
This is a small quality-of-life fixup to get in as HLSL adopts more
address space annotations.
Commit: 81739c39db11b7f9a4f3528c1c66b552e57b47e4
https://github.com/llvm/llvm-project/commit/81739c39db11b7f9a4f3528c1c66b552e57b47e4
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/macro-identifier-hiding.c
Log Message:
-----------
[Modules] Fix an identifier hiding a function-like macro definition. (#135471)
We emit a macro definition only in a module defining it. But it means
that if another module has an identifier with the same name as the
macro, the users of such module won't be able to use the macro anymore.
Fix by storing that an identifier has a macro definition that's not in a
current module (`MacroDirectivesOffset == 0`). This way
`IdentifierLookupVisitor` knows not to stop at the first module with an
identifier but to keep checking included modules for the actual macro
definition.
Fixes issue #32040.
rdar://30258278
Commit: 913dcf1aa36f3ea2d67a0d2b05b9d1375987e553
https://github.com/llvm/llvm-project/commit/913dcf1aa36f3ea2d67a0d2b05b9d1375987e553
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
Log Message:
-----------
[SLP]Fix type promotion for smax reduction with unsigned reduced operands
Need to add an extra bit for sign info for unsigned reduced values to
generate correct code.
Commit: ce7466f66c8a279917cd1c9486846b6857a82fe8
https://github.com/llvm/llvm-project/commit/ce7466f66c8a279917cd1c9486846b6857a82fe8
Author: AdityaK <hiraditya at msn.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
NFC: Rewrite auto castIter -> const auto *castIter (#133521)
Commit: 80c19b3b1d59294be63d8b55fedc317305abbdbe
https://github.com/llvm/llvm-project/commit/80c19b3b1d59294be63d8b55fedc317305abbdbe
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/struct.c
Log Message:
-----------
[CIR] Upstream initial support for complete record types (#135844)
This adds basic support for populating record types. In order to keep
the change small, everything non-essential was deferred to a later
change set. Only non-recursive structures are handled. Structures
padding is not yet implemented. Bitfields are not supported. No attempt
is made to handle ABI requirements for passing structure arguments.
Commit: 1576fa10104b9a88bef88ae851c2df479502fea9
https://github.com/llvm/llvm-project/commit/1576fa10104b9a88bef88ae851c2df479502fea9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/test/Transforms/PGOProfile/ctx-instrumentation-invalid-roots.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
Log Message:
-----------
[ctxprof] Extend the notion of "cannot return" (#135651)
At the time of instrumentation (and instrumentation lowering), `noreturn` is not applied uniformously. Rather than running `FunctionAttrs` pass, we just need to use `llvm::canReturn` exposed in PR #135650
Commit: 6ccc9280ba891bbea349c12a064bf23bdf9000e7
https://github.com/llvm/llvm-project/commit/6ccc9280ba891bbea349c12a064bf23bdf9000e7
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCXX/implicit-member-functions.cpp
R clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
Log Message:
-----------
Revert "[Clang][RFC] Bypass TAD during overload resolution if a perfect match exists" (#135993)
Reverts llvm/llvm-project#133426
This is failing on some bots
https://lab.llvm.org/buildbot/#/builders/163/builds/17265
Commit: 6d03f51f0c59171f1ec3c5cc5c1fe71c30956273
https://github.com/llvm/llvm-project/commit/6d03f51f0c59171f1ec3c5cc5c1fe71c30956273
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/Targets/SystemZ.cpp
A clang/test/CodeGen/SystemZ/Float16.c
A clang/test/CodeGen/SystemZ/fp16.c
M clang/test/CodeGen/SystemZ/strictfp_builtins.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/clear_cache.c
A compiler-rt/lib/builtins/extendhfdf2.c
M compiler-rt/test/builtins/CMakeLists.txt
A compiler-rt/test/builtins/Unit/extendhfdf2_test.c
M llvm/docs/LangRef.rst
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZFeatures.td
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFP.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ17.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/test/CodeGen/SystemZ/asm-10.ll
M llvm/test/CodeGen/SystemZ/asm-17.ll
M llvm/test/CodeGen/SystemZ/asm-19.ll
A llvm/test/CodeGen/SystemZ/atomic-load-10.ll
A llvm/test/CodeGen/SystemZ/atomic-store-10.ll
A llvm/test/CodeGen/SystemZ/atomicrmw-fadd-04.ll
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
M llvm/test/CodeGen/SystemZ/fp-abs-01.ll
M llvm/test/CodeGen/SystemZ/fp-abs-03.ll
M llvm/test/CodeGen/SystemZ/fp-abs-04.ll
M llvm/test/CodeGen/SystemZ/fp-add-01.ll
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-conv-20.ll
A llvm/test/CodeGen/SystemZ/fp-copysign-03.ll
M llvm/test/CodeGen/SystemZ/fp-div-01.ll
A llvm/test/CodeGen/SystemZ/fp-half-cmp.ll
A llvm/test/CodeGen/SystemZ/fp-half-libcall.ll
A llvm/test/CodeGen/SystemZ/fp-half-mem.ll
A llvm/test/CodeGen/SystemZ/fp-half-move.ll
A llvm/test/CodeGen/SystemZ/fp-half-strict.ll
A llvm/test/CodeGen/SystemZ/fp-half-vector.ll
A llvm/test/CodeGen/SystemZ/fp-half.ll
M llvm/test/CodeGen/SystemZ/fp-libcall.ll
M llvm/test/CodeGen/SystemZ/fp-mul-01.ll
M llvm/test/CodeGen/SystemZ/fp-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-mul-08.ll
M llvm/test/CodeGen/SystemZ/fp-mul-10.ll
A llvm/test/CodeGen/SystemZ/fp-mul-15.ll
M llvm/test/CodeGen/SystemZ/fp-neg-01.ll
M llvm/test/CodeGen/SystemZ/fp-neg-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-17.ll
M llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
M llvm/test/CodeGen/SystemZ/fp-sub-01.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting.ll
M llvm/test/CodeGen/SystemZ/is_fpclass.ll
A llvm/test/CodeGen/SystemZ/spill-half-01.mir
A llvm/test/CodeGen/SystemZ/spill-half-02.mir
M llvm/test/CodeGen/SystemZ/stackmap.ll
M llvm/test/CodeGen/SystemZ/tdc-01.ll
M llvm/test/CodeGen/SystemZ/tdc-02.ll
M llvm/test/CodeGen/SystemZ/tdc-03.ll
M llvm/test/CodeGen/SystemZ/tdc-04.ll
M llvm/test/CodeGen/SystemZ/tdc-05.ll
M llvm/test/CodeGen/SystemZ/tdc-06.ll
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/SystemZ/vec-max-05.ll
M llvm/test/CodeGen/SystemZ/vec-min-05.ll
M llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
M llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
Log Message:
-----------
[SystemZ] Add support for 16-bit floating point. (#109164)
- _Float16 is now accepted by Clang.
- The half IR type is fully handled by the backend.
- These values are passed in FP registers and converted to/from float around
each operation.
- Compiler-rt conversion functions are now built for s390x including the missing
extendhfdf2 which was added.
Fixes #50374
Commit: ad12323fbf8f34fcb3bd3a75ed410d3d5b0ca42c
https://github.com/llvm/llvm-project/commit/ad12323fbf8f34fcb3bd3a75ed410d3d5b0ca42c
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/test/Driver/HLSL/metal-converter.hlsl
M clang/test/Driver/dxc_D.hlsl
M clang/test/Driver/dxc_dxv_path.hlsl
M clang/test/Driver/dxc_options.hlsl
M clang/test/Driver/hlsl-lang-targets.hlsl
Log Message:
-----------
[HLSL] Don't invoke `dxv` from `clang-dxc` for text output (#135876)
Running `clang-dxc` with textual output was emitting various spurious
warnings (if `dxv` wasn't on your path) or errors (if it was). Avoid
these by not attempting to run this tool when it doesn't make sense to
do so.
Fixes #135874.
Commit: e19fcb72d7fbda6a1e67c45b85b399fe69d212ad
https://github.com/llvm/llvm-project/commit/e19fcb72d7fbda6a1e67c45b85b399fe69d212ad
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
Fix 'unannotated fall-through between switch labels' warning. (#136000)
Commit: 8a00efd26db21ef73df58b465b7741d1f889a681
https://github.com/llvm/llvm-project/commit/8a00efd26db21ef73df58b465b7741d1f889a681
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
Log Message:
-----------
[SystemZ] Fix warnings
This patch fixes:
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp:6916:7: error:
unused variable 'RegVT' [-Werror,-Wunused-variable]
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp:1265:30: error: unused
variable 'RC' [-Werror,-Wunused-variable]
Commit: e77ef7b291a0024ae34eaa76dafb62aef06d3c95
https://github.com/llvm/llvm-project/commit/e77ef7b291a0024ae34eaa76dafb62aef06d3c95
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC][CFI] Dump test output to debug llvm-clang-win-x-aarch64 failure (#136002)
Commit: 4aca20c8b6dcf86696db03d860e635112601a7f9
https://github.com/llvm/llvm-project/commit/4aca20c8b6dcf86696db03d860e635112601a7f9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
Log Message:
-----------
[SLP]Pre-cache the last instruction for all entries before vectorization
Need to pre-cache last instruction to avoid unexpected changes in the
last instruction detection during the vectorization, caused by adding
the new vector instructions, which add new uses and may affect the
analysis.
Commit: 4903a7b77b56c7d9a650205b6e7dca46581c7134
https://github.com/llvm/llvm-project/commit/4903a7b77b56c7d9a650205b6e7dca46581c7134
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
Log Message:
-----------
[ctxprof][nfc] Move profile annotator to Analysis (#135871)
This moves the utility that propagates counter values such that we can reuse it elsewhere. Specifically, in a subsequent patch, it'll be used to guide ICP: we need to prioritize promoting indirect calls that dominate larger portions of the dynamic instruction count. We can compare them based on the dynamic count of IR instructions, and we can get that early with this counter propagation logic.
The patch is mostly a move of the existing logic, with a pimpl - style implementation to hide all the current complexity.
Commit: fe94f11407453c2d166597ef6e58d31f5b27d46e
https://github.com/llvm/llvm-project/commit/fe94f11407453c2d166597ef6e58d31f5b27d46e
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseConstraintsCheck.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/CXX/drs/cwg23xx.cpp
M clang/test/SemaTemplate/dependent-template-recover.cpp
M clang/test/SemaTemplate/elaborated-type-specifier.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
Log Message:
-----------
[clang] Fix elaborated keyword canonicalization (#135916)
Commit: c4e9901b5b660f7c64570c3440080436c8e8b32e
https://github.com/llvm/llvm-project/commit/c4e9901b5b660f7c64570c3440080436c8e8b32e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
M llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/MC/DXContainerPSVInfo.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/DebugInfo/PDB/HashTableTest.cpp
M llvm/unittests/Transforms/IPO/LowerTypeTests.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[llvm] Use llvm::append_range (NFC) (#135931)
Commit: 0f97cd87dee1ddc6aadc04369262739da2f55b5a
https://github.com/llvm/llvm-project/commit/0f97cd87dee1ddc6aadc04369262739da2f55b5a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Frontend/InitPreprocessor.cpp
Log Message:
-----------
[Frontend] Use StringRef::ends_with (NFC) (#135988)
Commit: fa46d522fe66b77bdf3156be9255ce3b83010433
https://github.com/llvm/llvm-project/commit/fa46d522fe66b77bdf3156be9255ce3b83010433
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/tools/llvm-xray/xray-stacks.cpp
Log Message:
-----------
[llvm-xray] Use llvm::make_second_range (NFC) (#135989)
Commit: 4863d1ffbde77b8a3c580b4f7905ec21b1aba7e0
https://github.com/llvm/llvm-project/commit/4863d1ffbde77b8a3c580b4f7905ec21b1aba7e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Serialization/MultiOnDiskHashTable.h
Log Message:
-----------
[Serialization] Use llvm::map_range (NFC) (#135990)
Commit: d338bdc9fe72aef1d9d2043d569fd94eb57db111
https://github.com/llvm/llvm-project/commit/d338bdc9fe72aef1d9d2043d569fd94eb57db111
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
Log Message:
-----------
[mlir][linalg][NFC] Update elementwise docs to match op name (#135999)
Updates linalg.elementwise op description to replace older abbreviated
mnemonic with its current form.
Commit: 598ec8ce2d1e5e20b45c56de8972f58a0caeb697
https://github.com/llvm/llvm-project/commit/598ec8ce2d1e5e20b45c56de8972f58a0caeb697
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#135882)
- Add command line option `num-to-skip-size` to parameterize the size of
`NumToSkip` bytes in the decoder table. Default value will be 2, and
targets that need larger size can use 3.
- Keep all existing targets, except AArch64, to use size 2, and change
AArch64 to use size 3 since it run into the "disassembler decoding table
too large" error with size 2.
- Following is a rough reduction in size for the decoder tables by
switching to size 2.
```
Target Old Size New Size % Reduction
================================================
AArch64 153254 153254 0.00
AMDGPU 471566 412805 12.46
ARC 5724 5061 11.58
ARM 84936 73831 13.07
AVR 1497 1306 12.76
BPF 2172 1927 11.28
CSKY 10064 8692 13.63
Hexagon 47967 41965 12.51
Lanai 1108 982 11.37
LoongArch 24446 21621 11.56
MSP430 4200 3716 11.52
Mips 36330 31415 13.53
PPC 31897 28098 11.91
RISCV 37979 32790 13.66
Sparc 8331 7252 12.95
SystemZ 36722 32248 12.18
VE 48296 42873 11.23
XCore 2590 2316 10.58
Xtensa 3827 3316 13.35
```
Commit: 80855eb6f11b06c194939eb305761eb2b62822f9
https://github.com/llvm/llvm-project/commit/80855eb6f11b06c194939eb305761eb2b62822f9
Author: Lei Wang <wlei at fb.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleFDO] Extend the function base name max size (#135863)
The function base name could be way long which overflows and leads to a
crash. Update to extend the max size.
Also changed to use heap allocation( `std::vector<char>` ) to avoid
stack overflow.
Commit: 05aa98955c697e52209d775327013e9cc2be6321
https://github.com/llvm/llvm-project/commit/05aa98955c697e52209d775327013e9cc2be6321
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
Log Message:
-----------
[NFCI] Explicitly delete unused copy constructor and assign copy for VPInterleavedAccessInfo (#134755)
VPInterleavedAccessInfo has a defined destructor freeing memory, but no
explicitly defined copy constructor or copy assignment op. These are not
used, so this patch marks them as deleted to avoid usage of the
implicitly defined implementations.
Commit: 7fd0c8acd4659ccd0aef5486afe32c8ddf0f2957
https://github.com/llvm/llvm-project/commit/7fd0c8acd4659ccd0aef5486afe32c8ddf0f2957
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
Revert "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter" (#136017)
Reverts llvm/llvm-project#135882
Causing assert failures for AArch64 backend
Commit: c7fae59ac540ced666f664c88c2a49e06352a8dc
https://github.com/llvm/llvm-project/commit/c7fae59ac540ced666f664c88c2a49e06352a8dc
Author: James Newling <james.newling at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Move extract_strided_slice canonicalization to folding (#135676)
Folders are preferred:
https://mlir.llvm.org/docs/Canonicalization/#when-to-use-the-fold-method-vs-rewriterpatterns-for-canonicalizations
Included here : some missing `-----` between lit test file with mlir-opt
with `-split-input-file` flag
Commit: cbbf6b487360a0926c88d512c986b3640136f91e
https://github.com/llvm/llvm-project/commit/cbbf6b487360a0926c88d512c986b3640136f91e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Revert "[NFC][CFI] Dump test output to debug llvm-clang-win-x-aarch64 failure" (#136029)
Reverts llvm/llvm-project#136002
Not needed any more.
Commit: 6b0c8c4acd31eba83bf20ab1cf8729b2153e383c
https://github.com/llvm/llvm-project/commit/6b0c8c4acd31eba83bf20ab1cf8729b2153e383c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Revert "[NFC][CFI] Avoid clang error in CFI tests" (#136030)
Reverts llvm/llvm-project#135981
Fails with 'clang: error: --rtlib=libgcc requires --unwindlib=libgcc' on
some bots.
Commit: 41c1a7be3f1a2556e407e761acb766a5d103d691
https://github.com/llvm/llvm-project/commit/41c1a7be3f1a2556e407e761acb766a5d103d691
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
Log Message:
-----------
[LV] Don't add fixed-order recurrence phis to forced scalars.
Fixed-order recurrence phis cannot be forced to be scalar, they will
always be widened at the moment.
Make sure we don't add them to ForcedScalars, otherwise the legacy cost
model will compute incorrect costs.
This fixes an assertion reported with
https://github.com/llvm/llvm-project/pull/129645.
Commit: 42ad82bb059f1ba454c6f7d882984f38d6099d88
https://github.com/llvm/llvm-project/commit/42ad82bb059f1ba454c6f7d882984f38d6099d88
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add verifier check for Slice Op (#135853)
Add verifier check for Slice Op to make sure input1 and output have same
ranks.
Added test in verifier.mlir
Also moved existing slice verifier tests in invalid.mlir to verfier.mlir
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 2afef58e40ba953c0848577106dee51819b9be8f
https://github.com/llvm/llvm-project/commit/2afef58e40ba953c0848577106dee51819b9be8f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
Log Message:
-----------
[ARM] Use helper class for emitting CFI instructions into MIR (#135994)
Similar to #135845.
PR: https://github.com/llvm/llvm-project/pull/135994
Commit: a9827fbc86b3d2973b9eef7bfb8f726dd75f17a5
https://github.com/llvm/llvm-project/commit/a9827fbc86b3d2973b9eef7bfb8f726dd75f17a5
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[llvm] Handle CPI symbols for UEFI (#135652)
UEFI targets besides MSVC environment must support constant pool
symbols.
Commit: 9dbe107219c7ab1c422300f9eeb9ca3f7fc87c53
https://github.com/llvm/llvm-project/commit/9dbe107219c7ab1c422300f9eeb9ca3f7fc87c53
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
Log Message:
-----------
disable test on older compilers (#136037)
Commit: c409da2223ad910d2a0fb491c19623c679e8aae3
https://github.com/llvm/llvm-project/commit/c409da2223ad910d2a0fb491c19623c679e8aae3
Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][ROCDL] Add permlanex16 op to allow subgroup reductions on gfx10+ (#135983)
Adding Permlanex16Op to ROCDL dialect to enable subgroup reduce lowering
to DPP ops for gfx 10+ devices.
See [this PR](https://github.com/llvm/llvm-project/pull/133204).
---------
Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>
Commit: 6727d588919a49ae14d0857d2a642099098c9194
https://github.com/llvm/llvm-project/commit/6727d588919a49ae14d0857d2a642099098c9194
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC][CFI] Remove unnecessary -rtlib=platform from tests (#136032)
Should allow to reland https://github.com/llvm/llvm-project/pull/135981
Commit: 7623501c056a38c665ccf718ad318fd16451e4cc
https://github.com/llvm/llvm-project/commit/7623501c056a38c665ccf718ad318fd16451e4cc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M compiler-rt/lib/asan/asan_report.cpp
Log Message:
-----------
[asan] Fix build on fuchsia (#136042)
Does not link after #131756
Commit: 697aa9995c24a977425e672d76a4a434384b16e3
https://github.com/llvm/llvm-project/commit/697aa9995c24a977425e672d76a4a434384b16e3
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir-c/Dialect/SMT.h
M mlir/include/mlir-c/Target/ExportSMTLIB.h
A mlir/lib/Bindings/Python/DialectSMT.cpp
M mlir/lib/CAPI/Dialect/SMT.cpp
M mlir/lib/CAPI/Target/ExportSMTLIB.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SMTOps.td
A mlir/python/mlir/dialects/smt.py
M mlir/test/CAPI/smt.c
A mlir/test/python/dialects/smt.py
Log Message:
-----------
[mlir][SMT] add python bindings (#135674)
This PR adds "rich" python bindings to SMT dialect.
Commit: 9c98a9801dff79ea7e440f2a45f669be2cdc965b
https://github.com/llvm/llvm-project/commit/9c98a9801dff79ea7e440f2a45f669be2cdc965b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
Log Message:
-----------
[NFC][Asan] CRLF to LF in a test
Commit: 91df4cce44ac33d2d169614c532868c1dde5df51
https://github.com/llvm/llvm-project/commit/91df4cce44ac33d2d169614c532868c1dde5df51
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
Log Message:
-----------
[NFC][Asan] Disabled test dead-locking on Darwin
After #131756.
Commit: e64305096a3d1ec122953be6e7008fbf05467d73
https://github.com/llvm/llvm-project/commit/e64305096a3d1ec122953be6e7008fbf05467d73
Author: David Truby <david.truby at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Types.def
M clang/test/Driver/fortran.f95
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
M flang/test/Driver/phases.f90
M flang/test/Driver/pp-fixed-form.f90
Log Message:
-----------
[flang] Complete alignment of -x language modes with gfortran (#133775)
Commit: 8ebdd9d8a19543992195f197de215c53d506fb72
https://github.com/llvm/llvm-project/commit/8ebdd9d8a19543992195f197de215c53d506fb72
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
Reapply "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter" (#136017) (#136019)
This reverts commit 7fd0c8acd4659ccd0aef5486afe32c8ddf0f2957, and fixes
the assert condition in `patchNumToSkip`.
Commit: d35bf17e8a0cf37959149257c0eda7b9f912390e
https://github.com/llvm/llvm-project/commit/d35bf17e8a0cf37959149257c0eda7b9f912390e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/private.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/GlobalConstructors.hlsl
M clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
M clang/test/CodeGenHLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/cbuffer_align.hlsl
M clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
M clang/test/CodeGenHLSL/inline-functions.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M clang/test/ParserHLSL/cb_error.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserHLSL/invalid_inside_cb.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/hlsl_resource_t.hlsl
M clang/test/SemaHLSL/Language/AggregateSplatCast-errors.hlsl
M clang/test/SemaHLSL/cb_error.hlsl
M clang/test/SemaHLSL/export.hlsl
M clang/test/SemaHLSL/packoffset-invalid.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_basic.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_silence_diags.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_space.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
A clang/test/SemaHLSL/resource_binding_implicit.hlsl
Log Message:
-----------
[HLSL] Add a warning for implicit bindings (#135909)
Implicit bindings will cause very confusing crashes in the backend at
present, so this is intended at least partially as a stop gap until we
get them implemented (see #110722).
However, I do think that this is useful in the longer term as well as an
off-by-default warning, as it is quite easy to miss a binding or two
when using explicit bindings and the results of that can be surprisingly
hard to debug. I've filed #135907 to track turning this into an
off-by-default warning or removing it eventually as we see fit.
Commit: b9f1de04f65b062559d01c83dfd3948601924ee1
https://github.com/llvm/llvm-project/commit/b9f1de04f65b062559d01c83dfd3948601924ee1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[TableGen] Combine the two separate OperandMapping loops in PseudoLoweringEmitter. (#136007)
Previously we had one loop over the DAG for immediates and registers and
another loop over the destination operands for mapping from the source.
Now we have a single loop over the destination operands that handles immediates,
registers, and named operands. A helper method is added so we can handle
operands and sub-operands specified by a sub-dag.
My goal is to allow a named operand to appear in a sub-dag which wasn't
supported before. This will allow the destination instruction to have an
operand with sub-operands when the source does not have sub operands.
For RISC-V, I'm looking into using an operand with sub-operands to
represent an reg+offset memory address. I need to be able to lower a
pseudo instruction that only has a register operand to an instruction
that has a reg+offset operand. The offset will be filled in with 0
during expansion and the register will be copied from the source.
The expansion would look like this:
def PseudoCALLIndirect : Pseudo<(outs), (ins GPRJALR:$rs1),
[(riscv_call GPRJALR:$rs1)]>,
PseudoInstExpansion<(JALR X1, (ops GPR:$rs1, 0))>;
Commit: f7bdf30cb9b8a10847c29b9cad34e5e8abc1ecb8
https://github.com/llvm/llvm-project/commit/f7bdf30cb9b8a10847c29b9cad34e5e8abc1ecb8
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A .clang-format-ignore
Log Message:
-----------
Add empty top level .clang-format-ignore (#136022)
Otherwise if the source tree is embedded in another project with a
.clang-format-ignore, some clang-format tests fail because they use that
.clang-format-ignore.
Commit: f8ea2ed59820a0bef3f23638ce7a5d10165f7109
https://github.com/llvm/llvm-project/commit/f8ea2ed59820a0bef3f23638ce7a5d10165f7109
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix build for 8ebdd9d8a19543992195f197de215c53d506fb72
Commit: f3bf844d2ff0a2984ca9bf976014decc0241d2b4
https://github.com/llvm/llvm-project/commit/f3bf844d2ff0a2984ca9bf976014decc0241d2b4
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Fir/tbaa-codegen-records.fir
Log Message:
-----------
[flang] Unwrap sequence types when checking for descriptor members (#136039)
The TBAA generation gives conservative TBAA metadata when handling an
access of a record type with a descriptor member, since the access may
be a regular data access OR another descriptor. Array members were being
incorrectly identified as non-descriptor-members, and were giving
incorrect TBAA metadata which led to bugs showing up in the optimizer
when LLVM encountered mismatching TBAA.
`fir::isRecordWithDescriptorMember` now unwraps sequence types before
checking for descriptor members.
Commit: eef978290ccb847c67bf0431e5fdd1dc4c7d408d
https://github.com/llvm/llvm-project/commit/eef978290ccb847c67bf0431e5fdd1dc4c7d408d
Author: Mohamed Emad <73320969+hulxv at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
Log Message:
-----------
[clang-doc][NFC] clean unused variable in HTML generator (#135505)
While reading the code, I found some dead variables that are not used
anymore but it still declared without removing them.
Commit: 218531821a6b6f1132a245a1f52e125610dc7f6a
https://github.com/llvm/llvm-project/commit/218531821a6b6f1132a245a1f52e125610dc7f6a
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
LowerTypeTests: Fix quadratic complexity (try 2).
Currently we have quadratic complexity in LowerTypeTests because
ScopedSaveAliaseesAndUsed loops over all aliases for each disjoint
set, and the number of aliases and number of disjoint sets is
roughly proportional to the program size. Fix that by moving
ScopedSaveAliaseesAndUsed to LowerTypeTestsModule::lower() so that
we do this only once.
Reland of #135875 with fix for bug that caused check-lld test failures.
The fix is to only remove functions from llvm.used/llvm.compiler.used
because buildBitSetsFromGlobalVariables, which now runs while
ScopedSaveAliaseesAndUsed is in scope, will delete global variables,
which would otherwise lead to a use-after-free when they are added
back to llvm.used or llvm.compiler.used.
Reviewers: fmayer, vitalybuka
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/136053
Commit: 18855ece3c34a0d76a2126538d60760ddeee2de8
https://github.com/llvm/llvm-project/commit/18855ece3c34a0d76a2126538d60760ddeee2de8
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M lldb/source/Plugins/Language/ObjC/NSString.cpp
M lldb/source/Plugins/Language/ObjC/NSString.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
A lldb/test/API/lang/objc/foundation/tagged/strings/Makefile
A lldb/test/API/lang/objc/foundation/tagged/strings/TestObjCTaggedStrings.py
A lldb/test/API/lang/objc/foundation/tagged/strings/main.m
Log Message:
-----------
[lldb] Add summary for NSIndirectTaggedPointerString (#136025)
rdar://143164164
Commit: 78671dbb26628f072cb94de784349c50201c1e0f
https://github.com/llvm/llvm-project/commit/78671dbb26628f072cb94de784349c50201c1e0f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
Log Message:
-----------
[Sparc] Use helper class for emitting CFI instructions into MIR (#136027)
Also, guard emission by `needsFrameMoves()` check. There are no changes
in tests because cfi instructions are currently ignored by AsmPrinter
when they don't need to be printed/encoded.
PR: https://github.com/llvm/llvm-project/pull/136027
Commit: 6d8bf3cf3dcc5d85bec7b1e70a59a02cdfdaa1b4
https://github.com/llvm/llvm-project/commit/6d8bf3cf3dcc5d85bec7b1e70a59a02cdfdaa1b4
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/TableGen/VarLenDecoder.td
M llvm/test/TableGen/trydecode-emission.td
M llvm/test/TableGen/trydecode-emission2.td
M llvm/test/TableGen/trydecode-emission3.td
M llvm/test/TableGen/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
Revert "Reapply "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter" (#136017)" (#136068)
Reverts llvm/llvm-project#136019
Expensive checks tests are failing, so reverting.
Commit: 6b8d072cfd41f647f2c241f0a1a0843a279d049b
https://github.com/llvm/llvm-project/commit/6b8d072cfd41f647f2c241f0a1a0843a279d049b
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M libc/src/stdio/printf_core/float_dec_converter.h
Log Message:
-----------
[libc] Fix incorrect unsigned comparison (#135595)
There is a problem with such unsigned comparison pattern:
```
if(unsigned_a - unsigned_b > 0) { /* only NOT go here when unsigned_a==unsigned_b */ }
```
When `unsigned_a` < `unsigned_b`, the result will still be `>0` due to
underflow.
This patch fixes two of the occurrences I found.
Also remove two redundant `if` where its condition is guaranteed by
outer `if`.
Commit: 53eae22e228532fe3349890b6c7fc10b9c10dbee
https://github.com/llvm/llvm-project/commit/53eae22e228532fe3349890b6c7fc10b9c10dbee
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-MultipleEntryFunctions.ll
M llvm/test/ObjectYAML/DXContainer/RootSignature-Flags.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidType.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidVisibility.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-MultipleParameters.yaml
M llvm/tools/obj2yaml/dxcontainer2yaml.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DirectX] adding support in obj2yaml and yaml2obj to root constants (#127840)
Adding support for Root Constant in MC, Object and obj2yaml and
yaml2obj, this PR adds:
- new structures to dxbc definition.
- serialize and desirialize logic from dxcontainer to yaml
- tests validating against dxc
- adding support to multiple parts.
Closes: https://github.com/llvm/llvm-project/issues/126633
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 9bd0c8726a5e3fd4f76e84692bd920dfca7a8d7f
https://github.com/llvm/llvm-project/commit/9bd0c8726a5e3fd4f76e84692bd920dfca7a8d7f
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in BWACS_MultiLine (#135906)
Fix #51940
Commit: de528d689f3a2305c051528993fe30295f2a0cd9
https://github.com/llvm/llvm-project/commit/de528d689f3a2305c051528993fe30295f2a0cd9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Handle default template arguments for alias CTAD guides (#134807)
It's possible that some deduced template arguments come from default
arguments, not just from the return type. So we need to recursively
visit the default arguments of the parameter if it's referenced, thereby
the template parameter referenced by the defualt arguments could come
along to the synthesized deduction guide.
Fixes https://github.com/llvm/llvm-project/issues/134471
Commit: ee17ca77e50a2170dd79f31e109f6751235e098e
https://github.com/llvm/llvm-project/commit/ee17ca77e50a2170dd79f31e109f6751235e098e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/IR/IRBuilder.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[llvm] Construct SmallVector with ArrayRef (NFC) (#136063)
Commit: 799916ae1047cac6f6af8aed1499d8bf1b921f82
https://github.com/llvm/llvm-project/commit/799916ae1047cac6f6af8aed1499d8bf1b921f82
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[llvm] Construct SmallVector with iterator ranges (NFC) (#136064)
Commit: 47d8fec9b8bd5425af17711317a41743a30a8cef
https://github.com/llvm/llvm-project/commit/47d8fec9b8bd5425af17711317a41743a30a8cef
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[llvm] Use llvm::append_range (NFC) (#136066)
This patch replaces:
llvm::copy(Src, std::back_inserter(Dst));
with:
llvm::append_range(Dst, Src);
for breavity.
One side benefit is that llvm::append_range eventually calls
llvm::SmallVector::reserve if Dst is of llvm::SmallVector.
Commit: de893f87d2893c0de4dd730bcd91a79797078fa7
https://github.com/llvm/llvm-project/commit/de893f87d2893c0de4dd730bcd91a79797078fa7
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "[bazel] Fix build for 8ebdd9d8a19543992195f197de215c53d506fb72"
This reverts commit f8ea2ed59820a0bef3f23638ce7a5d10165f7109.
Commit: b6c99cb56bcd7f08d6c94d0feca88afacb25302f
https://github.com/llvm/llvm-project/commit/b6c99cb56bcd7f08d6c94d0feca88afacb25302f
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
Log Message:
-----------
[gn] port 6d03f51f0c59
Commit: 638c386b618a286ab1f30f628485e495f21ce124
https://github.com/llvm/llvm-project/commit/638c386b618a286ab1f30f628485e495f21ce124
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn] port ece59a8cb9c8
Commit: ebf9883b82aed98aacdfc77824655fec8dc46988
https://github.com/llvm/llvm-project/commit/ebf9883b82aed98aacdfc77824655fec8dc46988
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
Log Message:
-----------
[LoongArch] Lower vector shuffle as byte rotate (if possible) (#135157)
Commit: b99ac8b3d37ee2410d57c4c943a4bcff806dc5d6
https://github.com/llvm/llvm-project/commit/b99ac8b3d37ee2410d57c4c943a4bcff806dc5d6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
Log Message:
-----------
[gn build] Port 3de88fe40fd0
Commit: bf7f602e7d549d9933a8a5f073e65917e7c877de
https://github.com/llvm/llvm-project/commit/bf7f602e7d549d9933a8a5f073e65917e7c877de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port b07c88563feb
Commit: e016a90e0bcfbb61f5523696c6b2ad3d6db2579b
https://github.com/llvm/llvm-project/commit/e016a90e0bcfbb61f5523696c6b2ad3d6db2579b
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A mlir/test/Target/ExportSMTLIB/attributes.mlir
A mlir/test/Target/ExportSMTLIB/basic.mlir
A mlir/test/Target/ExportSMTLIB/lit.local.cfg
Log Message:
-----------
[mlir][SMT] add missing ExportSMTLIB tests (#136069)
Whoops forgot these -export-smtlib tests.
---------
Co-authored-by: Bea Healy <beahealy22 at gmail.com>
Co-authored-by: Martin Erhart <maerhart at outlook.com>
Co-authored-by: Mike Urbach <mikeurbach at gmail.com>
Co-authored-by: Will Dietz <will.dietz at sifive.com>
Co-authored-by: fzi-hielscher <hielscher at fzi.de>
Co-authored-by: Fehr Mathieu <mathieu.fehr at gmail.com>
Co-authored-by: Clo91eaf <Clo91eaf at qq.com>
Commit: c11c2fe1ae2fe7b88135c51c32a66d0e30fe5431
https://github.com/llvm/llvm-project/commit/c11c2fe1ae2fe7b88135c51c32a66d0e30fe5431
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/bug22246.ll
A llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
Log Message:
-----------
[NVPTX] Lower i1 select with logical ops in the general case (#135868)
Update i1 select lowering to use an expansion based on logical ops,
unless the selected operands are truncations. This can improve generated
code quality by exposing additional potential optimizations.
Commit: d647d66da697952f600d7a0d84fba94612fe51db
https://github.com/llvm/llvm-project/commit/d647d66da697952f600d7a0d84fba94612fe51db
Author: Shoreshen <372660931 at qq.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
Log Message:
-----------
[AMDGPU] Add illegal type convertion (#135729)
Add more bit-convert tests for illegal types conversion
Commit: adba24aa3c52c7e2673104fc16bd19e639221077
https://github.com/llvm/llvm-project/commit/adba24aa3c52c7e2673104fc16bd19e639221077
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Add missing __builtin_memcpy checks (#135975)
Add a test for type punning and tests and the necessary checks for
non-trivially-copyable types and incomplete types.
Commit: 84082223c819426a8a6486f9740210e956a4cea8
https://github.com/llvm/llvm-project/commit/84082223c819426a8a6486f9740210e956a4cea8
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (#130071)
Finishing up AMDGPU specific passes. Only ones remaining are assembly
printer, virt reg rewriter and PEI.
Commit: dfed3d235fe00b5ad7befe584fc0cad8359afde2
https://github.com/llvm/llvm-project/commit/dfed3d235fe00b5ad7befe584fc0cad8359afde2
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/Makefile
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
Log Message:
-----------
[lldb][test] TestDataFormatterLibcxxInvalidVectorSimulator.py: fix inline namespace warnings
Fixes:
```
/Users/ec2-user/jenkins/workspace/apple-llvm-project-pr-macos/branch-swift/release/6.2/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp:5:11: warning: inline namespace reopened as a non-inline namespace [-Winline-namespace-reopened-noninline]
5 | namespace __1 {
| ^
```
Drive-by: compile test as C++20 (in an attempt to fix another buildbot issue)
Commit: bc1725ef3a2707c244d8c2a401d7545755f96cbd
https://github.com/llvm/llvm-project/commit/bc1725ef3a2707c244d8c2a401d7545755f96cbd
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang] convergent attribute does not require "all threads" (#135803)
The documentation for the `convergent` attribute claims that OpenCL and
CUDA require "all threads" in a group to call the same convergent
operation. This is true only for OpenCL, and in general, the
`convergent` attribute is used in LLVM IR on operations that have no
such constraint.
Commit: 4d84d3dfba38ee4151350ef2ec8c1d92ba8f6d36
https://github.com/llvm/llvm-project/commit/4d84d3dfba38ee4151350ef2ec8c1d92ba8f6d36
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/python/CMakeLists.txt
Log Message:
-----------
[mlir][python][smt] fix DialectSMT (include NanobindUtils.h)
Commit: 1fd7e4c517141ddfb527e7560e02fd5856244971
https://github.com/llvm/llvm-project/commit/1fd7e4c517141ddfb527e7560e02fd5856244971
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M lldb/test/requirements.txt
Log Message:
-----------
Revert "[CI] monolithic-linux improvements (#135499)"
This reverts commit a399c6926a8701083c767cbb041e22ff92e9d717.
This is causing some premerge workflow failures.
Examople:
https://buildkite.com/llvm-project/github-pull-requests/builds/169129#01963d1d-dc75-4b4c-9952-fb60efbf91b4
Commit: a2029ee91ddf0738f8b521ec8159068b6d65010f
https://github.com/llvm/llvm-project/commit/a2029ee91ddf0738f8b521ec8159068b6d65010f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Rename fields in RegRegOp. NFC
Rename Reg1->BaseReg, Reg2->OffsetReg.
Commit: dbb79c30c9f3578b7afd9ea0ec33f82e70e472c7
https://github.com/llvm/llvm-project/commit/dbb79c30c9f3578b7afd9ea0ec33f82e70e472c7
Author: wangjue <wangjue at zhcomputing.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M bolt/CMakeLists.txt
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/runtime/CMakeLists.txt
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
A bolt/runtime/sys_riscv64.h
A bolt/test/runtime/RISCV/basic-instrumentation.s
A bolt/test/runtime/RISCV/instrumentation-ind-call.c
A bolt/test/runtime/RISCV/lit.local.cfg
Log Message:
-----------
[BOLT][Instrumentation] Initial instrumentation support for RISCV64 (#133882)
This patch adds code generation for RISCV64 instrumentation.The work
involved includes the following three points:
a) Implements support for instrumenting direct function call and jump
on RISC-V which relies on , Atomic instructions
(used to increment counters) are only available on RISC-V when the A
extension is used.
b) Implements support for instrumenting direct function inderect call
by implementing the createInstrumentedIndCallHandlerEntryBB and
createInstrumentedIndCallHandlerExitBB interfaces. In this process, we
need to accurately record the target address and IndCallID to ensure
the correct recording of the indirect call counters.
c)Implemented the RISCV64 Bolt runtime library, implemented some system
call interfaces through embedded assembly. Get the difference between
runtime addrress of .text section andstatic address in section header
table, which in turn can be used to search for indirect call
description.
However, the community code currently has problems with relocation in
some scenarios, but this has nothing to do with instrumentation. We
may continue to submit patches to fix the related bugs.
Commit: 377ec36b323ea99ca316cb5cf79c0a0c93eebc37
https://github.com/llvm/llvm-project/commit/377ec36b323ea99ca316cb5cf79c0a0c93eebc37
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCXX/implicit-member-functions.cpp
A clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
Log Message:
-----------
[Clang] Bypass TAD during overload resolution if a perfect match exists (#136018)
This implements the same overload resolution behavior as GCC,
as described in https://wg21.link/p3606 (section 1-2, not 3)
If during overload resolution, there is a non-template candidate
that would be always be picked - because each of the argument
is a perfect match (ie the source and target types are the same),
we do not perform deduction for any template candidate
that might exists.
The goal is to be able to merge
https://github.com/llvm/llvm-project/pull/122423 without being too
disruptive.
This change means that the selection of the best viable candidate and
template argument deduction become interleaved.
To avoid rewriting half of Clang we store in `OverloadCandidateSet`
enough information to be able to deduce template candidates from
`OverloadCandidateSet::BestViableFunction`. Which means
the lifetime of any object used by template argument must outlive
a call to `Add*Template*Candidate`.
This two phase resolution is not performed for some initialization
as there are cases where template candidate are better match
in these cases per the standard. It's also bypassed for code completion.
The change has a nice impact on compile times
https://llvm-compile-time-tracker.com/compare.php?from=719b029c16eeb1035da522fd641dfcc4cee6be74&to=bf7041045c9408490c395230047c5461de72fc39&stat=instructions%3Au
Fixes https://github.com/llvm/llvm-project/issues/62096
Fixes https://github.com/llvm/llvm-project/issues/74581
Reapplies #133426
Commit: 78b37ca2a3af50de1daea09295b6f4ea99e7edaa
https://github.com/llvm/llvm-project/commit/78b37ca2a3af50de1daea09295b6f4ea99e7edaa
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/CodeGen/Hexagon/64bit_tstbit.ll
M llvm/test/CodeGen/Hexagon/always-ext.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-concat-multiple.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-q-legalization-loop.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-terminator.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-use-in-different-block.ll
M llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
M llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
Log Message:
-----------
[Hexagon] Pre-commit tests for PR130742. NFC. (#135604)
Needed by https://github.com/llvm/llvm-project/pull/130742.
Commit: 8e67d8fdf3a31b42f52ec12d995490f866b4449b
https://github.com/llvm/llvm-project/commit/8e67d8fdf3a31b42f52ec12d995490f866b4449b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/CodeGenOpenCL/spir32_target.cl
M clang/test/CodeGenOpenCL/spir64_target.cl
M clang/test/CodeGenOpenCL/spirv_target.cl
Log Message:
-----------
[Clang][CodeGen][OpenCL] Add `-fno-delete-null-pointer-checks` to avoid UB. NFC. (#135602)
Needed by https://github.com/llvm/llvm-project/pull/130742.
Commit: d1a80deae674300d1011ccb6d6ee7030eaf8e713
https://github.com/llvm/llvm-project/commit/d1a80deae674300d1011ccb6d6ee7030eaf8e713
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/CodeGenCXX/local-class-instantiation.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
Log Message:
-----------
Reapply "[Clang] Fix dependent local class instantiation bugs" (#135914)
This reapplies #134038
Since the last patch, this fixes a null pointer dereference where the
TSI of the destructor wasn't properly propagated into the
DeclarationNameInfo. We now construct a LocInfoType for dependent cases,
as done elsewhere in getDestructorName, such that GetTypeFromParser can
correctly obtain the TSI.
---
This patch fixes two long-standing bugs that prevent Clang from
instantiating local class members inside a dependent context. These bugs
were introduced in commits
https://github.com/llvm/llvm-project/commit/21eb1af469c3257606aec2270d544e0e8ecf77b2
and
https://github.com/llvm/llvm-project/commit/919df9d75ac2a721a8072327c803f34486884571.
https://github.com/llvm/llvm-project/commit/21eb1af469c3257606aec2270d544e0e8ecf77b2
introduced a concept called eligible methods such that it did an attempt
to skip past ineligible method instantiation when instantiating class
members. Unfortunately, this broke the instantiation chain for local
classes - getTemplateInstantiationPattern() would fail to find the
correct definition pattern if the class was defined within a partially
transformed dependent context.
https://github.com/llvm/llvm-project/commit/919df9d75ac2a721a8072327c803f34486884571
introduced a separate issue by incorrectly copying the
DeclarationNameInfo during function definition instantiation from the
template pattern, even though that DNI might contain a transformed
TypeSourceInfo. Since that TSI was already updated when the declaration
was instantiated, this led to inconsistencies. As a result, the final
instantiated function could lose track of the transformed declarations,
hence we crash: https://compiler-explorer.com/z/vjvoG76Tf.
This PR corrects them by
1. Removing the bypass logic for method instantiation. The eligible flag
is independent of instantiation and can be updated properly afterward,
so skipping instantiation is unnecessary.
2. Carefully handling TypeSourceInfo by creating a new instance that
preserves the pattern's source location while using the already
transformed type.
Commit: 1a09ffea31e22172ce3de2fd553b770f52add576
https://github.com/llvm/llvm-project/commit/1a09ffea31e22172ce3de2fd553b770f52add576
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
Log Message:
-----------
[mlir][ArmSME][NFC] Check early for unsupported mask ops (#135955)
This is to avoid rollbacks in the dialect conversion, which are
expensive.
Note: This is in preparation of the One-Shot Dialect Conversion
refactoring.
Commit: 1906c18ce01092aed9524f1cb8344c11920ba144
https://github.com/llvm/llvm-project/commit/1906c18ce01092aed9524f1cb8344c11920ba144
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
Log Message:
-----------
[mlir][memref] Mark result memref as "strided" (#135939)
We already check this in the verifier, but this makes it explicit in the
Tablegen.
Commit: 62d32c2c27a83261af9f2529a961a22605df8a2b
https://github.com/llvm/llvm-project/commit/62d32c2c27a83261af9f2529a961a22605df8a2b
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Log Message:
-----------
[mlir][memref][NFC] Simplify `constifyIndexValues` (#135940)
Simplify the code by removing function pointers.
Commit: 34f9ddf1ce2d775d8df1ca9c9806710f3ba8361d
https://github.com/llvm/llvm-project/commit/34f9ddf1ce2d775d8df1ca9c9806710f3ba8361d
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-ld1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
Currently, given:
```cpp
uint64_t incb(uint64_t x) {
return x+svcntb();
}
```
LLVM generates:
```gas
incb:
addvl x0, x0, #1
ret
```
Which is equivalent to:
```gas
incb:
incb x0
ret
```
However, on microarchitectures like the Neoverse V2 and Neoverse V3,
the second form (with INCB) can have significantly better latency and
throughput (according to their SWOG). On the Neoverse V2, for example,
ADDVL has a latency and throughput of 2, whereas some forms of INCB
have a latency of 1 and a throughput of 4. The same applies to DECB.
This patch adds patterns to prefer the cheaper INCB/DECB forms over
ADDVL where applicable.
Commit: 1cf9acdb750612985674a0349ed607768e1edc6d
https://github.com/llvm/llvm-project/commit/1cf9acdb750612985674a0349ed607768e1edc6d
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/test/Transforms/Util/add-TLI-mappings.ll
M llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
Log Message:
-----------
[TLI] Use AArch64 vector calling convention for ArmPL routines (#135790)
Some ArmPL vector math routines that operate on fixed-width
vector types obey the aarch64_vector_pcs calling convention,
e.g. armpl_vsinq_f64, etc. This patch adds support for
functions in the TLI to specify an optional calling
convention to be added to the declared function. Once this
patch lands I intend to follow up with a vectoriser patch
that adds this optional calling convention when invoking the
vector library variant from the loop vectoriser.
Commit: d41bd1fb4056f2bb649a76b09b8a5cc258453818
https://github.com/llvm/llvm-project/commit/d41bd1fb4056f2bb649a76b09b8a5cc258453818
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
Log Message:
-----------
[mlir][tosa] Remove trailing whitespaces (#136031)
Trivial format cleanup
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: f351172d4a840dfbf533319b62925747a10b762f
https://github.com/llvm/llvm-project/commit/f351172d4a840dfbf533319b62925747a10b762f
Author: lntue <lntue at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M libc/src/__support/common.h
Log Message:
-----------
[libc] Export standard C symbols in the public packages for MacOS instead of namespaced C++ symbols. (#136100)
Commit: bf6986f9f09f79da38006a83c339226c429bb686
https://github.com/llvm/llvm-project/commit/bf6986f9f09f79da38006a83c339226c429bb686
Author: Camsyn <camsyn at foxmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/test/Instrumentation/ThreadSanitizer/capture.ll
Log Message:
-----------
[TSan, SanitizerBinaryMetadata] Improve instrument for derived pointers via phis/selects (#132752)
ThreadSanitizer.cpp and SanitizerBinaryMetadata.cpp previously used
`getUnderlyingObject` to check if pointers originate from stack objects.
However, `getUnderlyingObject()` by default only looks through linear
chains, not selects/phis. In particular, this means that we miss cases
involving pointer induction variables.
For instance,
```llvm
%stkobj = alloca [2 x i32], align 8
; getUnderlyingObject(%derived) = %derived
%derived = getelementptr inbounds i32, ptr %stkobj, i64 1
```
This will result in redundant instrumentation of TSan, resulting in
greater performance costs, especially when there are loops, referring to
this [godbolt page](https://godbolt.org/z/eaT1fPjTW) for details.
```cpp
char loop(int x) {
char buf[10];
char *p = buf;
for (int i = 0; i < x && i < 10; i++) {
// Should not instrument, as its base object is a non-captured stack
// variable.
// However, currectly, it is instrumented due to %p = %phi ...
*p++ = i;
}
// Use buf to prevent it from being eliminated by optimization
return buf[9];
}
```
There are TWO APIs `getUnderlyingObjectAggressive` and
`findAllocaForValue` that can backtrack the pointer via tree traversal,
supporting phis/selects.
This patch replaces `getUnderlyingObject` with `findAllocaForValue`
which:
1. Properly tracks through PHINodes and select operations
2. Directly identifies if a pointer comes from a `AllocaInst`
Performance impact:
- Compilation: Moderate cost increase due to wider value tracing, but...
- Runtime: Significant wins for code with pointer induction variables
derived from stack allocas, especially for loop-heavy code, as
instrumentation can now be safely omitted.
Commit: 1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9
https://github.com/llvm/llvm-project/commit/1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-sve-ldst-one.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/arm64-st1.ll
M llvm/test/CodeGen/AArch64/bitcast-v2i8.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/dp1.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pr-cf624b2.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/setcc-type-mismatch.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/AArch64/vec_uaddo.ll
M llvm/test/CodeGen/AArch64/vec_umulo.ll
M llvm/test/CodeGen/AArch64/vector-compress.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
Log Message:
-----------
[AArch64] Generalize integer FPR lane stores for all types (#134117)
This rewrites the fold from #129756 to apply to all types, including
stores of i8s. This required adding a new `aarch64mfp8` MVT to represent
FPR8 types on AArch64, which can be used to extract and store 8-bit
values using b sub-registers.
Follow on from: #129756
Closes: #131793
Commit: 5c97397c2c414d7ac8e43e87c6d2a79a87e802fb
https://github.com/llvm/llvm-project/commit/5c97397c2c414d7ac8e43e87c6d2a79a87e802fb
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/readonlynocapture.ll
Log Message:
-----------
[SROA] Support load-only promotion with dynamic offset loads (#135609)
If we do load-only promotion, it is okay if we leave some loads alone.
We only need to know all stores that affect a specific location.
As such, we can handle loads with unknown offset via the "escaped
read-only" code path.
This is something we already support in LICM load-only promotion, but
doing this in SROA is much better from a phase ordering perspective.
Fixes https://github.com/llvm/llvm-project/issues/134513.
Commit: 046a1e629c49365b1cd5f1ff17f650fcce186494
https://github.com/llvm/llvm-project/commit/046a1e629c49365b1cd5f1ff17f650fcce186494
Author: Will Froom <willfroom at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/uwtable.ll
A mlir/test/Target/LLVMIR/uwtable.mlir
Log Message:
-----------
[MLIR:LLVM] Add UWTableKind attribute (#135811)
Add `UWTableKind` enum and corresponding attribute to `llvm.func`
including translation to `llvm::Function` attribute.
Commit: 2a91d04b022f1295fe2057bc88dc89987e6a6e04
https://github.com/llvm/llvm-project/commit/2a91d04b022f1295fe2057bc88dc89987e6a6e04
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCXX/implicit-member-functions.cpp
R clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaTemplate/instantiate-function-params.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
Log Message:
-----------
Revert "[Clang] Bypass TAD during overload resolution if a perfect match exists" (#136113)
Reverts llvm/llvm-project#136018
Still some bots failing
https://lab.llvm.org/buildbot/#/builders/52/builds/7643
Commit: 2ee7fc04568f835be00629cb4130171b14b2e7df
https://github.com/llvm/llvm-project/commit/2ee7fc04568f835be00629cb4130171b14b2e7df
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] More OOP to simplify vectorizeStores() (NFC) (#134605)
This moves more code into the RelatedStoreInsts helper class. The
FillStoresSet lambda is now only a couple of lines and is easier to
read.
Commit: 121cd7c6f0270540ce976b98061ba765edc1675d
https://github.com/llvm/llvm-project/commit/121cd7c6f0270540ce976b98061ba765edc1675d
Author: Shoreshen <372660931 at qq.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
A llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
Log Message:
-----------
Re apply 130577 narrow math for and operand (#133896)
Re-apply https://github.com/llvm/llvm-project/pull/130577
Which is reverted in https://github.com/llvm/llvm-project/pull/133880
The old application failed in address sanitizer due to
`tryNarrowMathIfNoOverflow` was called after `I.eraseFromParent();` in
`AMDGPUCodeGenPrepareImpl::visitBinaryOperator`, it create a use after
free failure.
To fix this, `tryNarrowMathIfNoOverflow` will be called before and
directly return if `tryNarrowMathIfNoOverflow` result in true.
Commit: c5e112eed78a8ddfef5d16f6df6030c3ec8ca6ef
https://github.com/llvm/llvm-project/commit/c5e112eed78a8ddfef5d16f6df6030c3ec8ca6ef
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/cancel.f90
Log Message:
-----------
[flang][OpenMP][Semantics] Disallow NOWAIT and ORDERED with CANCEL (#135991)
NOWAIT was a tricky one because the clause can be on either the start or
the end directive. I couldn't find a convenient way to access the end
directive from the CANCEL directive nested inside of the construct, but
there are convenient ways to access the start directive. I have added a
list to the start directive context containing the clauses from the end
directive.
Commit: bd49bbaaafc98433a2cb4e95ce25b7a201baf5a5
https://github.com/llvm/llvm-project/commit/bd49bbaaafc98433a2cb4e95ce25b7a201baf5a5
Author: Kashyap Chamarthy <kchamart at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC][unittests] Skip the ReOptimizeLayerTest for RISC-V (#134702)
David Abdurachmanov reports[1] that we hit this error on P550 hardware:
/builddir/build/BUILD/llvm-20.1.1-build/llvm-project-20.1.1.src/llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp:140:
Failure
Value of: llvm::detail::TakeError(RM.takeError())
Expected: succeeded
Actual: failed (Architecture not supported) (of type
llvm::detail::ErrorHolder)
Tom Stellard noted[2] that he's seen this before on other architectures
and suggested to skip it.
[1] https://src.fedoraproject.org/rpms/llvm/pull-request/408#comment-255547
[2] https://src.fedoraproject.org/rpms/llvm/pull-request/408#comment-255557
Signed-off-by: Kashyap Chamarthy <kchamart at redhat.com>
Commit: c3c0b27f2d34cd106df278afc378c30fe493f513
https://github.com/llvm/llvm-project/commit/c3c0b27f2d34cd106df278afc378c30fe493f513
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/test/Assembler/aarch64-intrinsics-attributes.ll
M llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[Intrinsics] Add support for range attributes (#135642)
Add support for specifying range attributes in Intrinsics.td. Use this
to specify the ucmp/scmp range [-1,2).
This case is trickier than existing intrinsic attributes, because we
need to create the attribute with the correct bitwidth. As such, the
attribute construction now needs to be aware of the function type.
We also need to be careful to no longer assign attributes on intrinsics
with invalid signatures, as we'd make invalid assumptions about the
number of arguments etc otherwise.
Fixes https://github.com/llvm/llvm-project/issues/130179.
Commit: 35f4cdbf59fca82b97869cce7e9e5d5009144938
https://github.com/llvm/llvm-project/commit/35f4cdbf59fca82b97869cce7e9e5d5009144938
Author: Prakhar Dixit <dixitprakhar11 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Add constraints to the MulIOp for preventing type mismatch while folding (#136093)
Fixes #135289
The original version didn't check if the types of lhs, rhs, and the
result matched, which could cause type errors.
This fix adds type checks to make sure the constants attributes have
the same type as the SSA values before applying the simplification.
Commit: 7e5317139d5a96837ede208635daf031ab53eaee
https://github.com/llvm/llvm-project/commit/7e5317139d5a96837ede208635daf031ab53eaee
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/sms-cpy-1.ll
M llvm/test/CodeGen/PowerPC/sms-phi.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p10-respect-unroll-pragma.ll
Log Message:
-----------
[PowerPC] Pre-commit tests for PR130742. NFC. (#135606)
Needed by https://github.com/llvm/llvm-project/pull/130742.
Commit: a09fd9c6536b746deea651b796978285ed161a00
https://github.com/llvm/llvm-project/commit/a09fd9c6536b746deea651b796978285ed161a00
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen][NPM] Port MachineBlockPlacementStats to NPM (#129853)
Commit: 6f91bfcc8aebe61ba4469c48270928f82ee89027
https://github.com/llvm/llvm-project/commit/6f91bfcc8aebe61ba4469c48270928f82ee89027
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
Log Message:
-----------
[LLVM][AArch64ISel] Fix IsLE predicate setting so it does not affect BE codegen. (#135978)
Ensure little endian specific patterns, not just their multi-classes,
are protected by IsLE.
Commit: d69ee885cccecb49f0b288ec634186c35c8ecfb5
https://github.com/llvm/llvm-project/commit/d69ee885cccecb49f0b288ec634186c35c8ecfb5
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nocapture-2.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
Log Message:
-----------
[CaptureTracking] Remove dereferenceable_or_null special case (#135613)
Remove the special case where comparing a dereferenceable_or_null
pointer with null results in captures(none) instead of
captures(address_is_null).
This special case is not entirely correct. Let's say we have an
allocated object of size 2 at address 1 and have a pointer `%p` pointing
either to address 1 or 2. Then passing `gep p, -1` to a
`dereferenceable_or_null(1)` function is well-defined, and allows us to
distinguish between the two possible pointers, capturing information
about the address.
Now that we ignore address captures in alias analysis, I think we're
ready to drop this special case. Additionally, if there are regressions
in other places, the fact that this is inferred as address_is_null
should allow us to easily address them if necessary.
Commit: 90ddb5444030b8d7cca6e91a27994e4fa9a6525d
https://github.com/llvm/llvm-project/commit/90ddb5444030b8d7cca6e91a27994e4fa9a6525d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-constant-p.cpp
Log Message:
-----------
[clang][bytecode] Enter a non-constant context when revisiting (#136104)
Otherwise, things like __builtin_is_constant_evaluated() return the
wrong value.
Commit: eafbb879f676ccd65fe7efae6b5280ae750ef20a
https://github.com/llvm/llvm-project/commit/eafbb879f676ccd65fe7efae6b5280ae750ef20a
Author: John Brawn <john.brawn at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[LoopVectorize] Don't replicate blocks with optsize (#129265)
Any VPlan we generate that contains a replicator region will result in
replicated blocks in the output, causing a large code size increase.
Reject such VPlans when optimizing for size, as the code size impact is
usually worse than having a scalar epilogue, which we already forbid
with optsize.
This change requires a lot of test changes. For tests of optsize
specifically I've updated the test with the new output, otherwise the
tests have been adjusted to not rely on optsize.
Fixes #66652
Commit: c536967af123c30b43f186133e8719e0090f24a6
https://github.com/llvm/llvm-project/commit/c536967af123c30b43f186133e8719e0090f24a6
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/C/C2y/n3369_2.c
A clang/test/C/C2y/n3369_3.c
Log Message:
-----------
Split _Countof tests into two files; NFC
Post-commit review feedback during the language WG meeting requested
that I try to generalize the testing for this rather than only test on
a single target as we previously did.
The tests which are hard to generalize are the VLA tests, so those
still have specific triples in the RUN line, but have more coverage and
a comment explaining that the test should generalize to all targets.
Commit: 4bd9b9e9adf9db1a326e2f2fa616c714beb83c4f
https://github.com/llvm/llvm-project/commit/4bd9b9e9adf9db1a326e2f2fa616c714beb83c4f
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/C/C2y/n3369_2.c
Log Message:
-----------
Fix failing bot with changes to _Countof testing
This addresses the issue found by:
https://lab.llvm.org/buildbot/#/builders/190/builds/18484
Commit: a84a6f7dd68b218757e192fe21a806c80ef0b63d
https://github.com/llvm/llvm-project/commit/a84a6f7dd68b218757e192fe21a806c80ef0b63d
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/test/C/C2y/n3369_2.c
Log Message:
-----------
Fix this _Countof test for 32 vs 64-bits
This should address the issues found by:
https://lab.llvm.org/buildbot/#/builders/154/builds/14958
Commit: 51295d6d56f938b878ca0e2bb0a749eb801e8202
https://github.com/llvm/llvm-project/commit/51295d6d56f938b878ca0e2bb0a749eb801e8202
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/c2y.c
Log Message:
-----------
[clang][bytecode] Reject assignments in C (#136126)
Similar to what the current interpreter does.
Commit: d744596f7da7bb80536d231bd00080870a12112a
https://github.com/llvm/llvm-project/commit/d744596f7da7bb80536d231bd00080870a12112a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[libc][workflows] fix fullbuild by installing clang-20/clang++-20 (#136074)
Commit: f135ce6a9329124f1e508fcad2eedf5326a668fa
https://github.com/llvm/llvm-project/commit/f135ce6a9329124f1e508fcad2eedf5326a668fa
Author: Charles Zablit <zablitcharles at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
Log Message:
-----------
[lldb] Remove CompilerType::GetIndexOfFieldWithName (#135963)
This patch removes the unused `CompilerType::GetIndexOfFieldWithName` API (it wasn't used apart from in a single testcase). Given we have so many similarly named APIs already, it's best not to maintain this API that's not really used (and isnt tested).
Commit: f9c01b59e3d5239a4e42f94d5edbeb3698a81032
https://github.com/llvm/llvm-project/commit/f9c01b59e3d5239a4e42f94d5edbeb3698a81032
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/smallest-and-widest-types.ll
Log Message:
-----------
[LV] Fix '-1U' bits for smallest type in getSmallestAndWidestTypes (#135783)
For loops without loads/stores, where the smallest/widest types are
calculated from the reduction, the smallest type returned is always -1U
and it actually returns the smallest type as the widest type. This PR
fixes the calculation.
This follows from
https://github.com/llvm/llvm-project/pull/132190#discussion_r2044232607
Commit: 23e3cbb2e82b62586266116c8ab77ce68e412cf8
https://github.com/llvm/llvm-project/commit/23e3cbb2e82b62586266116c8ab77ce68e412cf8
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
R mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
M mlir/include/mlir/Transforms/DialectConversion.h
R mlir/include/mlir/Transforms/OneToNTypeConversion.h
M mlir/lib/Dialect/Func/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
R mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Transforms/Utils/CMakeLists.txt
M mlir/lib/Transforms/Utils/DialectConversion.cpp
R mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp
R mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir
R mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
M mlir/test/Transforms/decompose-call-graph-types.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[mlir][Transforms] Delete 1:N dialect conversion driver (#121389)
The 1:N dialect conversion driver has been deprecated. Use the regular
dialect conversion driver instead. This commit deletes the 1:N dialect
conversion driver.
Note for LLVM integration: If you are already using the regular dialect conversion, but still have argument materializations in your code base, simply delete all `addArgumentMaterialization` calls.
For details, see
https://discourse.llvm.org/t/rfc-merging-1-1-and-1-n-dialect-conversions/82513.
Commit: 5a993558c5fa52c605d984e0effdc1cd3b452476
https://github.com/llvm/llvm-project/commit/5a993558c5fa52c605d984e0effdc1cd3b452476
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/store.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstSimplify/gep.ll
Log Message:
-----------
[InstSimplify] Fold `getelementptr inbounds null, idx -> null` (#130742)
Proof: https://alive2.llvm.org/ce/z/5ZkPx-
See also https://github.com/llvm/llvm-project/pull/130734 for the motivation.
Commit: 47f4f39265b31e2249536b74d33d63508cdfb457
https://github.com/llvm/llvm-project/commit/47f4f39265b31e2249536b74d33d63508cdfb457
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR][AMDGPU] Fixing word alignment check for bufferload fastpath (#135982)
`delta_bytes % (32 ceilDiv elementBitwidth) != 0` condition is incorrect
in https://github.com/llvm/llvm-project/pull/135014
For example, last load is issued to load only one last element of fp16.
Then `delta bytes = 2`, `(32 ceildiv 16) = 2`. In this case it will be
judged as word aligned. It will send to fast path but get all zeros for
the fp16 because it cross the word boundary.
In reality the equation should be just `delta_bytes % 4` , since a word
is 4 bytes. This PR fix the bug by amending the mod target to 4.
Commit: fb00fa56b51b191d026eec104905e416bf34bbda
https://github.com/llvm/llvm-project/commit/fb00fa56b51b191d026eec104905e416bf34bbda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
R clang/test/AST/ast-dump-APValue-todo.cpp
Log Message:
-----------
[clang] Implement dump() for MemberPointer APValues (#136130)
Print the member pointer decl and the path.
Commit: 0348ff515854438cab8a48b79e8839cb99d48701
https://github.com/llvm/llvm-project/commit/0348ff515854438cab8a48b79e8839cb99d48701
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/AST/SYCLKernelInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
A clang/lib/CodeGen/CodeGenSYCL.cpp
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/Targets/NVPTX.cpp
A clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
Log Message:
-----------
[SYCL] Basic code generation for SYCL kernel caller offload entry point functions. (#133030)
A function declared with the `sycl_kernel_entry_point` attribute,
sometimes called a SYCL kernel entry point function, specifies a pattern
from which the parameters and body of an offload entry point function,
sometimes called a SYCL kernel caller function, are derived.
SYCL kernel caller functions are emitted during SYCL device compilation.
Their parameters and body are derived from the `SYCLKernelCallStmt`
statement and `OutlinedFunctionDecl` declaration associated with their
corresponding SYCL kernel entry point function. A distinct SYCL kernel
caller function is generated for each SYCL kernel entry point function
defined as a non-inline function or ODR-used in the translation unit.
The name of each SYCL kernel caller function is parameterized by the
SYCL kernel name type specified by the `sycl_kernel_entry_point`
attribute attached to the corresponding SYCL kernel entry point
function. For the moment, the Itanium ABI mangled name for typeinfo data
(`_ZTS<type>`) is used to name these functions; a future change will
switch to a more appropriate naming scheme.
The calling convention used for a SYCL kernel caller function is target
dependent. Support for AMDGCN, NVPTX, and SPIR targets is currently
provided. These functions are required to observe the language
restrictions for SYCL devices as specified by the SYCL 2020
specification; this includes a forward progress guarantee and prohibits
recursion.
Only SYCL kernel caller functions, functions declared as
`SYCL_EXTERNAL`, and functions directly or indirectly referenced from
those functions should be emitted during device compilation. Pruning of
other declarations has not yet been implemented.
---------
Co-authored-by: Elizabeth Andrews <elizabeth.andrews at intel.com>
Commit: 40417915a161e87b398f1cc3e9b7c159207abd77
https://github.com/llvm/llvm-project/commit/40417915a161e87b398f1cc3e9b7c159207abd77
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Preprocessor/embed_weird.cpp
Log Message:
-----------
[clang] Implement StmtPrinter for EmbedExpr (#135957)
Tries to avoid memory leaks previously caused by saving filename by
allocating memory in the preprocessor.
Fixes https://github.com/llvm/llvm-project/issues/132641
Fixes https://github.com/llvm/llvm-project/issues/107869
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 3dfdb4dad5da316a9de88828e9feebca99ba7ae4
https://github.com/llvm/llvm-project/commit/3dfdb4dad5da316a9de88828e9feebca99ba7ae4
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/poison-ops.ll
M llvm/test/CodeGen/X86/pr119158.ll
Log Message:
-----------
[SelectionDAG] Propagate poison in getNode with two operands if the input is poison. (#135387)
Propagation to poison in function `SDValue
SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,SDValue
N1, SDValue N2, const SDNodeFlags Flags) ` if one of the input is
poison.
The patch also revert the test cases
llvm/test/CodeGen/X86/pr119158.ll
llvm/test/CodeGen/X86/half.ll
which are mentioned in
https://github.com/llvm/llvm-project/pull/125883#discussion_r2021390919
---------
Co-authored-by: Amy Kwan <amy.kwan1 at ibm.com>
Commit: ea8b1bf8895aa6b8a5c668577f845e6a13ddc2e9
https://github.com/llvm/llvm-project/commit/ea8b1bf8895aa6b8a5c668577f845e6a13ddc2e9
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
Log Message:
-----------
[X86][FastISel] Refactor bitcast selection into separate function (NFC)
Commit: e6f23b383e0c08ecc380d879035e594019f34211
https://github.com/llvm/llvm-project/commit/e6f23b383e0c08ecc380d879035e594019f34211
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/ErrorOr.h
Log Message:
-----------
Remove names for unused parameters; NFC
Fixes #21393
Commit: 927a0cb8d654fe11dc010dc3d05e200772709ce6
https://github.com/llvm/llvm-project/commit/927a0cb8d654fe11dc010dc3d05e200772709ce6
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
Log Message:
-----------
[LV][NFC] Regenerate AArch64/veclib-* test CHECK lines (#136138)
Commit: bd0b903a91721570e0bc98f7ed8b0aaf2f2a628b
https://github.com/llvm/llvm-project/commit/bd0b903a91721570e0bc98f7ed8b0aaf2f2a628b
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/Frontend/FrontendAction.cpp
Log Message:
-----------
Mark the file opened by DeserializedDeclsSourceRangePrinter as a text file (#135842)
This PR will fix the following lit failure seeing on z/OS and most likely on Windows:
`FAIL: Clang :: Frontend/dump-minimization-hints.cpp`
Without `OF_TextWithCRLF` flag, a file is treated as binary and is read improperly, at least on z/OS.
Commit: 728f6de4177a7e4d8030cb37ace525e2af97d247
https://github.com/llvm/llvm-project/commit/728f6de4177a7e4d8030cb37ace525e2af97d247
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 0348ff515854
Commit: 9ee4fdf4990f7dbdc0cfc30a8f733f676dbdcb51
https://github.com/llvm/llvm-project/commit/9ee4fdf4990f7dbdc0cfc30a8f733f676dbdcb51
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
A flang/test/Fir/CUDA/cuda-stream.mlir
M flang/tools/fir-opt/fir-opt.cpp
Log Message:
-----------
[flang][cuda] Introduce stream cast op (#136050)
Cast a stream object reference as a GPU async token. This is useful to
be able to connect the stream representation of CUDA Fortran and the
async mechanism of the GPU dialect.
This op will later become a no op.
Commit: 10f75b8ef7edc80759b9e916e72e17b1c2e9abcb
https://github.com/llvm/llvm-project/commit/10f75b8ef7edc80759b9e916e72e17b1c2e9abcb
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
A lld/test/ELF/aarch64-execute-only-plt.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-plt.s
Log Message:
-----------
[LLD][ELF][AArch64] Mark .plt and .iplt with PURECODE flag (#134798)
Mark the synthetic sections `.plt` and `.iplt` with the
`SHF_AARCH64_PURECODE` section flag, allowing them to be placed in an
executable-only segment.
Commit: 45f27167bcd312a8691365a63719fab136972692
https://github.com/llvm/llvm-project/commit/45f27167bcd312a8691365a63719fab136972692
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[AArch64][Docs] Add release note for execute-only support on AArch64 (#134799)
Commit: 41675fa5b88dc703b3b1d96de668281582f21f3b
https://github.com/llvm/llvm-project/commit/41675fa5b88dc703b3b1d96de668281582f21f3b
Author: Luke Lau <luke at igalia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
Log Message:
-----------
[VPlan] Simplify vp.merge true, (or x, y), x -> vp.merge y, true, x (#135017)
With EVL tail folding an AnyOf reduction will emit an i1 vp.merge like
vp.merge true, (or phi, cond), phi, evl
We can remove the or and optimise this to
vp.merge cond, true, phi, evl
Which makes it slightly easier to pattern match in #134898.
This also adds a pattern matcher for calls to help match this.
Blended AnyOf reductions will use an and instead of an or, which we may
also be able to simplify in a later patch.
Commit: 8d4b19e3d4a8cee8899d5a293972aef48f9bdb7f
https://github.com/llvm/llvm-project/commit/8d4b19e3d4a8cee8899d5a293972aef48f9bdb7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
Log Message:
-----------
[RISCV] Remove skipFunction from RISCVVMV0Elimination. (#136080)
skipFunction disables the pass for functions with optnone attribute.
This pass is important to correct register allocation so I don't think
it should be disabled.
Commit: 427a7792b15d28a7962e42b5f677bfde9383e975
https://github.com/llvm/llvm-project/commit/427a7792b15d28a7962e42b5f677bfde9383e975
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LLD][Docs] Add release notes for execute-only support on AArch64 (#134804)
Commit: 7daa5010ab6a2ae77ac88ffd84e2cc37a2e11faa
https://github.com/llvm/llvm-project/commit/7daa5010ab6a2ae77ac88ffd84e2cc37a2e11faa
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
A llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] Cleanup and document nvvm.fabs intrinsics, adding f16 support (#135644)
This change unifies the NVVM intrinsics for floating point absolute
value into two new overloaded intrinsics "llvm.nvvm.fabs.*" and
"llvm.nvvm.fabs.ftz.*". Documentation has been added specifying the
semantics of these intrinsics to clarify how they differ from
"llvm.fabs.*". In addition, support for these new intrinsics is
extended to cover the f16 variants.
Commit: 78857e7263ba555fb40b286c6b40fcd35a85a65a
https://github.com/llvm/llvm-project/commit/78857e7263ba555fb40b286c6b40fcd35a85a65a
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
A clang/include/clang/CIR/ABIArgInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/ABIInfo.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/CodeGen/TargetInfo.cpp
A clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/IR/call.cir
A clang/test/CIR/IR/invalid-call.cir
Log Message:
-----------
[CIR] cir.call with scalar return type (#135552)
This PR introduces support for calling functions with a scalar return
type to the upstream. This PR also includes an initial version of
`CIRGenTargetInfo` and related definitions which are essential for the
CIRGen of call ops.
Related to #132487 .
Commit: d83b639b4c62924deef504f46e573e7d995ea10d
https://github.com/llvm/llvm-project/commit/d83b639b4c62924deef504f46e573e7d995ea10d
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Log Message:
-----------
Reland [clang] Unify `SourceLocation` and `IdentifierInfo*` pair-like data structures to `IdentifierLoc` (#136077)
This PR reland https://github.com/llvm/llvm-project/pull/135808, fixed
some missed changes in LLDB.
I found this issue when I working on
https://github.com/llvm/llvm-project/pull/107168.
Currently we have many similiar data structures like:
- std::pair<IdentifierInfo *, SourceLocation>.
- Element type of ModuleIdPath.
- IdentifierLocPair.
- IdentifierLoc.
This PR unify these data structures to IdentifierLoc, moved
IdentifierLoc definition to SourceLocation.h, and deleted other similer
data structures.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 1467b3b0a86fcd4a6b3225fbafd959ee781b5b5c
https://github.com/llvm/llvm-project/commit/1467b3b0a86fcd4a6b3225fbafd959ee781b5b5c
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang][Docs] Add release note for execute-only support on AArch64 (#134802)
Commit: 2007dcfeb86fe272fcd16283f9bca45292e3c630
https://github.com/llvm/llvm-project/commit/2007dcfeb86fe272fcd16283f9bca45292e3c630
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/GVN/pre-invalid-prof-metadata.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
Log Message:
-----------
Reapply [Metadata] Preserve MD_prof when merging instructions when one is missing. (#135418)
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
Also add a legality check when merging prof metadata based on
instruction type. Without this check GVN PRE optimizations result in
prof metadata on phi nodes which break the module verifier.
Build failure caught by
https://lab.llvm.org/buildbot/#/builders/113/builds/6621
```
!9185 = !{!"branch_weights", i32 3912, i32 802}
Wrong number of operands
!9185 = !{!"branch_weights", i32 3912, i32 802}
fatal error: error in backend: Broken module found, compilation aborted!
```
Reverts #134200 with additional changes.
Commit: 909a9feda9292be8a7322f07dd167a603309b541
https://github.com/llvm/llvm-project/commit/909a9feda9292be8a7322f07dd167a603309b541
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/AArch64/ubsan-handler-pass-by-ref.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
A clang/test/CodeGen/ubsan-attr.cpp
Log Message:
-----------
[Reland][Clang][CodeGen][UBSan] Add more precise attributes to recoverable ubsan handlers (#135135)
This patch relands https://github.com/llvm/llvm-project/pull/130990.
If the check value is passed by reference, add `memory(read)`.
Original PR description:
This patch adds `memory(argmem: read, inaccessiblemem: readwrite)` to
**recoverable** ubsan handlers in order to unblock some
memory/loop optimizations. It provides an average of 3% performance
improvement on llvm-test-suite (except for 49 test failures due to ubsan
diagnostics).
Commit: ecbd2d5e148cc1f2e5795d13d752e2a1c79cce1a
https://github.com/llvm/llvm-project/commit/ecbd2d5e148cc1f2e5795d13d752e2a1c79cce1a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[clang][ExprConst] Diagnose ptr subs with non-zero offset (#135938)
The attached test case was missing the note.
Commit: 70e2acf0c5650b8862c41f2697a9e0485ecb17be
https://github.com/llvm/llvm-project/commit/70e2acf0c5650b8862c41f2697a9e0485ecb17be
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check if operator delete calls are in the right frame (#136141)
This is only permitted in a std::allocator::deallocate frame.
Commit: a9dff35ad251cd20376ab25b26d1e5394e18ff4c
https://github.com/llvm/llvm-project/commit/a9dff35ad251cd20376ab25b26d1e5394e18ff4c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M clang/docs/CommandGuide/clang.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/extend-variable-liveness.c
Log Message:
-----------
[Clang] Enable -fextend-lifetimes at -Og (#118026)
Recently, a new flag -fextend-variable-liveness was added that prevents
optimizations from removing the values of source variables in some cases,
improving the quality of debugging for optimized builds where it is
enabled.
Following the inclusion of the flag, this patch enables it by default
when `-Og` is set. Currently, `-Og` is equivalent to `-O1` - it is
effectively just an alias. By enabling `-fextend-lifetimes`, this patch
changes the code generated by Clang with `-Og` to have reduced
optimization and greater debuggability than `-O1`, differentiating the
two according to their respective purposes. This idea was discussed
previously on Discourse where there was general agreement with the
principle of this change:
https://discourse.llvm.org/t/rfc-redefine-og-o1-and-add-a-new-level-of-og
Commit: 1fcf78d15318e3fbe384c635a0ae651be89d0686
https://github.com/llvm/llvm-project/commit/1fcf78d15318e3fbe384c635a0ae651be89d0686
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
Log Message:
-----------
[SLP]Cache data for compressed loads before codegen
Need to cache and use cached data for compressed loads before codegen to
avoid side-effects, caused by the earlier vectorization, which may
affect the analysis.
Commit: 83116209331ad6a5a45f1b8735ad5bce9e6ef761
https://github.com/llvm/llvm-project/commit/83116209331ad6a5a45f1b8735ad5bce9e6ef761
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M lldb/source/Host/common/Editline.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb] Fix lock inversion between statusline mutex and output mutex (#135956)
Fix a deadlock between the statusline mutex (in Debugger) and the output
file mutex (in LockedStreamFile). The deadlock occurs when the main
thread is calling the statusline callback while holding the output mutex
in Editline, while the default event thread is trying to update the
statusline.
Extend the uncritical section so we can redraw the statusline there.
The loop in Editline::GetCharacter should be unnecessary. It would only
loop if we had a successful read with length zero, which shouldn't be
possible or when we can't convert a partial UTF-8 character, in which
case we bail out.
rdar://149251156
Commit: 168092e2ba432c0995806470790fa5aef3d7315b
https://github.com/llvm/llvm-project/commit/168092e2ba432c0995806470790fa5aef3d7315b
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/test/CodeGen/DirectX/legalize-freeze.ll
Log Message:
-----------
[DirectX] Legalize Freeze instruction (#136043)
fixes #135719
LLVM 3.7 did not have a freeze instruction
Further this instruction is really only used as syntactic sugar
in LLVM's optimizer passes to not aggressively optimize things that
could be undef or poison ie x*2 to x+x.
Most backends treat it as a no-op so we will do the same
by removing it and replacing its uses with its input.
Commit: 1267facdc6f254fd9bd85cd8a033e7128b6e053d
https://github.com/llvm/llvm-project/commit/1267facdc6f254fd9bd85cd8a033e7128b6e053d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove duplicate dependency (#136152)
AffineDialect was duplicated in the deps list since
47f4f39265b31e2249536b74d33d63508cdfb457
Commit: 5fe91f1b5948591b75416ce529b3179234c8d93d
https://github.com/llvm/llvm-project/commit/5fe91f1b5948591b75416ce529b3179234c8d93d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/catchswitch-block-in-use.ll
Log Message:
-----------
[SLP]Check for catchswitch block before doing the analysis of the instructions
Need to skip the analysis of the catchswitch blocks to avoid a compiler
crash when trying to get the first instruction in the block.
Commit: 1f224d889dfa89a293e3efa5b04740f634454370
https://github.com/llvm/llvm-project/commit/1f224d889dfa89a293e3efa5b04740f634454370
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
A llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
Log Message:
-----------
[DebugInfo][IndVarSimplify] Propagate source loc when simplifying rem (#135399)
When IndVarSimplify simplifies a rem of the induction variable to a cmp
and select, only the select currently receives the rem's source
location; this patch propagates it to the cmp as well.
Found using https://github.com/llvm/llvm-project/pull/107279.
Commit: 8210ca019839fc5430b3a95d7caf5c829df3232a
https://github.com/llvm/llvm-project/commit/8210ca019839fc5430b3a95d7caf5c829df3232a
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/ctlz.ll
Log Message:
-----------
[SPARC] Use lzcnt to implement CTLZ when we have VIS3
Reviewers: s-barannikov, brad0, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135715
Commit: 2ef01048624dc2a564d5925d082a72a51bb97c48
https://github.com/llvm/llvm-project/commit/2ef01048624dc2a564d5925d082a72a51bb97c48
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-17 (Thu, 17 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/bitcast.ll
Log Message:
-----------
[SPARC] Use native bitcast instructions when we have VIS3
Reviewers: brad0, s-barannikov, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135716
Commit: 200c5da4f803659cf150bf67032909f2acdb8750
https://github.com/llvm/llvm-project/commit/200c5da4f803659cf150bf67032909f2acdb8750
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
A .clang-format-ignore
M .github/workflows/libc-fullbuild-tests.yml
M bolt/CMakeLists.txt
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/runtime/CMakeLists.txt
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
A bolt/runtime/sys_riscv64.h
A bolt/test/runtime/RISCV/basic-instrumentation.s
A bolt/test/runtime/RISCV/instrumentation-ind-call.c
A bolt/test/runtime/RISCV/lit.local.cfg
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-tidy/modernize/UseConstraintsCheck.cpp
M clang/docs/CommandGuide/clang.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
A clang/include/clang/CIR/ABIArgInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Driver/Types.def
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Basic/Targets/SystemZ.h
A clang/lib/CIR/CodeGen/ABIInfo.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/CodeGen/TargetInfo.cpp
A clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
A clang/lib/CodeGen/CodeGenSYCL.cpp
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
A clang/test/AST/ByteCode/c2y.c
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/private.hlsl
M clang/test/AST/ast-dump-APValue-lvalue.cpp
R clang/test/AST/ast-dump-APValue-todo.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/C/C2y/n3369_2.c
A clang/test/C/C2y/n3369_3.c
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/struct.c
M clang/test/CIR/IR/call.cir
A clang/test/CIR/IR/invalid-call.cir
M clang/test/CXX/drs/cwg23xx.cpp
A clang/test/CodeGen/AArch64/ubsan-handler-pass-by-ref.c
A clang/test/CodeGen/SystemZ/Float16.c
A clang/test/CodeGen/SystemZ/fp16.c
M clang/test/CodeGen/SystemZ/strictfp_builtins.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/ubsan-attr.cpp
A clang/test/CodeGenCXX/local-class-instantiation.cpp
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/GlobalConstructors.hlsl
M clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
M clang/test/CodeGenHLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/cbuffer_align.hlsl
M clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
M clang/test/CodeGenHLSL/inline-functions.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M clang/test/CodeGenOpenCL/spir32_target.cl
M clang/test/CodeGenOpenCL/spir64_target.cl
M clang/test/CodeGenOpenCL/spirv_target.cl
A clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/HLSL/metal-converter.hlsl
M clang/test/Driver/dxc_D.hlsl
M clang/test/Driver/dxc_dxv_path.hlsl
M clang/test/Driver/dxc_options.hlsl
M clang/test/Driver/extend-variable-liveness.c
M clang/test/Driver/fortran.f95
M clang/test/Driver/hlsl-lang-targets.hlsl
M clang/test/Driver/sanitizer-ld.c
A clang/test/Modules/macro-identifier-hiding.c
M clang/test/ParserHLSL/cb_error.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserHLSL/invalid_inside_cb.hlsl
M clang/test/Preprocessor/embed_weird.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/hlsl_resource_t.hlsl
M clang/test/SemaHLSL/Language/AggregateSplatCast-errors.hlsl
A clang/test/SemaHLSL/Language/ImpCastAddrSpace.hlsl
M clang/test/SemaHLSL/cb_error.hlsl
M clang/test/SemaHLSL/export.hlsl
M clang/test/SemaHLSL/packoffset-invalid.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_basic.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_silence_diags.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_space.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
A clang/test/SemaHLSL/resource_binding_implicit.hlsl
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/dependent-template-recover.cpp
M clang/test/SemaTemplate/elaborated-type-specifier.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
M clang/unittests/Format/FormatTest.cpp
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/clear_cache.c
A compiler-rt/lib/builtins/extendhfdf2.c
M compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/addtf3_test.c
A compiler-rt/test/builtins/Unit/extendhfdf2_test.c
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
M flang/test/Driver/phases.f90
M flang/test/Driver/pp-fixed-form.f90
A flang/test/Fir/CUDA/cuda-stream.mlir
A flang/test/Fir/tbaa-codegen-records.fir
M flang/test/Semantics/OpenMP/cancel.f90
M flang/tools/fir-opt/fir-opt.cpp
M libc/src/__support/common.h
M libc/src/stdio/printf_core/float_dec_converter.h
M lld/ELF/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/ELF/aarch64-execute-only-plt.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-plt.s
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/source/Host/common/Editline.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/ObjC/NSString.cpp
M lldb/source/Plugins/Language/ObjC/NSString.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/lang/objc/foundation/tagged/strings/Makefile
A lldb/test/API/lang/objc/foundation/tagged/strings/TestObjCTaggedStrings.py
A lldb/test/API/lang/objc/foundation/tagged/strings/main.m
M lldb/test/requirements.txt
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
A llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/ErrorOr.h
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/DXContainerPSVInfo.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZFeatures.td
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFP.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ17.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Assembler/aarch64-intrinsics-attributes.ll
M llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-ldst-one.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/arm64-st1.ll
M llvm/test/CodeGen/AArch64/bitcast-v2i8.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/dp1.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pr-cf624b2.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/setcc-type-mismatch.ll
A llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-ld1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/AArch64/vec_uaddo.ll
M llvm/test/CodeGen/AArch64/vec_umulo.ll
M llvm/test/CodeGen/AArch64/vector-compress.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
A llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-MultipleEntryFunctions.ll
A llvm/test/CodeGen/DirectX/legalize-freeze.ll
M llvm/test/CodeGen/Hexagon/64bit_tstbit.ll
M llvm/test/CodeGen/Hexagon/always-ext.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-concat-multiple.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-q-legalization-loop.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-terminator.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-use-in-different-block.ll
M llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
M llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/NVPTX/bug22246.ll
A llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
A llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/sms-cpy-1.ll
M llvm/test/CodeGen/PowerPC/sms-phi.ll
M llvm/test/CodeGen/SPARC/float-vis3.ll
M llvm/test/CodeGen/SystemZ/asm-10.ll
M llvm/test/CodeGen/SystemZ/asm-17.ll
M llvm/test/CodeGen/SystemZ/asm-19.ll
A llvm/test/CodeGen/SystemZ/atomic-load-10.ll
A llvm/test/CodeGen/SystemZ/atomic-store-10.ll
A llvm/test/CodeGen/SystemZ/atomicrmw-fadd-04.ll
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
M llvm/test/CodeGen/SystemZ/fp-abs-01.ll
M llvm/test/CodeGen/SystemZ/fp-abs-03.ll
M llvm/test/CodeGen/SystemZ/fp-abs-04.ll
M llvm/test/CodeGen/SystemZ/fp-add-01.ll
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-conv-20.ll
A llvm/test/CodeGen/SystemZ/fp-copysign-03.ll
M llvm/test/CodeGen/SystemZ/fp-div-01.ll
A llvm/test/CodeGen/SystemZ/fp-half-cmp.ll
A llvm/test/CodeGen/SystemZ/fp-half-libcall.ll
A llvm/test/CodeGen/SystemZ/fp-half-mem.ll
A llvm/test/CodeGen/SystemZ/fp-half-move.ll
A llvm/test/CodeGen/SystemZ/fp-half-strict.ll
A llvm/test/CodeGen/SystemZ/fp-half-vector.ll
A llvm/test/CodeGen/SystemZ/fp-half.ll
M llvm/test/CodeGen/SystemZ/fp-libcall.ll
M llvm/test/CodeGen/SystemZ/fp-mul-01.ll
M llvm/test/CodeGen/SystemZ/fp-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-mul-08.ll
M llvm/test/CodeGen/SystemZ/fp-mul-10.ll
A llvm/test/CodeGen/SystemZ/fp-mul-15.ll
M llvm/test/CodeGen/SystemZ/fp-neg-01.ll
M llvm/test/CodeGen/SystemZ/fp-neg-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-17.ll
M llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
M llvm/test/CodeGen/SystemZ/fp-sub-01.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting.ll
M llvm/test/CodeGen/SystemZ/is_fpclass.ll
A llvm/test/CodeGen/SystemZ/spill-half-01.mir
A llvm/test/CodeGen/SystemZ/spill-half-02.mir
M llvm/test/CodeGen/SystemZ/stackmap.ll
M llvm/test/CodeGen/SystemZ/tdc-01.ll
M llvm/test/CodeGen/SystemZ/tdc-02.ll
M llvm/test/CodeGen/SystemZ/tdc-03.ll
M llvm/test/CodeGen/SystemZ/tdc-04.ll
M llvm/test/CodeGen/SystemZ/tdc-05.ll
M llvm/test/CodeGen/SystemZ/tdc-06.ll
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/SystemZ/vec-max-05.ll
M llvm/test/CodeGen/SystemZ/vec-min-05.ll
M llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
M llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/poison-ops.ll
M llvm/test/CodeGen/X86/pr119158.ll
M llvm/test/Instrumentation/ThreadSanitizer/capture.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/ObjectYAML/DXContainer/RootSignature-Flags.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidType.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidVisibility.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-MultipleParameters.yaml
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nocapture-2.ll
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
A llvm/test/Transforms/GVN/pre-invalid-prof-metadata.ll
A llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/store.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p10-respect-unroll-pragma.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/smallest-and-widest-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation-invalid-roots.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
A llvm/test/Transforms/SLPVectorizer/X86/catchswitch-block-in-use.ll
A llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
M llvm/tools/llvm-xray/xray-stacks.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/obj2yaml/dxcontainer2yaml.cpp
M llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/DebugInfo/PDB/HashTableTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Transforms/IPO/LowerTypeTests.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M mlir/include/mlir-c/Dialect/SMT.h
M mlir/include/mlir-c/Target/ExportSMTLIB.h
R mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Transforms/DialectConversion.h
R mlir/include/mlir/Transforms/OneToNTypeConversion.h
A mlir/lib/Bindings/Python/DialectSMT.cpp
M mlir/lib/CAPI/Dialect/SMT.cpp
M mlir/lib/CAPI/Target/ExportSMTLIB.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Func/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
R mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Utils/CMakeLists.txt
M mlir/lib/Transforms/Utils/DialectConversion.cpp
R mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SMTOps.td
A mlir/python/mlir/dialects/smt.py
M mlir/test/CAPI/smt.c
R mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir
R mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
A mlir/test/Target/ExportSMTLIB/attributes.mlir
A mlir/test/Target/ExportSMTLIB/basic.mlir
A mlir/test/Target/ExportSMTLIB/lit.local.cfg
A mlir/test/Target/LLVMIR/Import/uwtable.ll
M mlir/test/Target/LLVMIR/rocdl.mlir
A mlir/test/Target/LLVMIR/uwtable.mlir
M mlir/test/Transforms/decompose-call-graph-types.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
A mlir/test/python/dialects/smt.py
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5
[skip ci]
Commit: 6eed4657d38af8d7e95c37845bd88e41a03648bb
https://github.com/llvm/llvm-project/commit/6eed4657d38af8d7e95c37845bd88e41a03648bb
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-20 (Sun, 20 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
A .clang-format-ignore
M .github/workflows/libc-fullbuild-tests.yml
M bolt/CMakeLists.txt
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/runtime/CMakeLists.txt
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
A bolt/runtime/sys_riscv64.h
A bolt/test/runtime/RISCV/basic-instrumentation.s
A bolt/test/runtime/RISCV/instrumentation-ind-call.c
A bolt/test/runtime/RISCV/lit.local.cfg
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-tidy/modernize/UseConstraintsCheck.cpp
M clang/docs/CommandGuide/clang.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
A clang/include/clang/CIR/ABIArgInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Driver/Types.def
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Basic/Targets/SystemZ.h
A clang/lib/CIR/CodeGen/ABIInfo.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
A clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/CodeGen/TargetInfo.cpp
A clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
A clang/lib/CodeGen/CodeGenSYCL.cpp
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
A clang/test/AST/ByteCode/c2y.c
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/private.hlsl
M clang/test/AST/ast-dump-APValue-lvalue.cpp
R clang/test/AST/ast-dump-APValue-todo.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/C/C2y/n3369_2.c
A clang/test/C/C2y/n3369_3.c
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/struct.c
M clang/test/CIR/IR/call.cir
A clang/test/CIR/IR/invalid-call.cir
M clang/test/CXX/drs/cwg23xx.cpp
A clang/test/CodeGen/AArch64/ubsan-handler-pass-by-ref.c
A clang/test/CodeGen/SystemZ/Float16.c
A clang/test/CodeGen/SystemZ/fp16.c
M clang/test/CodeGen/SystemZ/strictfp_builtins.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/ubsan-attr.cpp
A clang/test/CodeGenCXX/local-class-instantiation.cpp
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/GlobalConstructors.hlsl
M clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
M clang/test/CodeGenHLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/cbuffer_align.hlsl
M clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
M clang/test/CodeGenHLSL/inline-functions.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M clang/test/CodeGenOpenCL/spir32_target.cl
M clang/test/CodeGenOpenCL/spir64_target.cl
M clang/test/CodeGenOpenCL/spirv_target.cl
A clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/HLSL/metal-converter.hlsl
M clang/test/Driver/dxc_D.hlsl
M clang/test/Driver/dxc_dxv_path.hlsl
M clang/test/Driver/dxc_options.hlsl
M clang/test/Driver/extend-variable-liveness.c
M clang/test/Driver/fortran.f95
M clang/test/Driver/hlsl-lang-targets.hlsl
M clang/test/Driver/sanitizer-ld.c
A clang/test/Modules/macro-identifier-hiding.c
M clang/test/ParserHLSL/cb_error.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserHLSL/invalid_inside_cb.hlsl
M clang/test/Preprocessor/embed_weird.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/hlsl_resource_t.hlsl
M clang/test/SemaHLSL/Language/AggregateSplatCast-errors.hlsl
A clang/test/SemaHLSL/Language/ImpCastAddrSpace.hlsl
M clang/test/SemaHLSL/cb_error.hlsl
M clang/test/SemaHLSL/export.hlsl
M clang/test/SemaHLSL/packoffset-invalid.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_basic.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_silence_diags.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_space.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
A clang/test/SemaHLSL/resource_binding_implicit.hlsl
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/dependent-template-recover.cpp
M clang/test/SemaTemplate/elaborated-type-specifier.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
M clang/unittests/Format/FormatTest.cpp
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/clear_cache.c
A compiler-rt/lib/builtins/extendhfdf2.c
M compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/addtf3_test.c
A compiler-rt/test/builtins/Unit/extendhfdf2_test.c
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
M flang/test/Driver/phases.f90
M flang/test/Driver/pp-fixed-form.f90
A flang/test/Fir/CUDA/cuda-stream.mlir
A flang/test/Fir/tbaa-codegen-records.fir
M flang/test/Semantics/OpenMP/cancel.f90
M flang/tools/fir-opt/fir-opt.cpp
M libc/src/__support/common.h
M libc/src/stdio/printf_core/float_dec_converter.h
M lld/ELF/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/ELF/aarch64-execute-only-plt.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-plt.s
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/source/Host/common/Editline.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/ObjC/NSString.cpp
M lldb/source/Plugins/Language/ObjC/NSString.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/lang/objc/foundation/tagged/strings/Makefile
A lldb/test/API/lang/objc/foundation/tagged/strings/TestObjCTaggedStrings.py
A lldb/test/API/lang/objc/foundation/tagged/strings/main.m
M lldb/test/requirements.txt
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
A llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/ErrorOr.h
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/DXContainerPSVInfo.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZFeatures.td
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFP.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ17.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Assembler/aarch64-intrinsics-attributes.ll
M llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-ldst-one.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/arm64-st1.ll
M llvm/test/CodeGen/AArch64/bitcast-v2i8.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/dp1.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pr-cf624b2.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/setcc-type-mismatch.ll
A llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-ld1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/AArch64/vec_uaddo.ll
M llvm/test/CodeGen/AArch64/vec_umulo.ll
M llvm/test/CodeGen/AArch64/vector-compress.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
A llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-MultipleEntryFunctions.ll
A llvm/test/CodeGen/DirectX/legalize-freeze.ll
M llvm/test/CodeGen/Hexagon/64bit_tstbit.ll
M llvm/test/CodeGen/Hexagon/always-ext.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-concat-multiple.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-q-legalization-loop.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-terminator.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-use-in-different-block.ll
M llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
M llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/NVPTX/bug22246.ll
A llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
A llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/sms-cpy-1.ll
M llvm/test/CodeGen/PowerPC/sms-phi.ll
M llvm/test/CodeGen/SPARC/cttz.ll
M llvm/test/CodeGen/SPARC/float-vis3.ll
M llvm/test/CodeGen/SystemZ/asm-10.ll
M llvm/test/CodeGen/SystemZ/asm-17.ll
M llvm/test/CodeGen/SystemZ/asm-19.ll
A llvm/test/CodeGen/SystemZ/atomic-load-10.ll
A llvm/test/CodeGen/SystemZ/atomic-store-10.ll
A llvm/test/CodeGen/SystemZ/atomicrmw-fadd-04.ll
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
M llvm/test/CodeGen/SystemZ/fp-abs-01.ll
M llvm/test/CodeGen/SystemZ/fp-abs-03.ll
M llvm/test/CodeGen/SystemZ/fp-abs-04.ll
M llvm/test/CodeGen/SystemZ/fp-add-01.ll
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-conv-20.ll
A llvm/test/CodeGen/SystemZ/fp-copysign-03.ll
M llvm/test/CodeGen/SystemZ/fp-div-01.ll
A llvm/test/CodeGen/SystemZ/fp-half-cmp.ll
A llvm/test/CodeGen/SystemZ/fp-half-libcall.ll
A llvm/test/CodeGen/SystemZ/fp-half-mem.ll
A llvm/test/CodeGen/SystemZ/fp-half-move.ll
A llvm/test/CodeGen/SystemZ/fp-half-strict.ll
A llvm/test/CodeGen/SystemZ/fp-half-vector.ll
A llvm/test/CodeGen/SystemZ/fp-half.ll
M llvm/test/CodeGen/SystemZ/fp-libcall.ll
M llvm/test/CodeGen/SystemZ/fp-mul-01.ll
M llvm/test/CodeGen/SystemZ/fp-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-mul-08.ll
M llvm/test/CodeGen/SystemZ/fp-mul-10.ll
A llvm/test/CodeGen/SystemZ/fp-mul-15.ll
M llvm/test/CodeGen/SystemZ/fp-neg-01.ll
M llvm/test/CodeGen/SystemZ/fp-neg-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmp-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmps-04.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-05.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-07.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-08.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-13.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
M llvm/test/CodeGen/SystemZ/fp-strict-conv-17.ll
M llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
M llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
M llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
M llvm/test/CodeGen/SystemZ/fp-sub-01.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting.ll
M llvm/test/CodeGen/SystemZ/is_fpclass.ll
A llvm/test/CodeGen/SystemZ/spill-half-01.mir
A llvm/test/CodeGen/SystemZ/spill-half-02.mir
M llvm/test/CodeGen/SystemZ/stackmap.ll
M llvm/test/CodeGen/SystemZ/tdc-01.ll
M llvm/test/CodeGen/SystemZ/tdc-02.ll
M llvm/test/CodeGen/SystemZ/tdc-03.ll
M llvm/test/CodeGen/SystemZ/tdc-04.ll
M llvm/test/CodeGen/SystemZ/tdc-05.ll
M llvm/test/CodeGen/SystemZ/tdc-06.ll
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/SystemZ/vec-max-05.ll
M llvm/test/CodeGen/SystemZ/vec-min-05.ll
M llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
M llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/poison-ops.ll
M llvm/test/CodeGen/X86/pr119158.ll
M llvm/test/Instrumentation/ThreadSanitizer/capture.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/ObjectYAML/DXContainer/RootSignature-Flags.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidType.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-InvalidVisibility.yaml
A llvm/test/ObjectYAML/DXContainer/RootSignature-MultipleParameters.yaml
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nocapture-2.ll
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
A llvm/test/Transforms/GVN/pre-invalid-prof-metadata.ll
A llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/store.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p10-respect-unroll-pragma.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/smallest-and-widest-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation-invalid-roots.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
A llvm/test/Transforms/SLPVectorizer/X86/catchswitch-block-in-use.ll
A llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
A llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
M llvm/tools/llvm-xray/xray-stacks.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/obj2yaml/dxcontainer2yaml.cpp
M llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/DebugInfo/PDB/HashTableTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Transforms/IPO/LowerTypeTests.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M mlir/include/mlir-c/Dialect/SMT.h
M mlir/include/mlir-c/Target/ExportSMTLIB.h
R mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Transforms/DialectConversion.h
R mlir/include/mlir/Transforms/OneToNTypeConversion.h
A mlir/lib/Bindings/Python/DialectSMT.cpp
M mlir/lib/CAPI/Dialect/SMT.cpp
M mlir/lib/CAPI/Target/ExportSMTLIB.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Func/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
R mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/Utils/CMakeLists.txt
M mlir/lib/Transforms/Utils/DialectConversion.cpp
R mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SMTOps.td
A mlir/python/mlir/dialects/smt.py
M mlir/test/CAPI/smt.c
R mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir
R mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-transpose.mlir
A mlir/test/Target/ExportSMTLIB/attributes.mlir
A mlir/test/Target/ExportSMTLIB/basic.mlir
A mlir/test/Target/ExportSMTLIB/lit.local.cfg
A mlir/test/Target/LLVMIR/Import/uwtable.ll
M mlir/test/Target/LLVMIR/rocdl.mlir
A mlir/test/Target/LLVMIR/uwtable.mlir
M mlir/test/Transforms/decompose-call-graph-types.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
R mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
A mlir/test/python/dialects/smt.py
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Move FIXME comment
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/a6f8d210e9a6...6eed4657d38a
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list