[all-commits] [llvm/llvm-project] 9bdd9d: AMDGPU: Mark workitem ID intrinsics with range att...
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Fri Apr 18 03:28:00 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 9bdd9dc895ade41ec24f1a9918f70b23271ac89b
https://github.com/llvm/llvm-project/commit/9bdd9dc895ade41ec24f1a9918f70b23271ac89b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-r600.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
Log Message:
-----------
AMDGPU: Mark workitem ID intrinsics with range attribute (#136196)
This avoids the need to have special handling at every use site.
Unfortunately this means we unnecessarily emit AssertZext in the DAG
(where we already directly understand the range of the intrinsic), andt
we regress in undefined cases as we don't fold out asserts on undef.
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