[all-commits] [llvm/llvm-project] a04580: [AMDGPU] Implement vop3p complex pattern optmizati...
Shoreshen via All-commits
all-commits at lists.llvm.org
Thu Apr 17 19:56:42 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a04580f71b98bdb12100da66c9975e9a1001b4d6
https://github.com/llvm/llvm-project/commit/a04580f71b98bdb12100da66c9975e9a1001b4d6
Author: Shoreshen <372660931 at qq.com>
Date: 2025-04-18 (Fri, 18 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
Log Message:
-----------
[AMDGPU] Implement vop3p complex pattern optmization for gisel (#130234)
Seeking opportunities to optimize VOP3P instructions by altering opsel,
opsel_hi, neg, neg_hi bits
Tests differences:
1. fix op_sel_hi bit for inline constant:
1. `CodeGen/AMDGPU/packed-fp32.ll`
2. use neg bit to remove xor with 0x80008000
1. `CodeGen/AMDGPU/strict_fsub.f16.ll`
2. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll`
3. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll`
4. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll`
5. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll`
6. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll`
7. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll`
3. Remove xor 0x80008000, and use opsel, opsel_hi to remove alignbit
1. `CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll`
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