[all-commits] [llvm/llvm-project] 6f91bf: [LLVM][AArch64ISel] Fix IsLE predicate setting so ...

[Paul Walker via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6f91bfcc8aebe61ba4469c48270928f82ee89027
      https://github.com/llvm/llvm-project/commit/6f91bfcc8aebe61ba4469c48270928f82ee89027
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2025-04-17 (Thu, 17 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll

  Log Message:
  -----------
  [LLVM][AArch64ISel] Fix IsLE predicate setting so it does not affect BE codegen. (#135978)

Ensure little endian specific patterns, not just their multi-classes,
are protected by IsLE.



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