[all-commits] [llvm/llvm-project] 42ad82: [mlir][tosa] Add verifier check for Slice Op (#135...

[Tai Ly via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 42ad82bb059f1ba454c6f7d882984f38d6099d88
      https://github.com/llvm/llvm-project/commit/42ad82bb059f1ba454c6f7d882984f38d6099d88
  Author: Tai Ly <tai.ly at arm.com>
  Date:   2025-04-16 (Wed, 16 Apr 2025)

  Changed paths:
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Dialect/Tosa/invalid.mlir
    M mlir/test/Dialect/Tosa/verifier.mlir

  Log Message:
  -----------
  [mlir][tosa] Add verifier check for Slice Op (#135853)

Add verifier check for Slice Op to make sure input1 and output have same
ranks.
Added test in verifier.mlir
Also moved existing slice verifier tests in invalid.mlir to verfier.mlir

Signed-off-by: Tai Ly <tai.ly at arm.com>



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