[all-commits] [llvm/llvm-project] 40460a: [RISCV] Add basic ISel patterns for Xqcilo instruc...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Wed Apr 16 08:10:59 PDT 2025
Branch: refs/heads/users/vitalybuka/spr/main.nfccfi-dont-mix-cfi-and-non-cfi-flags-on-the-same-line
Home: https://github.com/llvm/llvm-project
Commit: 40460a5cf76c973a783fb2f5229e1076398df96e
https://github.com/llvm/llvm-project/commit/40460a5cf76c973a783fb2f5229e1076398df96e
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilo.ll
Log Message:
-----------
[RISCV] Add basic ISel patterns for Xqcilo instructions (#135901)
This patch adds basic instruction selection patterns for generating the
48 bit load/store instructions that are a part of the Qualcomm uC Xqcilo
vendor extension.
Commit: 123b0e2a1e9de7465be8fb337a80d5d8984f93ae
https://github.com/llvm/llvm-project/commit/123b0e2a1e9de7465be8fb337a80d5d8984f93ae
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
Log Message:
-----------
Reapply "[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vector types (#132358)" (#135758)
reapply https://github.com/llvm/llvm-project/pull/132358, tests updated.
Commit: f3c77445791b510858561cb424ffa1cd7513250b
https://github.com/llvm/llvm-project/commit/f3c77445791b510858561cb424ffa1cd7513250b
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
A clang/test/Sema/complex-div-warn-higher-precision.cpp
Log Message:
-----------
[Clang][Sema] Fix -Whigher-precision-for-complex-division (#131477)
- Fix false positive when divisor is a real number.
- Fix false negative when divident is real, but divisor is complex.
- Fix false negative when due to promotion the division is performed in
higher precision than the divident.
- Fix false negative in divide and assign (`a /= b`).
Fixes: #131127
---------
Co-authored-by: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Commit: dfb5b6e27ca3f8b79ebd3346d11b3088c1600b81
https://github.com/llvm/llvm-project/commit/dfb5b6e27ca3f8b79ebd3346d11b3088c1600b81
Author: leecheechen <chenli at loongson.cn>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/prefetchi.ll
Log Message:
-----------
[LoongArch] Don't crash on instruction prefetch intrinsics (#135760)
Instead of failing to select during isel, drop the intrinsic in
lowering.
Similar as the X86's PR. Seeing: https://reviews.llvm.org/D151050.
Fixes #134624
Commit: 9e650349bfdcd34998c461e1441f02a79c664d38
https://github.com/llvm/llvm-project/commit/9e650349bfdcd34998c461e1441f02a79c664d38
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[mlir] Construct SmallVector with ArrayRef (NFC) (#135899)
Commit: 52e3f3d68cbabf81c4c118cfb823828f03b712c4
https://github.com/llvm/llvm-project/commit/52e3f3d68cbabf81c4c118cfb823828f03b712c4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
Log Message:
-----------
[mlir] Use llvm::make_first_range (NFC) (#135900)
Commit: ac4712482e3ff886eee7c044dd33dd4b5d648036
https://github.com/llvm/llvm-project/commit/ac4712482e3ff886eee7c044dd33dd4b5d648036
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCFixup.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
Log Message:
-----------
[LoongArch] Use FirstRelocationKind to remove ELFObjectWriter::recordRelocation special case
The current implementation of R_LARCH_SUB{8,16,32,64} and TLS relocation types relies on fixup kinds FirstLiteralRelocationKind + offset (originally intended for .reloc directives). While this is clever and prevents switch cases like
```
case fixup_...sub8:
return ELF::R_LARCH_SUB8;
```
it needs revision.
GNU Assembler treats .reloc directives differently from standard relocations, notably by skipping
* Skipping STT_SECTION adjustments (when a referenced symbol is local and satisfies certain conditions, it can be redirected to a section symbol).
* Skipping STT_TLS symbol type setting for TLS relocations.
Encode relocatin type t with FirstRelocationKind+t instead of
FirstLiteralRelocationKind+t. The new value is less than
FirstLiteralRelocationKind and will not be treated as a .reloc
directive.
Close #135521
Commit: a56f966417bc53051fa39e3db6fcc95f9abf0b5c
https://github.com/llvm/llvm-project/commit/a56f966417bc53051fa39e3db6fcc95f9abf0b5c
Author: Mythreya <git at mythreya.dev>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/ConfigFragment.h
Log Message:
-----------
[clangd][docs] Fix incorrect docstring for header-insertion "Never" (#135921)
Docstring fix for changes introduced in PR #128503
Commit: 05eafd9f2b14f2e8d2d95f46465c5cc53aafbc56
https://github.com/llvm/llvm-project/commit/05eafd9f2b14f2e8d2d95f46465c5cc53aafbc56
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/test/AST/ByteCode/codegen.cpp
Log Message:
-----------
[clang][bytecode] Explicitly mark constexpr-unknown variables as such (#135806)
Instead of trying to figure out what's constexpr-unknown later on.
Commit: c1fc4c6a69c6ca0ae6aa060e4377ab5040505a66
https://github.com/llvm/llvm-project/commit/c1fc4c6a69c6ca0ae6aa060e4377ab5040505a66
Author: Clo91eaf <Clo91eaf at qq.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/SMT/IR/SMTArrayOps.td
Log Message:
-----------
[mlir][SMT] fix the operation name in ArrayBroadcastOp description (#135746)
Commit: a630ef71e84a6bf09a99053ea42d37632ca0d18a
https://github.com/llvm/llvm-project/commit/a630ef71e84a6bf09a99053ea42d37632ca0d18a
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/test/MC/ELF/reloc-directive.s
Log Message:
-----------
ELFObjectWriter: Disable STT_SECTION adjustment for .reloc
... to match GNU Assembler. This generalizes the
SHT_LLVM_CALL_GRAPH_PROFILE special case (which uses .reloc with
BFD_RELOC_NONE https://reviews.llvm.org/D104080).
Targets that want STT_SECTION adjustment cannot use
FirstLiteralRelocationKind derived fixup kinds.
Depends on the fix of #135521
Pull Request: https://github.com/llvm/llvm-project/pull/135519
Commit: 507d7dc651b28d8a975ba8ca6e8f5906b07e37e7
https://github.com/llvm/llvm-project/commit/507d7dc651b28d8a975ba8ca6e8f5906b07e37e7
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
Log Message:
-----------
[LoongArch] Simplify getRelocType
Commit: 3d97d71e66036f51cf0b45cc7d5f3a0a14192eb4
https://github.com/llvm/llvm-project/commit/3d97d71e66036f51cf0b45cc7d5f3a0a14192eb4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
Log Message:
-----------
[Lex] Use llvm::make_second_range (NFC) (#135902)
Commit: 1256ca04c2064f2ef05625ff93a7954642af84a1
https://github.com/llvm/llvm-project/commit/1256ca04c2064f2ef05625ff93a7954642af84a1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
Log Message:
-----------
[CodeGen] Call DenseMap::erase directly (NFC) (#135898)
Commit: bf0de88696095342aaa58e5e0a0105403d5ebd5e
https://github.com/llvm/llvm-project/commit/bf0de88696095342aaa58e5e0a0105403d5ebd5e
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
code format checker: fix python error when the diff becomes empty
Commit: 11857bef8a5fdfb8ab65971c3da6593c6076ff62
https://github.com/llvm/llvm-project/commit/11857bef8a5fdfb8ab65971c3da6593c6076ff62
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcisls.ll
Log Message:
-----------
[RISCV] Add basic ISel patterns for Xqcisls instructions (#135918)
This patch adds basic instruction selection patterns for generating the
scaled load/store instructions that are a part of the Qualcomm uC
Xqcisls vendor extension.
Commit: 559df834df4c5653227cb85129904004164e4c4f
https://github.com/llvm/llvm-project/commit/559df834df4c5653227cb85129904004164e4c4f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Fix subtracting zero-sized pointers (#135929)
Add the appropriate diagnostic and fix the d-d case.
Commit: 70d34e4bfd32d8518a70226d3d68398d94c1d68f
https://github.com/llvm/llvm-project/commit/70d34e4bfd32d8518a70226d3d68398d94c1d68f
Author: Hendrik_Klug <43926224+Jimmy2027 at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/FoldIntoElementwise.cpp
Log Message:
-----------
[MLIR][Linalg] Remove debug print from FoldIntoElementwise pass (#135928)
Commit: 51b8c66b0867154730d07e1ee4016b5116440293
https://github.com/llvm/llvm-project/commit/51b8c66b0867154730d07e1ee4016b5116440293
Author: Дмитрий Изволов <dmitriy at izvolov.ru>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/radix_sort.h
M libcxx/include/__algorithm/stable_sort.h
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort.pass.cpp
Log Message:
-----------
[libc++] Extend the scope of radix sorting inside std::stable_sort to floating-point types (#129452)
These changes speed up `std::stable_sort` in the case of sorting
floating-point types.
This applies only to IEEE 754 floats.
The speedup is similar to that achieved for integers in PR #104683 (see
benchmarks below).
Why does this worth doing?
Previously, `std::stable_sort` had almost no chance of beating
`std::sort`.
Now there are cases when `std::stable_sort` is preferrable, and the
difference is significant.
```
---------------------------------------------------------------------------
Benchmark | std::stable_sort | std::sort | std::stable_sort
| without radix_sort | | with radix_sort
---------------------------------------------------------------------------
float_Random_1 | 1.62 ns | 2.15 ns | 1.61 ns
float_Random_4 | 18.0 ns | 2.71 ns | 16.3 ns
float_Random_16 | 118 ns | 113 ns | 112 ns
float_Random_64 | 751 ns | 647 ns | 730 ns
float_Random_256 | 4715 ns | 2937 ns | 4669 ns
float_Random_1024 | 25713 ns | 13172 ns | 5959 ns <--
float_Random_4096 | 131307 ns | 56870 ns | 19294 ns <--
float_Random_16384 | 624996 ns | 242953 ns | 64264 ns <--
float_Random_65536 | 2895661 ns | 1027279 ns | 288553 ns <--
float_Random_262144 | 13285372 ns | 4342593 ns | 3022377 ns <--
float_Random_1048576 | 60595871 ns | 19087591 ns | 18690457 ns <--
float_Random_2097152 | 131336117 ns | 38800396 ns | 52325016 ns
float_Random_4194304 | 270043042 ns | 79978019 ns | 102907726 ns
double_Random_1 | 1.60 ns | 2.15 ns | 1.61 ns
double_Random_4 | 15.2 ns | 2.70 ns | 16.9 ns
double_Random_16 | 104 ns | 112 ns | 119 ns
double_Random_64 | 712 ns | 614 ns | 755 ns
double_Random_256 | 4496 ns | 2966 ns | 4820 ns
double_Random_1024 | 24722 ns | 12679 ns | 6189 ns <--
double_Random_4096 | 126075 ns | 54484 ns | 20999 ns <--
double_Random_16384 | 613782 ns | 232557 ns | 110276 ns <--
double_Random_65536 | 2894972 ns | 988531 ns | 774302 ns <--
double_Random_262144 | 13460273 ns | 4278059 ns | 5115123 ns
double_Random_1048576 | 61119996 ns | 18408462 ns | 27166574 ns
double_Random_2097152 | 132511525 ns | 37986158 ns | 54423869 ns
double_Random_4194304 | 272949862 ns | 77912616 ns | 147670834 ns
```
Comparison for only `std::stable_sort`:
```
Benchmark Time Time Old Time New
--------------------------------------------------------------------------------------------------
BM_StableSort_float_Random_1024 -0.7997 25438 5096
BM_StableSort_float_Random_4096 -0.8731 128157 16260
BM_StableSort_float_Random_16384 -0.9024 621271 60623
BM_StableSort_float_Random_65536 -0.9081 2922413 268619
BM_StableSort_float_Random_262144 -0.7766 13386345 2990408
BM_StableSort_float_Random_1048576 -0.6954 60673010 18481751
BM_StableSort_float_Random_2097152 -0.6026 130977358 52052182
BM_StableSort_float_Random_4194304 -0.6252 271556583 101770500
BM_StableSort_float_Ascending_1024 -0.6430 6711 2396
BM_StableSort_float_Ascending_4096 -0.7979 38460 7773
BM_StableSort_float_Ascending_16384 -0.8471 191069 29222
BM_StableSort_float_Ascending_65536 -0.8683 882321 116194
BM_StableSort_float_Ascending_262144 -0.8346 3868552 639937
BM_StableSort_float_Ascending_1048576 -0.7460 16521233 4195953
BM_StableSort_float_Ascending_2097152 -0.5439 21757532 9922776
BM_StableSort_float_Ascending_4194304 -0.7525 67847496 16791582
BM_StableSort_float_Descending_1024 -0.6359 15038 5475
BM_StableSort_float_Descending_4096 -0.7090 62810 18278
BM_StableSort_float_Descending_16384 -0.7763 311844 69750
BM_StableSort_float_Descending_65536 -0.7228 1270513 352202
BM_StableSort_float_Descending_262144 -0.6785 5484173 1763045
BM_StableSort_float_Descending_1048576 -0.5084 20223149 9941852
BM_StableSort_float_Descending_2097152 -0.7646 60523254 14247014
BM_StableSort_float_Descending_4194304 -0.5638 95706839 41748858
BM_StableSort_float_SingleElement_1024 +0.3715 1732 2375
BM_StableSort_float_SingleElement_4096 -0.1685 9357 7781
BM_StableSort_float_SingleElement_16384 -0.3793 47307 29362
BM_StableSort_float_SingleElement_65536 -0.4925 227666 115536
BM_StableSort_float_SingleElement_262144 -0.4271 1075853 616387
BM_StableSort_float_SingleElement_1048576 -0.3736 5097599 3193279
BM_StableSort_float_SingleElement_2097152 -0.2470 9854161 7420158
BM_StableSort_float_SingleElement_4194304 -0.3384 22175964 14670720
BM_StableSort_float_PipeOrgan_1024 -0.4885 10664 5455
BM_StableSort_float_PipeOrgan_4096 -0.6340 50095 18337
BM_StableSort_float_PipeOrgan_16384 -0.7078 238700 69739
BM_StableSort_float_PipeOrgan_65536 -0.6740 1102419 359378
BM_StableSort_float_PipeOrgan_262144 -0.7460 4698739 1193511
BM_StableSort_float_PipeOrgan_1048576 -0.5657 18493972 8032392
BM_StableSort_float_PipeOrgan_2097152 -0.7116 41089206 11850349
BM_StableSort_float_PipeOrgan_4194304 -0.6650 83445011 27955737
BM_StableSort_float_QuickSortAdversary_1024 -0.6863 17402 5460
BM_StableSort_float_QuickSortAdversary_4096 -0.7715 79864 18247
BM_StableSort_float_QuickSortAdversary_16384 -0.7800 317480 69839
BM_StableSort_float_QuickSortAdversary_65536 -0.7400 1357601 352967
BM_StableSort_float_QuickSortAdversary_262144 -0.6450 5662094 2009769
BM_StableSort_float_QuickSortAdversary_1048576 -0.5092 21173627 10392107
BM_StableSort_float_QuickSortAdversary_2097152 -0.7333 61748178 16469993
BM_StableSort_float_QuickSortAdversary_4194304 -0.5607 98459863 43250182
BM_StableSort_double_Random_1024 -0.7657 24769 5802
BM_StableSort_double_Random_4096 -0.8441 126449 19717
BM_StableSort_double_Random_16384 -0.8269 614910 106447
BM_StableSort_double_Random_65536 -0.7413 2905000 751427
BM_StableSort_double_Random_262144 -0.6287 13449514 4994348
BM_StableSort_double_Random_1048576 -0.5635 60863246 26568349
BM_StableSort_double_Random_2097152 -0.5959 130293892 52654532
BM_StableSort_double_Random_4194304 -0.4772 272616445 142526267
BM_StableSort_double_Ascending_1024 -0.4870 6757 3466
BM_StableSort_double_Ascending_4096 -0.7360 37592 9923
BM_StableSort_double_Ascending_16384 -0.7971 183967 37324
BM_StableSort_double_Ascending_65536 -0.7465 897116 227398
BM_StableSort_double_Ascending_262144 -0.6764 4020980 1301033
BM_StableSort_double_Ascending_1048576 -0.6407 16421799 5900751
BM_StableSort_double_Ascending_2097152 -0.6380 29347139 10622419
BM_StableSort_double_Ascending_4194304 -0.5934 70439925 28644185
BM_StableSort_double_Descending_1024 -0.5988 15216 6105
BM_StableSort_double_Descending_4096 -0.6857 65069 20449
BM_StableSort_double_Descending_16384 -0.6922 329321 101381
BM_StableSort_double_Descending_65536 -0.7038 1367970 405242
BM_StableSort_double_Descending_262144 -0.6472 5361644 1891429
BM_StableSort_double_Descending_1048576 -0.6656 22031404 7366459
BM_StableSort_double_Descending_2097152 -0.7593 68922467 16591242
BM_StableSort_double_Descending_4194304 -0.6392 96283643 34743223
BM_StableSort_double_SingleElement_1024 +0.9128 1895 3625
BM_StableSort_double_SingleElement_4096 +0.1475 10013 11490
BM_StableSort_double_SingleElement_16384 -0.1901 52382 42424
BM_StableSort_double_SingleElement_65536 -0.2096 254698 201313
BM_StableSort_double_SingleElement_262144 -0.1833 1248478 1019648
BM_StableSort_double_SingleElement_1048576 -0.1741 5703397 4710603
BM_StableSort_double_SingleElement_2097152 -0.1751 10922197 9009835
BM_StableSort_double_SingleElement_4194304 -0.1538 26571923 22485137
BM_StableSort_double_PipeOrgan_1024 -0.4406 10752 6014
BM_StableSort_double_PipeOrgan_4096 -0.5917 49456 20195
BM_StableSort_double_PipeOrgan_16384 -0.6258 270515 101221
BM_StableSort_double_PipeOrgan_65536 -0.7098 1159462 336457
BM_StableSort_double_PipeOrgan_262144 -0.6591 4735711 1614433
BM_StableSort_double_PipeOrgan_1048576 -0.6620 19353110 6541172
BM_StableSort_double_PipeOrgan_2097152 -0.7288 49131812 13323391
BM_StableSort_double_PipeOrgan_4194304 -0.5988 81958974 32878171
BM_StableSort_double_QuickSortAdversary_1024 -0.6516 17948 6254
BM_StableSort_double_QuickSortAdversary_4096 -0.7527 82359 20363
BM_StableSort_double_QuickSortAdversary_16384 -0.7009 340410 101811
BM_StableSort_double_QuickSortAdversary_65536 -0.6854 1487480 467928
BM_StableSort_double_QuickSortAdversary_262144 -0.6386 5648460 2041377
BM_StableSort_double_QuickSortAdversary_1048576 -0.6127 22859142 8852587
BM_StableSort_double_QuickSortAdversary_2097152 -0.7161 68693975 19499381
BM_StableSort_double_QuickSortAdversary_4194304 -0.5909 95532179 39077491
OVERALL_GEOMEAN -0.6472 0 0
```
Commit: 1f96aea037e612d87b4e2e20825973e45680921c
https://github.com/llvm/llvm-project/commit/1f96aea037e612d87b4e2e20825973e45680921c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A llvm/test/CodeGen/X86/pr135917.ll
Log Message:
-----------
[X86] Add test coverage for #135917
Commit: b9ce185d4e542dde5e8d152f30314b6637a0d87b
https://github.com/llvm/llvm-project/commit/b9ce185d4e542dde5e8d152f30314b6637a0d87b
Author: Robert Konicar <rkonicar at mail.muni.cz>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/IR/AttrTypeBase.td
A mlir/test/Dialect/LLVMIR/range-attr.mlir
Log Message:
-----------
[MLIR][LLVM] Fix #llvm.constant_range crashing in storage uniquer (#135772)
Add APIntParameter with custom implementation for comparison and use it
in llvm.constant_range attribute. This is necessary because the default
equality operator of APInt asserts when the bit widths of the compared
APInts differ. The comparison is used by StorageUniquer when hashes of
two ranges with different bit widths collide.
Commit: 3d7e56fd28cd2195e7f330f933d491530e274401
https://github.com/llvm/llvm-project/commit/3d7e56fd28cd2195e7f330f933d491530e274401
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_tmop.c
A clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_tmop.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
A llvm/test/CodeGen/AArch64/sme2-intrinsics-tmop.ll
Log Message:
-----------
[AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (#135145)
Implement all {BF/F/S/U/SU/US}TMOP intrinsics in clang and llvm
following the ACLE in https://github.com/ARM-software/acle/pull/380/files
Commit: d508f0cb009a0be98ca97f4dc0498294e0681a66
https://github.com/llvm/llvm-project/commit/d508f0cb009a0be98ca97f4dc0498294e0681a66
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sme-write-fpmr.ll
Log Message:
-----------
[AArch64] Fix FPMR handling when switching streaming mode (#135827)
According to the
[documentation](https://developer.arm.com/documentation/ddi0601/latest/AArch64-Registers/FPMR--Floating-point-Mode-Register),
the FPMR register is set to 0 when entering or exiting streaming mode.
This patch models that behavior by adding FPMR as an implicit def to the
instructions used for entering and exiting streaming mode.
Commit: 41c97afea055a5b7264167ec47b8c14c0f471f2f
https://github.com/llvm/llvm-project/commit/41c97afea055a5b7264167ec47b8c14c0f471f2f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Remove handling of duplicates from getGatherCost
Duplicates are handled in BoUpSLP::processBuildVector (see TryPackScalars), support for duplicates in getGatherCost is not needed anymore.
Reviewers: hiraditya, RKSimon
Reviewed By: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/135834
Commit: 1e61b374ba3ba2891dc1abda732b0b9263216785
https://github.com/llvm/llvm-project/commit/1e61b374ba3ba2891dc1abda732b0b9263216785
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Tighten the semantics of vector.gather (#135749)
This patch restricts `vector.gather` to only accept tensors and memrefs
as valid sources. Currently, the source is typed as `AnyShaped`, which
also includes vectors—allowing the following (invalid) construct to pass
verification:
```mlir
%0 = vector.gather %base[%c0][%indices], %mask, %pass_thru
: vector<16xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
```
(Note: the source %base here is a vector, which is incorrect.)
In contrast, `vector.scatter` currently only accepts memrefs, so some
asymmetry remains between the two ops. This PR is a step toward aligning
their semantics.
Commit: 2d63faead4e6339e679ab62113f47112d67a5b06
https://github.com/llvm/llvm-project/commit/2d63faead4e6339e679ab62113f47112d67a5b06
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/PrimType.h
Log Message:
-----------
[clang][bytecode][NFC] Remove PT_FnPtr (#135947)
We don't need this anymore since we don't return it from classify()
anymore.
Commit: bc03d6cce25712601423398350f56114e64e4e29
https://github.com/llvm/llvm-project/commit/bc03d6cce25712601423398350f56114e64e4e29
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Introduce all loop regions as VPlan transform. (NFC) (#129402)
Further simplify VPlan CFG builder by moving introduction of inner
regions to a VPlan transform, building on
https://github.com/llvm/llvm-project/pull/128419.
The HCFG builder now only constructs plain CFGs. I will move it to
VPlanConstruction as follow-up.
Depends on https://github.com/llvm/llvm-project/pull/128419.
PR: https://github.com/llvm/llvm-project/pull/129402
Commit: bb5f53c727419c90e3ad6ca7db49330c64a8f54c
https://github.com/llvm/llvm-project/commit/bb5f53c727419c90e3ad6ca7db49330c64a8f54c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/X86/pr134602.ll
M llvm/test/CodeGen/X86/pr135917.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
Log Message:
-----------
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
#135597 didn't correctly fix the issue of binops with an undef element
from only one operand - only reporting the common undef elements could
incorrectly recognise splats where the (binop X, undef) fold might
actually be different - we need to ensure both operands have the same
demanded undefs for certainty.
Fixes #135917
Commit: cf2399a2ee5b8a721eff385acbaa68fb9b00127c
https://github.com/llvm/llvm-project/commit/cf2399a2ee5b8a721eff385acbaa68fb9b00127c
Author: Wenju He <wenju.he at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
[CI] enable code-format-helper for .cl files (#135748)
In clang-format, OpenCL .cl file uses default C++ formatting. There are
many pull-requests in libclc project that change OpenCL files. It is
beneficial to enable clang-format for them in CI.
Commit: 38ca73db223031b1831cd24ef66ddb6a8546a16c
https://github.com/llvm/llvm-project/commit/38ca73db223031b1831cd24ef66ddb6a8546a16c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode] Give typeinfo APValues an LValuePath (#135948)
That's what the current interpreter does as well.
Commit: 27c1aa9b9cf9e0b14211758ff8f7d3aaba24ffcf
https://github.com/llvm/llvm-project/commit/27c1aa9b9cf9e0b14211758ff8f7d3aaba24ffcf
Author: mgschossmann <109181247+mgschossmann at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
A clang/test/CodeGenCXX/debug-info-dtor-implicit-args.cpp
Log Message:
-----------
[Clang,debuginfo] added vtt parameter in destructor DISubroutineType (#130674)
Fixes issue #104765: When creating a virtual destructor with an
artificial "vtt" argument, the type of "vtt" was previously missing in
the `DISubroutineType` `types` array.
This commit fixes this behavior and adds a regression test.
Commit: 616613c80b75614736d0781d12c0e1237d79738f
https://github.com/llvm/llvm-project/commit/616613c80b75614736d0781d12c0e1237d79738f
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/cxx2c-delete-with-message.cpp
Log Message:
-----------
[Clang] [Sema] Fix a crash when a `friend` function is redefined as deleted (#135679)
NB: This only fixes the crash introduced in Clang 19; we still accept
this code even though we shouldn’t:
```c++
struct S {
friend int f() { return 3; }
friend int f() = delete;
};
```
I tried figuring out a way to diagnose this redeclaration, but it seems
tricky because I kept running into issues around defaulted comparison
operators. From my testing, however, this fix here would still be
required even once we do start diagnosing this.
Fixes #135506.
Commit: 30990c09c99bdcbfa7084d32b2b9851e19b6fb2a
https://github.com/llvm/llvm-project/commit/30990c09c99bdcbfa7084d32b2b9851e19b6fb2a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
Log Message:
-----------
Revert "[flang][fir] Lower `do concurrent` loop nests to `fir.do_concurrent` (#132904)" (#135904)
This reverts commit 04b87e15e40f8857e29ade8321b8b67691545a50.
The reasons for reverting is that the following:
1. I still need need to upstream some part of the do concurrent to
OpenMP pass from our downstream implementation and taking this in
downstream will make things more difficult.
2. I still need to work on a solution for modeling locality specifiers
on `hlfir.do_concurrent` ops. I would prefer to do that and merge the
entire stack together instead of having a partial solution.
After merging the revert I will reopen the origianl PR and keep it
updated against main until I finish the above.
Commit: fe4a31d59db7b18dc45c3593bf100c101e725b79
https://github.com/llvm/llvm-project/commit/fe4a31d59db7b18dc45c3593bf100c101e725b79
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Fix bazel build after 00eaff3e9c897c263a879416d0f151d7ca7eeaff. (#135949)
Commit: d3153ad66c539ad146062b6e65741901e5b5e1cc
https://github.com/llvm/llvm-project/commit/d3153ad66c539ad146062b6e65741901e5b5e1cc
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang] Unify `SourceLocation` and `IdentifierInfo*` pair-like data structures to `IdentifierLoc` (#135808)
I found this issue when I working on
https://github.com/llvm/llvm-project/pull/107168.
Currently we have many similiar data structures like:
- `std::pair<IdentifierInfo *, SourceLocation>`.
- Element type of `ModuleIdPath`.
- `IdentifierLocPair`.
- `IdentifierLoc`.
This PR unify these data structures to `IdentifierLoc`, moved
`IdentifierLoc` definition to SourceLocation.h, and deleted other
similer data structures.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: af28c9c65a23806a09d7929792df5ed2e9bdf946
https://github.com/llvm/llvm-project/commit/af28c9c65a23806a09d7929792df5ed2e9bdf946
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-vector-operand-with-reuses.ll
Log Message:
-----------
[SLP]Do not reorder split node operand with reuses, if not possible
Need to check if the operand node of the split vectorize node has reuses
and check if it is possible to build the order for this node to reorder
it correctly.
Fixes #135912
Commit: 1bfd44462886b167f0d82e44e6a9856a830c1f8b
https://github.com/llvm/llvm-project/commit/1bfd44462886b167f0d82e44e6a9856a830c1f8b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/NVPTX/and-or-setcc.ll
A llvm/test/CodeGen/X86/and-or-setcc.ll
Log Message:
-----------
[DAGCombiner] Fold and/or of NaN SETCC (#135645)
Fold an AND or OR of two NaN SETCC nodes into a single SETCC where
possible. This optimization already exists in InstCombine but adding in
here as well can allow for additional folding if more logical operations
are exposed.
Commit: 181872ffcc7dc7f20ed2b84e8fa39beba41cb6d3
https://github.com/llvm/llvm-project/commit/181872ffcc7dc7f20ed2b84e8fa39beba41cb6d3
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
A llvm/test/MC/AMDGPU/bf16_imm-fake16.s
M llvm/test/MC/AMDGPU/bf16_imm.s
A llvm/test/MC/AMDGPU/gfx11-promotions-fake16.s
M llvm/test/MC/AMDGPU/gfx11-promotions.s
A llvm/test/MC/AMDGPU/gfx1150_asm_features-fake16.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
Log Message:
-----------
[AMDGPU][True16][MC] update a few mc test for true16 (#135816)
This is another NFC patch.
Update mc test for a few true16 instructions by duplicating the file to
fake16 versions and udpate `mattr` flag with +/-real-true16. Also added
some fake16 file that are not properly created before
Commit: 6cfec29cb9bc44ec907eeda99df508985ecbd49b
https://github.com/llvm/llvm-project/commit/6cfec29cb9bc44ec907eeda99df508985ecbd49b
Author: Arvind Sudarsanam <arvind.sudarsanam at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/Object/OffloadBinary.h
Log Message:
-----------
[Offload][SYCL] Refactor OffloadKind implementation (#135809)
Following are the changes:
1. Make OffloadKind enum values to be powers of two so we can use them
like a bitfield
2. Include OFK_SYCL enum value
3. Modify ActiveOffloadKinds support in clang-linker-wrapper to use
bitfields instead of a vector.
Thanks
---------
Signed-off-by: Arvind Sudarsanam <arvind.sudarsanam at intel.com>
Commit: de90487fc17fb928de7d0cd75d47a44db5181c14
https://github.com/llvm/llvm-project/commit/de90487fc17fb928de7d0cd75d47a44db5181c14
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-intrinsics-fexpa.ll
M llvm/test/MC/AArch64/SVE/fexpa.s
Log Message:
-----------
[AARCH64] Add FEAT_SSVE_FEXPA and fix unsupported features list (#134368)
This patch adds new feature introduced in [2025-03
release](https://developer.arm.com/documentation/ddi0602/2025-03/SVE-Instructions/FEXPA--Floating-point-exponential-accelerator-)
and changes feature requirements for fexpa instructions and intrinsics.
Additionally it fixes unsupported features list by moving fearures
dependent on sme2p1 to correct location.
Commit: 9483aaaaaa427b5dcb9a7af8f232a4696eef94bf
https://github.com/llvm/llvm-project/commit/9483aaaaaa427b5dcb9a7af8f232a4696eef94bf
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.h
Log Message:
-----------
[bazel] Fix bazel build after 00eaff3 #2. (#135962)
The linter messed up the order of includes, which is necessary as is.
Commit: 183cb45c1280b80a0022649d1db8a93544bb97b0
https://github.com/llvm/llvm-project/commit/183cb45c1280b80a0022649d1db8a93544bb97b0
Author: John Harrison <harjohn at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
Log Message:
-----------
[lldb-dap] Fixing a race during disconnect. (#135872)
While attempting to disconnect the DAP transport reader thread is
setting
`disconnecting` as soon as it sees a [disconnect
request](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Disconnect).
However, if it is processing another request when this disconnect
arrives the `DAP::Loop` handler may exit the loop without replying to
the disconnect request.
There has been some instability on the CI jobs due to this race, for
example https://lab.llvm.org/buildbot/#/builders/59/builds/16076
To address this, ensure we only return from `DAP::Loop` once we've
emptied the queue.
Commit: ef1abbe32e66c16118ded6dd9f7b1a55dea8c2b6
https://github.com/llvm/llvm-project/commit/ef1abbe32e66c16118ded6dd9f7b1a55dea8c2b6
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
Log Message:
-----------
[NVPTX] Remove extraneous initializeNVVMReflectLegacyPassPass declaration (#135825)
This was already declared in NVPTX.h and I accidentally added it back in
#134416.
Commit: 99c08ff1cb96fc4f471aca0dd253060b3f32e8bc
https://github.com/llvm/llvm-project/commit/99c08ff1cb96fc4f471aca0dd253060b3f32e8bc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/ModuleLoader.h
M clang/include/clang/Lex/PPCallbacks.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/LoopHint.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
Revert "[clang] Unify `SourceLocation` and `IdentifierInfo*` pair-like data structures to `IdentifierLoc`" (#135974)
Reverts llvm/llvm-project#135808
Example from the LLDB macOS CI:
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/as-lldb-cmake/24084/execution/node/54/log/?consoleFull
```
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp:360:49: error: no viable conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'clang::ModuleIdPath' (aka 'ArrayRef<IdentifierLoc>')
clang::Module *top_level_module = DoGetModule(clang_path.front(), false);
^~~~~~~~~~~~~~~~~~
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:41:40: note: candidate constructor (the implicit copy constructor) not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'const llvm::ArrayRef<clang::IdentifierLoc> &' for 1st argument
class LLVM_GSL_POINTER [[nodiscard]] ArrayRef {
^
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:41:40: note: candidate constructor (the implicit move constructor) not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'llvm::ArrayRef<clang::IdentifierLoc> &&' for 1st argument
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:70:18: note: candidate constructor not viable: no known conversion from 'std::pair<clang::IdentifierInfo *, clang::SourceLocation>' to 'std::nullopt_t' for 1st argument
/*implicit*/ ArrayRef(std::nullopt_t) {}
```
Commit: ab7e0c0fc00b2c0ccae735cb0def103831d15b3b
https://github.com/llvm/llvm-project/commit/ab7e0c0fc00b2c0ccae735cb0def103831d15b3b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_wmem{cpy,move} (#135969)
Commit: 2e9ab7cf96d802a906de342f32bc844036152ada
https://github.com/llvm/llvm-project/commit/2e9ab7cf96d802a906de342f32bc844036152ada
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
Log Message:
-----------
[NFC][Driver][CFI] Update boolean expression (#135881)
Show why we don't need regular CFI runtime, when CFI diag runtime is
linked.
Commit: f3b2fdab8d8101d0a84d2d27eb8380092dfdbf96
https://github.com/llvm/llvm-project/commit/f3b2fdab8d8101d0a84d2d27eb8380092dfdbf96
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/ConfigFragment.h
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Basic/arm_sve.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/FunctionPointer.cpp
M clang/lib/AST/ByteCode/FunctionPointer.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_tmop.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
M clang/test/CodeGenCUDA/offloading-entries.cu
A clang/test/CodeGenCXX/debug-info-dtor-implicit-args.cpp
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/print-supported-extensions-aarch64.c
A clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_tmop.cpp
A clang/test/Sema/complex-div-warn-higher-precision.cpp
M clang/test/SemaCXX/cxx2c-delete-with-message.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/radix_sort.h
M libcxx/include/__algorithm/stable_sort.h
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort.pass.cpp
M lldb/tools/lldb-dap/DAP.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
A llvm/test/CodeGen/AArch64/sme-write-fpmr.ll
A llvm/test/CodeGen/AArch64/sme2-intrinsics-tmop.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fexpa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
A llvm/test/CodeGen/LoongArch/prefetchi.ll
A llvm/test/CodeGen/NVPTX/and-or-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
A llvm/test/CodeGen/RISCV/xqcilo.ll
A llvm/test/CodeGen/RISCV/xqcisls.ll
A llvm/test/CodeGen/X86/and-or-setcc.ll
M llvm/test/CodeGen/X86/pr134602.ll
A llvm/test/CodeGen/X86/pr135917.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/MC/AArch64/SVE/fexpa.s
A llvm/test/MC/AMDGPU/bf16_imm-fake16.s
M llvm/test/MC/AMDGPU/bf16_imm.s
A llvm/test/MC/AMDGPU/gfx11-promotions-fake16.s
M llvm/test/MC/AMDGPU/gfx11-promotions.s
A llvm/test/MC/AMDGPU/gfx1150_asm_features-fake16.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/ELF/reloc-directive.s
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-vector-operand-with-reuses.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/utils/git/code-format-helper.py
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/SMT/IR/SMTArrayOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/AttrTypeBase.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Dialect/Linalg/Transforms/FoldIntoElementwise.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
A mlir/test/Dialect/LLVMIR/range-attr.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/e9b4da55b0dc...f3b2fdab8d81
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