[all-commits] [llvm/llvm-project] 19730e: ELFObjectWriter: Make .reloc test generic
Fangrui Song via All-commits
all-commits at lists.llvm.org
Wed Apr 16 00:05:04 PDT 2025
Branch: refs/heads/users/MaskRay/spr/elfobjectwriter-disable-stt_section-adjustment-for-reloc
Home: https://github.com/llvm/llvm-project
Commit: 19730e37ec5d3513d188a75999c964f2ef4b9509
https://github.com/llvm/llvm-project/commit/19730e37ec5d3513d188a75999c964f2ef4b9509
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-12 (Sat, 12 Apr 2025)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
Log Message:
-----------
ELFObjectWriter: Make .reloc test generic
Move `Fixup.getKind() >= FirstLiteralRelocationKind` from target hooks
to ELFObjectWriter::recordRelocation.
Currently, getRelocType cannot be skipped for LoongArch due to #135519
Commit: 6196379baf4fe42b6c1a4bea270df39b7152547b
https://github.com/llvm/llvm-project/commit/6196379baf4fe42b6c1a4bea270df39b7152547b
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-12 (Sat, 12 Apr 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
Log Message:
-----------
[PowerPC] Fix -Wunused-variable
Commit: 7940b0546ba0c28990bc059c8c3ec36fdad0fd0a
https://github.com/llvm/llvm-project/commit/7940b0546ba0c28990bc059c8c3ec36fdad0fd0a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-12 (Sat, 12 Apr 2025)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
Log Message:
-----------
[BOLT] Fix warning
This patch fixes:
bolt/lib/Core/BinaryContext.cpp:582:8: error: unused variable
'printEntryDiagnostics' [-Werror,-Wunused-variable]
bolt/lib/Core/BinaryContext.cpp:842:10: error: unused variable
'isSibling' [-Werror,-Wunused-variable]
Commit: f4fba20726aced418dc7ae24e47ee78f109a64cb
https://github.com/llvm/llvm-project/commit/f4fba20726aced418dc7ae24e47ee78f109a64cb
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M lldb/include/lldb/API/SBReproducer.h
M lldb/include/lldb/Core/Debugger.h
R lldb/scripts/reproducer-replay.py
M lldb/source/API/SBReproducer.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/unittests/Core/DiagnosticEventTest.cpp
M lldb/unittests/Interpreter/TestCommandPaths.cpp
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M lldb/unittests/Process/ProcessEventDataTest.cpp
M lldb/unittests/ScriptInterpreter/Lua/ScriptInterpreterTests.cpp
M lldb/unittests/Target/ExecutionContextTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Target/StackFrameRecognizerTest.cpp
M lldb/unittests/Thread/ThreadTest.cpp
Log Message:
-----------
[lldb] Remove vestigial remnants of reproducers (#135361)
Not touching the SB API.
Commit: d6e2aee9b1069b4a5fc1a0b07aef23b380f856f6
https://github.com/llvm/llvm-project/commit/d6e2aee9b1069b4a5fc1a0b07aef23b380f856f6
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
Revert "[tosa]: canonicalize dynamic size of tosa.slice to static output shape" (#135525)
Reverts llvm/llvm-project#135429 due buildbot breakage:
https://lab.llvm.org/buildbot/#/builders/169/builds/10405
Based on the ASan output, I think after the replaceOp on line 775, it's
no longer valid to do getSize() on sliceOp:
```
775 rewriter.replaceOp(sliceOp, newSliceOp.getResult());
776
777 // Remove const_shape size op when it no longer has use point.
778 Operation *sizeConstShape = sliceOp.getSize().getDefiningOp();
```
Commit: 12a7155ee290d62fef00362554b392a98b75fb77
https://github.com/llvm/llvm-project/commit/12a7155ee290d62fef00362554b392a98b75fb77
Author: Christian Sigg <csigg at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Port mlir-translate bits of acf964b95f54.
Commit: 5c45e239e81972ec3ff84b1650825385ccad0d46
https://github.com/llvm/llvm-project/commit/5c45e239e81972ec3ff84b1650825385ccad0d46
Author: A. Jiang <de34 at live.cn>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.iterators/reverse_iterator.pass.cpp
Log Message:
-----------
[libc++][test][NFC] Remove unused inclusions of `<iostream>` (#134776)
Some test files for flat container adaptors redundantly include
`<iostream>` and, surprisingly, `<cstddef>`. This patch removes the
redundant inclusions.
Inclusions of `<vector>` is also removed since a sane implementation is
expected to make instantiation of `flat_(multi)map<K, V>` or
`flat_(multi)set<K>` valid when only `<flat_map>` or `<flat_set>` is
included.
Commit: 028429ac452acde227ae0bfafbfe8579c127e1ea
https://github.com/llvm/llvm-project/commit/028429ac452acde227ae0bfafbfe8579c127e1ea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/ROCm.h
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/hip-device-libs.hip
M clang/test/Driver/rocm-device-libs.cl
Log Message:
-----------
clang/AMDGPU: Stop looking for oclc_daz_opt_* control libraries (#134805)
These have been empty since July 2023
Commit: 1c5ce2d74fa3ee15d1cb2e092cce0754c8ce19fa
https://github.com/llvm/llvm-project/commit/1c5ce2d74fa3ee15d1cb2e092cce0754c8ce19fa
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
M lldb/unittests/Process/gdb-remote/GDBRemoteClientBaseTest.cpp
Log Message:
-----------
Reapply "[lldb] ProcessGdbRemote header gardning"
This reverts commit 68ab45f0533f3bbfc1c96bddd53de7e769180219, reapplying
2fd860c1f559c0b0be66cc000e38270a04d0a1a3. The only change is keeping
"lldb/Host/Config.h", which I believe was the cause of the failures.
Commit: ca5b3a0f51baa6fddef4d888bf0aacca89e6f565
https://github.com/llvm/llvm-project/commit/ca5b3a0f51baa6fddef4d888bf0aacca89e6f565
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCSymbol.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[MC] Remove SetUsed on isUndefined and getFragment
Due to the known limitations of .set reassignment (see
https://sourceware.org/PR288), we use diagnostics to reject patterns
that could lead to errors (ae7ac010594f693fdf7b3ab879e196428d961e75 2009-06)).
This code gets refined multiple times, see:
* 9b4a824217f1fe23f83045afe7521acb791bc2d0 (2010-05) `IsUsedInExpr`
* 46c79ef1132607aead144dfda0f26aa8b065214f (2010-11) renamed `IsUsedInExpr` to `IsUsed`
The related `SetUsed` bit seems unnecessary nowadays.
Commit: 1004fae222efeee215780c4bb4e64eb82b07fb4f
https://github.com/llvm/llvm-project/commit/1004fae222efeee215780c4bb4e64eb82b07fb4f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M flang/test/Driver/omp-driver-offload.f90
Log Message:
-----------
flang: Try to update test for oclc_daz_opt removal
Try to fix bot failure after 028429ac452acde227ae0bfafbfe8579c127e1ea
Commit: 4e0876ee43d00c5fc28ed30bcb7c1aac2b18674f
https://github.com/llvm/llvm-project/commit/4e0876ee43d00c5fc28ed30bcb7c1aac2b18674f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M libcxx/include/__atomic/memory_order.h
M libcxx/include/__functional/hash.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__utility/convert_to_integral.h
M libcxx/include/__utility/to_underlying.h
M libcxx/include/future
Log Message:
-----------
[libc++] Use __underlying_type directly in underyling_type_t (#135423)
This avoids instantiating multiple classes, reducing compile times. This
patch also introduces `__underyling_type_t` for internal use, similar to
other type traits.
Commit: 3bebda0758409e91c25fa5add72ff22f3ddff609
https://github.com/llvm/llvm-project/commit/3bebda0758409e91c25fa5add72ff22f3ddff609
Author: Luke Lau <luke at igalia.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Mark VPWidenCallRecipe as a VPRecipeWithIRFlags (#135373)
I noticed VPWidenCallRecipe was missing here, it looks like it should be
handled in VPRecipeWithIRFlags::classof
Commit: 84666d68740bea9eee19399ab5c8622ff2f6e9ca
https://github.com/llvm/llvm-project/commit/84666d68740bea9eee19399ab5c8622ff2f6e9ca
Author: Sean Perry <perry at ca.ibm.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Basic/SourceManager.cpp
Log Message:
-----------
Add back include for AutoConvert.h as it's needed for z/OS (#135430)
The commit
https://github.com/llvm/llvm-project/commit/a1935fd3809772c06f9a09fa151181642ae92b20
removed an include that is needed when building on z/OS.
Commit: beac727e48346efb84558696fb080b1bbd07e234
https://github.com/llvm/llvm-project/commit/beac727e48346efb84558696fb080b1bbd07e234
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/IROutliner.cpp
Log Message:
-----------
IROutliner: Do not look at use lists of constant phi inputs (#135019)
Theoretically this does a worse job with globals but this is not
covered by existing tests
Commit: 09588e93bbe486ce782de9fba604f5cd184ec446
https://github.com/llvm/llvm-project/commit/09588e93bbe486ce782de9fba604f5cd184ec446
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
Log Message:
-----------
[clang][bytecode] Fix an inconsistency with loop condition jumps (#135530)
When emitting the jump for e.g. a for loop condition, we used to jump
out of the CondScope, leaving the scope initialized, because we skipped
the corresponding Destroy opcode. If that loop was in a loop itself,
that outer loop could then iterate once more, leading to us initializing
a scope that was still initialized.
Fix this by also destroying the scope after the EndLabel.
Commit: 0f607f3df54e22896b484510f0c1ccfb718de67a
https://github.com/llvm/llvm-project/commit/0f607f3df54e22896b484510f0c1ccfb718de67a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
Log Message:
-----------
[VPlan] Simplify 'or x, true' -> true.
Add additional OR simplification to fix a divergence between legacy and
VPlan-based cost model.
This adds a new m_AllOnes matcher by generalizing specific_intval to
int_pred_ty, which takes a predicate to check to support matching both
specific APInts and other APInt predices, like isAllOnes.
Fixes https://github.com/llvm/llvm-project/issues/131359.
Commit: ed43207306f7351f2b4f8284710b028df973d74e
https://github.com/llvm/llvm-project/commit/ed43207306f7351f2b4f8284710b028df973d74e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
Log Message:
-----------
[SimplifyCFG] Handle trunc condition in foldBranchToCommonDest. (#135490)
proof: https://alive2.llvm.org/ce/z/v32Aof
Commit: 77fcdb9f26d2d9da04767894b23b71e52e5ac7ce
https://github.com/llvm/llvm-project/commit/77fcdb9f26d2d9da04767894b23b71e52e5ac7ce
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#132660)
Commit: bb9580a02b393683ff0b6c360df684f33c715a1f
https://github.com/llvm/llvm-project/commit/bb9580a02b393683ff0b6c360df684f33c715a1f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pr135531.ll
Log Message:
-----------
[SCEV] Use ashr to adjust constant multipliers (#135534)
SCEV converts "-2 *nsw (i32 V)" into "2148473647 *nsw (i32 V)". But we
cannot preserve the nsw flag when the constant multiplier is negative.
This patch changes lshr to ashr so that we can preserve both nsw and nuw
flags.
Alive2 proof: https://alive2.llvm.org/ce/z/LZVSEa
Closes https://github.com/llvm/llvm-project/issues/135531.
Commit: 5550d302288f95fc9bb91d0ba35e5ca459ffd9b1
https://github.com/llvm/llvm-project/commit/5550d302288f95fc9bb91d0ba35e5ca459ffd9b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
Log Message:
-----------
[VPlan] Check captured operand when simplifying redundant OR.
Follow-up to 0f607f to actually use the captured operand X instead of Y.
Commit: 703cfe745b96751c1204bcffe4e56038c809247f
https://github.com/llvm/llvm-project/commit/703cfe745b96751c1204bcffe4e56038c809247f
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M libcxx/include/__bit/popcount.h
M libcxx/include/__stop_token/atomic_unique_lock.h
Log Message:
-----------
[libc++] Replace __libcpp_popcount by __builtin_popcountg (#133937)
`__libcpp_popcount` was previously used as a fallback for `__builtin_popcountg` to ensure compatibility with older compilers (Clang 18 and earlier), as `__builtin_popcountg` became available in Clang 19. Now that support for Clang 18 has been officially dropped in #130142, we can now safely replace all instances of `__libcpp_popcount` with `__builtin_popcountg` and eliminate the fallback logic.
Commit: 62d2cc84ac57afa47c2b1de599f9fd6e40adaacd
https://github.com/llvm/llvm-project/commit/62d2cc84ac57afa47c2b1de599f9fd6e40adaacd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#135540)
Commit: 4b4cd645a829b8e510bdb008f449969d7bf53c30
https://github.com/llvm/llvm-project/commit/4b4cd645a829b8e510bdb008f449969d7bf53c30
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated map lookups (NFC) (#135541)
Commit: d1d5f00a8eb43aaa22274c06b58d567f19e284fe
https://github.com/llvm/llvm-project/commit/d1d5f00a8eb43aaa22274c06b58d567f19e284fe
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
Log Message:
-----------
[Passes] Avoid repeated hash lookups (NFC) (#135542)
Commit: ccfb97b42174eab118a4e4222c25e986db876563
https://github.com/llvm/llvm-project/commit/ccfb97b42174eab118a4e4222c25e986db876563
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/ROCm.h
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/hip-device-libs.hip
M clang/test/Driver/rocm-device-libs.cl
M flang/test/Driver/omp-driver-offload.f90
Log Message:
-----------
Revert "clang/AMDGPU: Stop looking for oclc_daz_opt_* control libraries (#134805)"
This reverts commit 028429ac452acde227ae0bfafbfe8579c127e1ea and
1004fae222efeee215780c4bb4e64eb82b07fb4f.
These really need to be part of the compiler distribution. Bots are
relying on a nearly year old version to provide bitcode.
Commit: 1264d7a53a4de3094672be2a248db57b213f33ac
https://github.com/llvm/llvm-project/commit/1264d7a53a4de3094672be2a248db57b213f33ac
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/PPCLinux.cpp
M clang/lib/Driver/ToolChains/PPCLinux.h
M flang/test/Driver/flang-ld-powerpc.f90
M flang/test/Driver/linker-flags.f90
Log Message:
-----------
[driver] Generalize the code that adds the path of libflang_rt.runtime.a. (#134362)
The PR is to generalize the re-use of the `compilerRT` code of adding
the path of `libflang_rt.runtime.a (so)` from AIX and LoP only to all
platforms via a new function `addFlangRTLibPath`.
It also added `-static-libflangrt` and `-shared-libflangrt` compiler
options to allow users choosing which `flang-rt` to link to. It defaults
to shared `flang-rt`, which is consistent with the linker behavior,
except on AIX, it defaults to static.
Also, PR #134320 exposed an issue in PR #131041 that the the overriding
`addFortranRuntimeLibs` is missing the link to `libquadmath`. This PR
also fixed that and restored the test case that PR #131041 broke.
Commit: 578ca5e469ef1c91a79aa15bc186921ee7faa855
https://github.com/llvm/llvm-project/commit/578ca5e469ef1c91a79aa15bc186921ee7faa855
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Print jump lines in Function::dump() (#135482)
E.g. for
```c++
constexpr int foo(int b) {
int a = 1+1;
for (int i = 0; i < b; ++i) {
++a;
}
return a;
}
```
we now print:
```
foo 0x7cc8d4bf0580
frame size: 128
arg size: 8
rvo: 0
this arg: 0
0 InitScope 0
16 ConstSint32 1
32 ConstSint32 1
48 AddSint32
56 SetLocalSint32 40
72 ConstSint32 0
88 SetLocalSint32 104
104 GetPtrLocal 104 <-+
120 LoadPopSint32 |
128 GetPtrParam 0 |
144 LoadPopSint32 |
152 LTSint32 |
160 Jf 80 --+ |
176 GetPtrLocal 40 | |
192 IncPopSint32 1 | |
208 GetPtrLocal 104 | |
224 IncPopSint32 1 | |
240 Jmp -152 | --+
256 GetPtrLocal 40 <-+
272 LoadPopSint32
280 Destroy 0
296 RetSint32
304 Destroy 0
320 NoRet
```
Commit: ce01e4e2f6cb2a1c37e3acceeac931b2031a02e8
https://github.com/llvm/llvm-project/commit/ce01e4e2f6cb2a1c37e3acceeac931b2031a02e8
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
Log Message:
-----------
[Clang][OpenCL][AMDGPU] Use `byref` for aggregate OpenCL kernel arguments (#134892)
Due to a previous workaround allowing kernels to be called from other
functions,
Clang currently doesn't use the `byref` attribute for aggregate kernel
arguments. The issue was recently resolved in
https://github.com/llvm/llvm-project/pull/115821. With that fix, we can
now
enable the use of `byref` consistently across all languages.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Fixes SWDEV-247226.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: db20b0d4ec96e4dee0b5ca6e7ddd616eafd88d40
https://github.com/llvm/llvm-project/commit/db20b0d4ec96e4dee0b5ca6e7ddd616eafd88d40
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/test/Transforms/ObjCARC/contract.ll
Log Message:
-----------
ObjCARC: Add regressed testcase from #134275
Commit: a24ef4b07ee798b14fe0f3daa23cc3ec09410bc6
https://github.com/llvm/llvm-project/commit/a24ef4b07ee798b14fe0f3daa23cc3ec09410bc6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/sincospi.ll
Log Message:
-----------
SimplifyLibCalls: Skip sincospi optimization for ConstantData (#134688)
Avoids looking at the uselist, and it would probably be more
productive to constant fold this.
Commit: b37476f99c37a9edf48684d82dde745d9e0df957
https://github.com/llvm/llvm-project/commit/b37476f99c37a9edf48684d82dde745d9e0df957
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Analysis/PHITransAddr.cpp
M llvm/test/Transforms/GVN/pr65447.ll
Log Message:
-----------
PHITransAddr: Avoid looking at constant use lists (#134689)
Avoids asserts in GVN
Commit: 393c783a10052b14d2b76b3ee930b3d83e7f1a16
https://github.com/llvm/llvm-project/commit/393c783a10052b14d2b76b3ee930b3d83e7f1a16
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/PowerPC/pr43527.ll
M llvm/test/CodeGen/PowerPC/pr48519.ll
M llvm/test/CodeGen/PowerPC/sms-grp-order.ll
M llvm/test/Transforms/LICM/pr50367.ll
M llvm/test/Transforms/LICM/pr59324.ll
Log Message:
-----------
LICM: Avoid looking at use list of constant data (#134690)
The codegen test changes seem incidental. Either way,
sms-grp-order.ll seems to already not hit the original issue.
Commit: 30ae47eeefaeb2c78ae7f234621b8bb0444b7844
https://github.com/llvm/llvm-project/commit/30ae47eeefaeb2c78ae7f234621b8bb0444b7844
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Log Message:
-----------
SCEVExpander: Don't look at uses of constants (#134691)
This could be more relaxed, and look for uses of globals in
the same function but no tests apparently depend on that.
Commit: 0a27c4e318e778b520306a9e2102e03023cfaa33
https://github.com/llvm/llvm-project/commit/0a27c4e318e778b520306a9e2102e03023cfaa33
Author: Reid Kleckner <rnk at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/lib/TableGen/CMakeLists.txt
M llvm/lib/TableGen/Main.cpp
A llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/SequenceToOffsetTable.h
M llvm/utils/TableGen/Basic/TableGen.cpp
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/TableGen/BUILD.gn
Log Message:
-----------
[StrTable] Use string literal emission for intrinsics on non-MSVC platforms (#124856)
This mainly transitions the LLVM intrinsic string table from character
emission to string literal emission, which I confirmed happens for me
locally.
I moved the guts of StringToOffsetTable to a cpp file so I could move
the `EmitLongStrLiterals` cl::opt global to a non-vague linkage home in
the `TableGen` library. I had to add missing FormatVariadic.h includes
to account for moving other includes to a cpp file.
Commit: 5f11d64cfb44fc0adf3d3235b0e480d930379e9d
https://github.com/llvm/llvm-project/commit/5f11d64cfb44fc0adf3d3235b0e480d930379e9d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Format/WhitespaceManager.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in AlignConsecutiveDeclarations (#135516)
Fix #109768
Commit: c41ef751f85ee42f40380d064f44cfd347fb6215
https://github.com/llvm/llvm-project/commit/c41ef751f85ee42f40380d064f44cfd347fb6215
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Treat lambda in braced init as inline (#135520)
Fix #125430
Commit: dd107b20daedbc49dc3003ae2cb2e846267c308c
https://github.com/llvm/llvm-project/commit/dd107b20daedbc49dc3003ae2cb2e846267c308c
Author: Firas Khalil Khana <firasuke at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M libunwind/docs/BuildingLibunwind.rst
Log Message:
-----------
Update LIBUNWIND_ENABLE_WERROR default value in BuildingLibunwind.rst (#135546)
`LIBUNWIND_ENABLE_WERROR` defaults to `OFF` according to
[CMakeLists.txt](https://github.com/llvm/llvm-project/blob/main/libunwind/CMakeLists.txt#L43).
Commit: 974bda8f61e056f90b17baa6db686c91d20ebe9d
https://github.com/llvm/llvm-project/commit/974bda8f61e056f90b17baa6db686c91d20ebe9d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/codegen.cpp
Log Message:
-----------
[clang][bytecode] Reject constexpr-unknown pointers from Inc ops (#135548)
We used to accept c++ as a known value here, causing wrong codegen.
Commit: c0afb77c2ab92d244d66f2e9bfcf7da92af6091c
https://github.com/llvm/llvm-project/commit/c0afb77c2ab92d244d66f2e9bfcf7da92af6091c
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/function-call-invalid.s
M llvm/test/MC/RISCV/tail-call-invalid.s
Log Message:
-----------
RISCVAsmParser: Reject call foo at invalid
... instead of silently parsing and ignoring it without leaving an error
message.
While here, remove an unreachable `@plt`.
Pull Request: https://github.com/llvm/llvm-project/pull/135509
Commit: d893d129e6ee8b4dead1532cd8420750908acca6
https://github.com/llvm/llvm-project/commit/d893d129e6ee8b4dead1532cd8420750908acca6
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Dialect/GPU/Transforms/ShuffleRewriter.cpp
A mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-unsupported.mlir
M mlir/test/Dialect/GPU/shuffle-rewrite.mlir
Log Message:
-----------
[mlir] GPUToROCDL: Fix crashes with unsupported shuffle datatypes (#135504)
Calling `getIntOrFloatBitWidth` on non-int/float types (`gpu.shuffle`
also accepts vectors) will crash.
Commit: e555ccaa4da77b5d3065ed7d002e7073db995199
https://github.com/llvm/llvm-project/commit/e555ccaa4da77b5d3065ed7d002e7073db995199
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Log Message:
-----------
[llvm] Call *Map::erase directly (NFC) (#135545)
Commit: 91a205653e8fa5a338c985b9a9dbaaaec62e3475
https://github.com/llvm/llvm-project/commit/91a205653e8fa5a338c985b9a9dbaaaec62e3475
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-loadstore.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-combine-to-u-forms.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-ptest.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-rdffr-predication.ll
Log Message:
-----------
[AArch64][SVE] Instcombine ptrue(all) to splat(i1) (#135016)
SVE Operations such as predicated loads become canonicalized to LLVM
masked loads, and doing the same for ptrue(all) to splat(1) creates
further optimization opportunities from generic LLVM IR passes.
Commit: 543351babff4144675ee8259eeddafc7b441bf0c
https://github.com/llvm/llvm-project/commit/543351babff4144675ee8259eeddafc7b441bf0c
Author: Sayan Saha <sayans at mathworks.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[tosa] : Re-enable PR #135429 with ASAN fix (#135560)
Removed the calls to `sizeOp` after replacing `SliceOp`:
```
// Remove const_shape size op when it no longer has use point.
Operation *sizeConstShape = sliceOp.getSize().getDefiningOp();
```
Turns out as part of canonicalization, trivially dead ops are removed
anyway, so the above piece of code isn't actually needed.
Commit: 87322c903976b4b24b96f460719181cbebde1547
https://github.com/llvm/llvm-project/commit/87322c903976b4b24b96f460719181cbebde1547
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
Log Message:
-----------
[ObjCopy] Use llvm::reverse (NFC) (#135559)
Commit: 99df442df1f88c1078c433618c75ee62f3dd8512
https://github.com/llvm/llvm-project/commit/99df442df1f88c1078c433618c75ee62f3dd8512
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
Log Message:
-----------
Skip test on Darwin
Commit: 3de93015386f17d3430c6534b9fa3e2a9adfaa1a
https://github.com/llvm/llvm-project/commit/3de93015386f17d3430c6534b9fa3e2a9adfaa1a
Author: Yoann Congal <yoann.congal at smile.fr>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/test/CMakeLists.txt
M clang-tools-extra/clangd/test/lit.site.cfg.py.in
Log Message:
-----------
[clangd] Add a build option to disable building dexp (#133124)
Building dexp on Debian 11 currently causes intermittent failures [0] [1].
Adding the CLANGD_BUILD_DEXP option to disable dexp from the build
allows Debian 11 users to build clang (albeit without the dexp tool).
This option is set to "Build Dexp" by default so, no change is expected
without manual setting.
[0]: https://bugzilla.yoctoproject.org/show_bug.cgi?id=15803
[1]: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1101322
Commit: 425ccd50dc6dd154c448fba8dbcbb4d2f726b331
https://github.com/llvm/llvm-project/commit/425ccd50dc6dd154c448fba8dbcbb4d2f726b331
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
Log Message:
-----------
[gn] port 3de93015386f
Commit: cbe8f3ad7621e402b050e768f400ff0d19c3aedd
https://github.com/llvm/llvm-project/commit/cbe8f3ad7621e402b050e768f400ff0d19c3aedd
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] fix fmac_f16_t16 vop3 format (#135464)
add fmac_f16_t16_e64 to isfmac check to fix the vop3 format of
fmac_f16_t16 instruction
Commit: 52e45a79ad24f8a2347a5566e6abaa207918df62
https://github.com/llvm/llvm-project/commit/52e45a79ad24f8a2347a5566e6abaa207918df62
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
M lldb/source/Target/Language.cpp
Log Message:
-----------
[lldb][Language] Change GetFunctionDisplayName to take SymbolContext by reference (#135536)
Both the `CPlusPlusLanguage` plugins and the Swift language plugin
already assume the `sc != nullptr`. And all `FormatEntity` callsites of
`GetFunctionDisplayName` already check for nullptr before passing `sc`.
This patch makes this pre-condition explicit by changing the parameter
to `const SymbolContext &`. This will help with some upcoming changes in
this area.
Commit: 5710759eb390c0d5274c2a4d43967282d7df1993
https://github.com/llvm/llvm-project/commit/5710759eb390c0d5274c2a4d43967282d7df1993
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MCAsmBackend,X86: Pass MCValue to fixupNeedsRelaxationAdvanced. NFC
This parameter eliminates a redundant computation for VK_ABS8 in X86 and
reduces reliance on shouldForceRelocation in relaxation decisions.
Note: `local: jmp local at plt` relaxes JMP. This behavior depends on
fixupNeedsRelaxation calling shouldForceRelocation, which might change
in the future.
Commit: 1e153b782ea3054c02dd0016314fca11a5d781da
https://github.com/llvm/llvm-project/commit/1e153b782ea3054c02dd0016314fca11a5d781da
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M lldb/include/lldb/Symbol/SymbolContext.h
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/test/API/functionalities/param_entry_vals/basic_entry_values/main.cpp
M lldb/test/API/functionalities/tail_call_frames/inlining_and_tail_calls/main.cpp
M lldb/test/Shell/Recognizer/verbose_trap-in-stl-max-depth.test
M lldb/test/Shell/Settings/TestFrameFormatName.test
Log Message:
-----------
[lldb][Format] Display only the inlined frame name in backtraces if available (#135343)
When a frame is inlined, LLDB will display its name in backtraces as
follows:
```
* thread #1, queue = 'com.apple.main-thread', stop reason = breakpoint 1.3
* frame #0: 0x0000000100000398 a.out`func() [inlined] baz(x=10) at inline.cpp:1:42
frame #1: 0x0000000100000398 a.out`func() [inlined] bar() at inline.cpp:2:37
frame #2: 0x0000000100000398 a.out`func() at inline.cpp:4:15
frame #3: 0x00000001000003c0 a.out`main at inline.cpp:7:5
frame #4: 0x000000026eb29ab8 dyld`start + 6812
```
The longer the names get the more confusing this gets because the first
function name that appears is the parent frame. My assumption (which may
need some more surveying) is that for the majority of cases we only care
about the actual frame name (not the parent). So this patch removes all
the special logic that prints the parent frame.
Another quirk of the current format is that the inlined frame name does
not abide by the `${function.name-XXX}` format variables. We always just
print the raw demangled name. With this patch, we would format the
inlined frame name according to the `frame-format` setting (see the
test-cases).
If we really want to have the `parentFrame [inlined] inlinedFrame`
format, we could expose it through a new `frame-format` variable (e..g.,
`${function.inlined-at-name}` and let the user decide where to place
things.
Commit: 634f9a981571eae000c1adc311014c5c64486187
https://github.com/llvm/llvm-project/commit/634f9a981571eae000c1adc311014c5c64486187
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
Log Message:
-----------
ARMAsmBackend: Use fixupNeedsRelaxationAdvanced. NFC
This prepares for the upcoming change to simplify relocation recording
in MCAssembler.
While both MCAssembler::fixupNeedsRelaxation and
MCAssembler::handleFixup call evaluateFixup and use
shouldForceRelocation, the shouldForceRelocation logic is not supposed
to be needed by MCAssembler::fixupNeedsRelaxation.
The ARM special cases for interworking branches
(https://reviews.llvm.org/D33436 and https://reviews.llvm.org/D33898)
break the assumption. Switch to fixupNeedsRelaxationAdvanced and
explicitly test the conditions.
Commit: af7a7ba4aadea3600e78a5f522b72e5413c8e595
https://github.com/llvm/llvm-project/commit/af7a7ba4aadea3600e78a5f522b72e5413c8e595
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb][Format][NFC] Factor FunctionNameWithArgs case out into helper function
Commit: 5d87ebf3ade73d43b2dc334e4d23bc86ddc47879
https://github.com/llvm/llvm-project/commit/5d87ebf3ade73d43b2dc334e4d23bc86ddc47879
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
[MC] Refactor fixup evaluation and relocation generation
Follow-up to commits 5710759eb390c0d5274c2a4d43967282d7df1993
and 634f9a981571eae000c1adc311014c5c64486187
- Integrate `evaluateFixup` into `recordRelocation` and inline code
within `MCAssembler::layout`, removing `handleFixup`.
- Update `fixupNeedsRelaxation` to bypass `shouldForceRelocation` when
calling `evaluateFixup`, eliminating the `WasForced` workaround for
RISC-V linker relaxation (https://reviews.llvm.org/D46350 ).
Commit: 20d35fe5a58c3d90613dd50ec91aca700e111726
https://github.com/llvm/llvm-project/commit/20d35fe5a58c3d90613dd50ec91aca700e111726
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp
M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[llvm] Use llvm::is_contained (NFC) (#135566)
Commit: dc5178cc41d876b4e3d8ace9545f6e9898ef654b
https://github.com/llvm/llvm-project/commit/dc5178cc41d876b4e3d8ace9545f6e9898ef654b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[CodeGen] Use llvm::append_range (NFC) (#135567)
Commit: f1ba4bb805b918bc464aa7232cb446cca10ef5a3
https://github.com/llvm/llvm-project/commit/f1ba4bb805b918bc464aa7232cb446cca10ef5a3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
Log Message:
-----------
[Target] Use llvm::append_range (NFC) (#135568)
Commit: 1f195afa57942db3f616e0595eb5816d1359dd2e
https://github.com/llvm/llvm-project/commit/1f195afa57942db3f616e0595eb5816d1359dd2e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[Sema] Use llvm::erase_if (NFC) (#135574)
Commit: ebba554a3211b0b98d3ae33ba70f9d6ceaab6ad4
https://github.com/llvm/llvm-project/commit/ebba554a3211b0b98d3ae33ba70f9d6ceaab6ad4
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/test/CodeGen/attr-target-x86.c
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489)
According to SDM, they require both VAES/VPCLMULQDQ and AVX10.1 CPUID
bits.
Fixes: #135394
Commit: a32d4917c82840179a9ff5686567834922fc4e6d
https://github.com/llvm/llvm-project/commit/a32d4917c82840179a9ff5686567834922fc4e6d
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Clean up the code for isBareSimmNLsb0. NFC.
Commit: 7778a197e65ad1b0cae794318870d41d8c59a3fb
https://github.com/llvm/llvm-project/commit/7778a197e65ad1b0cae794318870d41d8c59a3fb
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
Log Message:
-----------
[MC] Remove unused `MCAsmBackend::isMicroMips()` method (NFC) (#135581)
The only use was removed by 4c892770.
Commit: e038c5401c99ca1f19a873a5c88ad7db4645a26a
https://github.com/llvm/llvm-project/commit/e038c5401c99ca1f19a873a5c88ad7db4645a26a
Author: Tianle Liu <tianle.l.liu at intel.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
A llvm/test/Other/new-pm-lto-prelink-samplepgo-inline-threshold.ll
R llvm/test/Other/new-pm-thinlto-prelink-samplepgo-inline-threshold.ll
Log Message:
-----------
[LTO][Pipelines] Add 0 hot-caller threshold for SamplePGO + FullLTO (#135152)
If a hot callsite function is not inlined in the 1st build, inlining the
hot callsite in pre-link stage of SPGO 2nd build may lead to Function
Sample not found in profile file in link stage. It will miss some
profile info.
ThinLTO has already considered and dealed with it by setting
HotCallSiteThreshold to 0 to stop the inline. This patch just adds the
same processing for FullLTO.
Commit: 5ecc0ef6b01fe9dcca8fcaa8b306cd94c2239db4
https://github.com/llvm/llvm-project/commit/5ecc0ef6b01fe9dcca8fcaa8b306cd94c2239db4
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/IR/EnumAttr.td
M mlir/include/mlir/IR/Properties.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/IR/enum-attr-invalid.mlir
M mlir/test/IR/enum-attr-roundtrip.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir] Improve EnumProp, making it take an EnumInfo (#132349)
This commit improves the `EnumProp` class, causing it to wrap around an
`EnumInfo` just like` EnumAttr` does. This EnumProp also has logic for
converting to/from an integer attribute and for being read and written
as bitcode.
The following variants of `EnumProp` are provided:
- `EnumPropWithAttrForm` - an EnumProp that can be constructed from (and
will be converted to, if `storeInCustomAttribute` is true) a custom
attribute, like an `EnumAttr`, instead of a plain integer. This is meant
for backwards compatibility with code that uses enum attributes.
`NamedEnumProp` adds a "`mnemonic` `<` $enum `>`" syntax around the
enum, replicating a common pattern seen in MLIR printers and allowing
for reduced ambiguity.
`NamedEnumPropWithAttrForm` combines both of these extensions.
(Sadly, bytecode auto-upgrade is hampered by the lack of the ability to
optionally parse an attribute.)
Depends on #132148
Commit: d0cf5cd5f9790dc21396936d076389c3be1a9599
https://github.com/llvm/llvm-project/commit/d0cf5cd5f9790dc21396936d076389c3be1a9599
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV][NFC] Make generated intrinsic records more human-readable (#133710)
We add comment markers and print enum names instead of numbers.
For required extensions, we print the feature list instead of raw
bits.
Commit: 47cbc8706cb5d73f2db101165bf213d558f8b0cb
https://github.com/llvm/llvm-project/commit/47cbc8706cb5d73f2db101165bf213d558f8b0cb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#135585)
Commit: 2ff226ae2c9bdafc686d698b69b4a8519213f325
https://github.com/llvm/llvm-project/commit/2ff226ae2c9bdafc686d698b69b4a8519213f325
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MCAsmBackend,Hexagon: Remove MCRelaxableFragment from fixupNeedsRelaxationAdvanced
Among fixupNeedsRelaxationAdvanced (introduced by
https://reviews.llvm.org/D8217) targets, only Hexagon needs the
`MCRelaxableFragment` parameter (commit
86f218e7ec5d941b7785eaebcb8f4cad76db8a64) to get the instruction packet
(MCInst with sub-instruction operands).
As fixupNeedsRelaxationAdvanced follows mayNeedRelaxation, we can store
the MCInst in mayNeedRelaxation and eliminate the MCRelaxableFragment
parameter.
Follow-up to 7c83b7ef1796210451b839f4c58f2815f4aedfe5 that eliminates
the MCRelaxableFragment parameter from fixupNeedsRelaxation.
Commit: b283ff7eb1d7558594063528af7a94cfe2390e98
https://github.com/llvm/llvm-project/commit/b283ff7eb1d7558594063528af7a94cfe2390e98
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A llvm/include/llvm/CodeGen/BranchRelaxation.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/BranchRelaxation.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AArch64/branch-relax-block-size.mir
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
Log Message:
-----------
[CodeGen][NPM] Port BranchRelaxation to NPM (#130067)
This completes the PreEmitPasses.
Commit: 21ff45dea1601d6d12438b5201ff09b8726899be
https://github.com/llvm/llvm-project/commit/21ff45dea1601d6d12438b5201ff09b8726899be
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
Revert "[RISCV][NFC] Make generated intrinsic records more human-readable (#133710)"
This reverts commit d0cf5cd5f9790dc21396936d076389c3be1a9599.
Error: "declaration of ‘clang::RISCV::RequiredExtensions
{anonymous}::SemaRecord::RequiredExtensions’ changes meaning of
‘RequiredExtensions’ [-fpermissive]"
Commit: e57f4e8969db32f075d8f3e554506ec8b187a2f1
https://github.com/llvm/llvm-project/commit/e57f4e8969db32f075d8f3e554506ec8b187a2f1
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV][NFC] Make generated intrinsic records more human-readable (#133710)
We add comment markers and print enum names instead of numbers.
For required extensions, we print the feature list instead of raw
bits.
This recommits d0cf5cd which was reverted by 21ff45d.
Commit: 63e2963f4a24cb9365d1224e69f64bf643171023
https://github.com/llvm/llvm-project/commit/63e2963f4a24cb9365d1224e69f64bf643171023
Author: Michael Park <mcypark at gmail.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/relocatable-modules.cpp
Log Message:
-----------
Support '-fmodule-file-home-is-cwd' for C++ modules. (#135147)
Commit: a3f8359410eb7e14c4a52b47f36e433af40c05e9
https://github.com/llvm/llvm-project/commit/a3f8359410eb7e14c4a52b47f36e433af40c05e9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
Log Message:
-----------
[lldb][test] Fix NativePDB/inline_sites_live.cpp inlined frame format
Adjust after https://github.com/llvm/llvm-project/pull/135343
Commit: 58b5df09dc6f899016fc707bf937b36b36934b6d
https://github.com/llvm/llvm-project/commit/58b5df09dc6f899016fc707bf937b36b36934b6d
Author: YunQiang Su <syq at debian.org>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-maxnum-minnum.c
Log Message:
-----------
Clang: Add elementwise minnum/maxnum builtin functions (#129207)
With https://github.com/llvm/llvm-project/pull/112852, we claimed that
llvm.minnum and llvm.maxnum should treat +0.0>-0.0, while libc doesn't
require fmin(3)/fmax(3) for it.
To make llvm.minnum/llvm.maxnum easy to use, we define the builtin
functions for them, include
__builtin_elementwise_minnum
__builtin_elementwise_maxnum
All of them support _Float16, __bf16, float, double, long double.
Commit: 9df153bc146eab7e6c48d5083acb87a6d5c42394
https://github.com/llvm/llvm-project/commit/9df153bc146eab7e6c48d5083acb87a6d5c42394
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove unused requiresScalarEpilogue function. nfc (#135341)
Commit: ffd5b148941a1146378a247c70c4faface3a1f96
https://github.com/llvm/llvm-project/commit/ffd5b148941a1146378a247c70c4faface3a1f96
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
Log Message:
-----------
[LV] Add test cases for reverse accesses involving irregular types. nfc (#135139)
Add a test with irregular type to ensure the vector load/store
instructions are not generated.
Commit: e710a5a9f274162c63e32aa8d88f6a734759b4a5
https://github.com/llvm/llvm-project/commit/e710a5a9f274162c63e32aa8d88f6a734759b4a5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[InstCombine] Fold fneg/fabs patterns with ppc_f128 (#130557)
This patch is needed by
https://github.com/llvm/llvm-project/pull/130496.
Commit: 1380a8259e5937d7e871c7a754bbf8a662aaa4da
https://github.com/llvm/llvm-project/commit/1380a8259e5937d7e871c7a754bbf8a662aaa4da
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-13 (Sun, 13 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[AMDGPU] Use llvm::find and llvm::find_if (NFC) (#135582)
Commit: 893cd69872ca8e7be8010699aac32c5678a0e2a6
https://github.com/llvm/llvm-project/commit/893cd69872ca8e7be8010699aac32c5678a0e2a6
Author: Shao-Ce SUN <sunshaoce at outlook.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
A llvm/test/CodeGen/RISCV/emit-x8-as-fp.ll
A llvm/test/MC/Disassembler/RISCV/emit-x8-as-fp.txt
A llvm/test/MC/RISCV/emit-x8-as-fp.s
Log Message:
-----------
[RISCV][MC] Emit `x8` as `fp` instead of `s0` (#135500)
When emphasizing `X8`'s functionality related to Frame Pointer, this option can be passed.
Commit: 150e7b14f9474bc4d6891faaae4de6b8c5f6c797
https://github.com/llvm/llvm-project/commit/150e7b14f9474bc4d6891faaae4de6b8c5f6c797
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A llvm/test/CodeGen/X86/pr134602.ll
Log Message:
-----------
[X86] Add test coverage for #134602
Commit: cf188d650ce26b4ee3e11101d844361fca15ba64
https://github.com/llvm/llvm-project/commit/cf188d650ce26b4ee3e11101d844361fca15ba64
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
A llvm/test/CodeGen/AMDGPU/promote-alloca-non-byte-sizes.ll
Log Message:
-----------
[AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (#134042)
This patch addresses three problems when promoting allocas to vectors:
- Element types with size < 1 byte in allocas with a vector type caused
divisions by zero.
- Element types whose size doesn't match their AllocSize hit an assertion.
- Access types whose size doesn't match their AllocSize hit an assertion.
With this patch, we do not attempt to promote affected allocas to vectors. In
principle, we could handle these cases in PromoteAlloca, e.g., by truncating
and extending elements from/to their allocation size. It's however unclear if
we ever encounter such cases in practice, so that doesn't seem worth the added
complexity.
For SWDEV-511252
Commit: 53cd5cfc675dad1bf6bc820a72e0eaa72a8909e7
https://github.com/llvm/llvm-project/commit/53cd5cfc675dad1bf6bc820a72e0eaa72a8909e7
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
A clang/test/Driver/arm-fpu-selection.s
A clang/test/Driver/armv7-default-neon.s
A clang/test/Driver/armv7s-default-vfpv4.s
M clang/test/Driver/armv8.1m.main.s
Log Message:
-----------
[Clang][ARM] Ensure FPU Features are parsed when targeting `cc1as` (#134612)
Previously, `cc1as` did not consider the Features that can be included
from a target's FPU. This could lead to a situation where assembly files
could not compile as cc1as did not know if a feature was supported.
With this change, all the features for the FPU will be passed to `cc1as`
as `-target-feature` lines. By making this change, it will enable
`+nosimd` to be functional, worked on in #130623, and fix a regression
introduced in 8fa0f0efce5fb81eb422e6d7eec74c66dafef4a3 so
armv7s-apple-darwin targets can utilise VFPv4 correctly.
---------
Co-authored-by: Martin Storsjö <martin at martin.st>
Commit: 1df4af6cbcc3bda86fa76b9aba01424ab39077a4
https://github.com/llvm/llvm-project/commit/1df4af6cbcc3bda86fa76b9aba01424ab39077a4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
A llvm/test/CodeGen/AArch64/aarch64-sve-fill-spill-pair.ll
A llvm/test/CodeGen/AArch64/sve-vls-ldst-opt.mir
Log Message:
-----------
Reapply "[AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128." (#135177)
Reapplies #134068.
The first patch was missing a check to prevent attempts to pair SVE
fill/spill with other Neon load/store instructions, which could happen
specifically if the Neon instruction was unscaled.
Commit: ed96e4642c76fa199cc427129e6d03fba301a301
https://github.com/llvm/llvm-project/commit/ed96e4642c76fa199cc427129e6d03fba301a301
Author: Matthias Braun <matze at braunis.de>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/peephole-orr.mir
Log Message:
-----------
AArch64: Allow ZEXT+COPY -> FMOV peephole for ZPR registers as well (#135436)
Commit: e29f986838bcd0ff60cf33e7ae5ee867bad0de00
https://github.com/llvm/llvm-project/commit/e29f986838bcd0ff60cf33e7ae5ee867bad0de00
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/X86/fake-use-remove-loads.mir
Log Message:
-----------
[CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (#130068)
Commit: 51fe5d2c314619796c29af6bd717c5c212faa811
https://github.com/llvm/llvm-project/commit/51fe5d2c314619796c29af6bd717c5c212faa811
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/array.ll
Log Message:
-----------
[InstCombine] Pre-commit tests related to ADDLIKE+GEP->GEP+GEP. NFC (#135154)
InstCombine can transform ADD+GEP into GEP+GEP. But those rewrites does
not currently trigger when the ADD is a disjoint OR (which happens to be
the canonical form for certain ADD operations). Add lit tests to show
that we are lacking such rewrites.
Also add a test case showing that we do not preserve "inbounds nuw",
"nusw nuw" and "nuw" when doing such transforms and the ADD/OR is
known to be NUW.
Commit: 97bc9137e545423334b00d60ab64855ccc434c3a
https://github.com/llvm/llvm-project/commit/97bc9137e545423334b00d60ab64855ccc434c3a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github][CI] Upload artifacts directory for premerge workflow
The premerge pipeline currently creates an artifacts directory with some
statistics that gets uploaded on the buildkite side for later
inspection. This patch adds support for this on the Github side by using
the upload artifacts action.
Reviewers: Keenuts, lnihlen, mizvekov, tstellar, Endilll
Reviewed By: mizvekov
Pull Request: https://github.com/llvm/llvm-project/pull/135538
Commit: ebd1667059e7b2865a8e419a21df4d4c9735869c
https://github.com/llvm/llvm-project/commit/ebd1667059e7b2865a8e419a21df4d4c9735869c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#135584)
Commit: d792094c26dc6b40136f1e6c2e393c041062e371
https://github.com/llvm/llvm-project/commit/d792094c26dc6b40136f1e6c2e393c041062e371
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/include/lldb/Host/ProcessRunLock.h
M lldb/source/Host/common/ProcessRunLock.cpp
M lldb/source/Host/windows/ProcessRunLock.cpp
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Remove ProcessRunLock::TrySetRunning (#135455)
I traced the issue reported by Caroline and Pavel in #134757 back to the
call to ProcessRunLock::TrySetRunning. When that fails, we get a
somewhat misleading error message:
> process resume at entry point failed: Resume request failed - process
still running.
This is incorrect: the problem was not that the process was in a running
state, but rather that the RunLock was being held by another thread
(i.e. the Statusline). TrySetRunning would return false in both cases
and the call site only accounted for the former.
Besides the odd semantics, the current implementation is inherently
race-y and I believe incorrect. If someone is holding the RunLock, the
resume call should block, rather than give up, and with the lock held,
switch the running state and report the old running state.
This patch removes ProcessRunLock::TrySetRunning and updates all callers
to use ProcessRunLock::SetRunning instead. To support that,
ProcessRunLock::SetRunning (and ProcessRunLock::SetStopped, for
consistency) now report whether the process was stopped or running
respectively. Previously, both methods returned true unconditionally.
The old code has been around pretty much pretty much forever, there's
nothing in the git history to indicate that this was done purposely to
solve a particular issue. I've tested this on both Linux and macOS and
confirmed that this solves the statusline issue.
A big thank you to Jim for reviewing my proposed solution offline and
trying to poke holes in it.
Commit: 73b554d7a0a666e252f3c837510a55ee1acb1df5
https://github.com/llvm/llvm-project/commit/73b554d7a0a666e252f3c837510a55ee1acb1df5
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/source/Core/Statusline.cpp
Log Message:
-----------
[lldb] Make sure the process is stopped when computing the symbol context (#135458)
Make sure the process is stopped when computing the symbol context. Both
Adrian and Felipe reported a handful of crashes in GetSymbolContext
called from Statusline::Redraw on the default event thread.
Given that we're handling a StackFrameSP, it's not clear to me how that
could have gotten invalidated, but Jim points out that it doesn't make
sense to compute the symbol context for the frame when the process isn't
stopped.
Depends on #135455
Commit: 931a78a1db3da210a1ed5681778e37fa011cdf23
https://github.com/llvm/llvm-project/commit/931a78a1db3da210a1ed5681778e37fa011cdf23
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-sext.mir
Log Message:
-----------
[AMDGPU] Add sext_trunc in RegBankCombiner (#131623)
Commit: 95d526f7f587cc7a3db785169967f8dad0ba3978
https://github.com/llvm/llvm-project/commit/95d526f7f587cc7a3db785169967f8dad0ba3978
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[MLIR][Tosa] Fix argmax NaN propagate lowering (#133074)
In the propagate mode, NaN compare equal to each other so in case of
several NaNs the index of the first one needs to be returned. This
commit changes the index update condition to check that the current
index is not that of a NaN.
The commit also simplifies argmax NaN ignore lowering to only use OGT.
This prevent any update in case of NaN. The only case where the index of
a NaN is returned is when all values are NaN and this is covered by the
fact that the initial index value is 0 so no update will result in 0
being returned.
Commit: bcd7f54d340c54630a63659e439540891f7efb09
https://github.com/llvm/llvm-project/commit/bcd7f54d340c54630a63659e439540891f7efb09
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M .mailmap
Log Message:
-----------
[mailmap] Update my name
Commit: 29555ad5efea20308c7a5ee851a4cba9093a607d
https://github.com/llvm/llvm-project/commit/29555ad5efea20308c7a5ee851a4cba9093a607d
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/array.ll
Log Message:
-----------
[InstCombine] Improve inbounds preservation for ADD+GEP -> GEP+GEP (#135155)
Given that we have a "add nuw" and a "getelementptr inbounds nuw" like
this:
%idx = add nuw i64 %idx1, %idx2
%gep = getelementptr inbounds nuw i32, ptr %ptr, i64 %idx
Then we can preserve the "inbounds nuw" flag when transforming that into
two getelementptr instructions:
%gep1 = getelementptr inbounds nuw i32, ptr %ptr, i64 %idx1
%gep = getelementptr inbounds nuw i32, ptr %ptr, i64 %idx2
Similarly for just having "nuw", and "nusw nuw" instead of "inbounds nuw"
on the getelementptr.
Proof: https://alive2.llvm.org/ce/z/QSweWW
Commit: dffef041d568e945efbd78c8eb1a3881b67cd405
https://github.com/llvm/llvm-project/commit/dffef041d568e945efbd78c8eb1a3881b67cd405
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[IR][ADT] Remove `APFloat/Type::isIEEE` (#130496)
Address comment
https://github.com/llvm/llvm-project/pull/130477#issuecomment-2708801892.
Commit: cbda72a5474112e6bc62d5c5978ada7581e80dad
https://github.com/llvm/llvm-project/commit/cbda72a5474112e6bc62d5c5978ada7581e80dad
Author: Wenju He <wenju.he at intel.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
R libclc/generic/include/clc/atom_decl_int32.inc
R libclc/generic/include/clc/atom_decl_int64.inc
A libclc/generic/include/clc/atomic/atom_add.h
A libclc/generic/include/clc/atomic/atom_and.h
A libclc/generic/include/clc/atomic/atom_cmpxchg.h
A libclc/generic/include/clc/atomic/atom_dec.h
A libclc/generic/include/clc/atomic/atom_decl_int32.inc
A libclc/generic/include/clc/atomic/atom_decl_int64.inc
A libclc/generic/include/clc/atomic/atom_inc.h
A libclc/generic/include/clc/atomic/atom_max.h
A libclc/generic/include/clc/atomic/atom_min.h
A libclc/generic/include/clc/atomic/atom_or.h
A libclc/generic/include/clc/atomic/atom_sub.h
A libclc/generic/include/clc/atomic/atom_xchg.h
A libclc/generic/include/clc/atomic/atom_xor.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_xor.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_xor.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_xor.h
M libclc/generic/include/clc/clc.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/atom_int32_binary.inc
A libclc/generic/lib/atomic/atom_add.cl
A libclc/generic/lib/atomic/atom_and.cl
A libclc/generic/lib/atomic/atom_cmpxchg.cl
A libclc/generic/lib/atomic/atom_dec.cl
A libclc/generic/lib/atomic/atom_inc.cl
A libclc/generic/lib/atomic/atom_int32_binary.inc
A libclc/generic/lib/atomic/atom_max.cl
A libclc/generic/lib/atomic/atom_min.cl
A libclc/generic/lib/atomic/atom_or.cl
A libclc/generic/lib/atomic/atom_sub.cl
A libclc/generic/lib/atomic/atom_xchg.cl
A libclc/generic/lib/atomic/atom_xor.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_xor.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_xor.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_xor.cl
Log Message:
-----------
[NFC][libclc] Merge atomic extension built-ins with identical name into a single file (#134489)
llvm-diff shows there is no change to amdgcn--amdhsa.bc.
Similar to how cl_khr_fp64 and cl_khr_fp16 implementations are put in a
same file for math built-ins, this PR do the same to atom_* built-ins.
The main motivation is to prevent that two files with same base name
implementats different built-ins. In a follow-up PR, I'd like to relax
libclc_configure_lib_source to only compare filename instead of path for
overriding, since in our downstream the same category of built-ins, e.g.
math, are organized in several different folders.
Commit: 77341388a77b1442b3a54d745fc269dabb175f0c
https://github.com/llvm/llvm-project/commit/77341388a77b1442b3a54d745fc269dabb175f0c
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[mlir][OpenMP] allow cancellation to not be directly nested (#134084)
omp.cancel and omp.cancellationpoint contain an attribute describing the
type of parent construct which should be cancelled. e.g.
```
!$omp cancel do
```
Must be inside of a wsloop. Previously the verifer required the
immediate parent to be this operation. This is not quite right because
something like the following is valid:
```
!$omp parallel do
do i = 1, N
if (cond) then
!$omp cancel do
endif
enddo
```
This patch relaxes the verifier to only require that some parent
operation matches (not necessarily the immediate parent).
Commit: c9eebc7af440dc012c94d25351eaba92e6a57910
https://github.com/llvm/llvm-project/commit/c9eebc7af440dc012c94d25351eaba92e6a57910
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-sext-inreg.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-trunc-sextinreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
Log Message:
-----------
[GlobalISel] Combine redundant sext_inreg (#131624)
Commit: a9474191e059edbb9b25c769afbe52c7a823f359
https://github.com/llvm/llvm-project/commit/a9474191e059edbb9b25c769afbe52c7a823f359
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
Log Message:
-----------
[SROA] Improve handling of lifetimes in load-only promotion (#135382)
The propagateStoredValuesToLoads() transform currently bails out if
there is a lifetime intrinsic spanning the whole alloca, but the
individual loads/stores operate on some smaller part, because the slice
/ partition size does not match.
Fix this by ignoring assume-like slices early, regardless of which range
they cover.
I've changed the overall code structure here a bit because I was getting
confused by the different iterators.
Commit: 1e2dc5b0873d990473bba4a52d5085a805f56845
https://github.com/llvm/llvm-project/commit/1e2dc5b0873d990473bba4a52d5085a805f56845
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Transforms/SROA/readonlynocapture.ll
Log Message:
-----------
[SROA] Add load-only promotion tests with dynamic offset load
Commit: e4a672bc17a2a7dc39e51c9f5e656d705312a12b
https://github.com/llvm/llvm-project/commit/e4a672bc17a2a7dc39e51c9f5e656d705312a12b
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Core/RichManglingContext.h
M lldb/include/lldb/Target/Language.h
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/RichManglingContext.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/RichManglingContextTest.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
M lldb/unittests/Language/ObjC/ObjCLanguageTest.cpp
Log Message:
-----------
[LLDB] Reapply refactored CPlusPlusLanguage::MethodName to break lldb-server dependencies (#135033)
The original PR is #132274.
Co-authored-by: @bulbazord Alex Langford
Commit: 90c01f4bad3132fcff4a73fb39efb64fe4c524b6
https://github.com/llvm/llvm-project/commit/90c01f4bad3132fcff4a73fb39efb64fe4c524b6
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add missing bitmask for some extensions (#135599)
According to:
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/main/src/c-api.adoc#extension-bitmask-definitions
And we sort the bitmask by group id and then bit position.
Commit: 123993fd974629ca0a094918db4c21ad1c2624d0
https://github.com/llvm/llvm-project/commit/123993fd974629ca0a094918db4c21ad1c2624d0
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
A llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP] Make getSameOpcode support interchangeable instructions. (#133888)
We use the term "interchangeable instructions" to refer to different
operators that have the same meaning (e.g., `add x, 0` is equivalent to
`mul x, 1`).
Non-constant values are not supported, as they may incur high costs with
little benefit.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: e8e98683d70b81802659fa31b458ce3251971248
https://github.com/llvm/llvm-project/commit/e8e98683d70b81802659fa31b458ce3251971248
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV][NFC] Use bitmasks generated by TableGen
So that we don't need to sync-up the table manually.
Reviewers: BeMg, preames, lenary
Reviewed By: BeMg
Pull Request: https://github.com/llvm/llvm-project/pull/135600
Commit: 1c04ebbbb5aff6da50aa62f08b2453e741484b85
https://github.com/llvm/llvm-project/commit/1c04ebbbb5aff6da50aa62f08b2453e741484b85
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/utils/LLVMVisualizers/llvm.natvis
M llvm/utils/gdb-scripts/prettyprinters.py
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
Remove debugger pretty printers for llvm::Optional (#135235)
Since 2916b99182752b1aece8cc4479d8d6a20b5e02da this is just an alias to
std::optional, and by now it has been removed entirely.
Commit: 14cb8c56b26784c684865053a6deb066f9a5e5b5
https://github.com/llvm/llvm-project/commit/14cb8c56b26784c684865053a6deb066f9a5e5b5
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/Endian.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[lldb] add required for lldb RISCV relocations in MCJIT (#126266)
After implementing CFI instructions in the function prologue, LLDB
testing for RISC-V started failing due to insufficient relocations
(e.g., R_RISCV_SET8, R_RISCV_SET16).
This patch adds support for the necessary RISC-V relocations in MCJIT.
Commit: fe54d1afcca055f464840654dd2ec3fd83aea688
https://github.com/llvm/llvm-project/commit/fe54d1afcca055f464840654dd2ec3fd83aea688
Author: Iris <0.0 at owo.li>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
Log Message:
-----------
[ConstraintElim] Simplify cmp after uadd.sat/usub.sat (#135603)
- Closes #135557
Commit: 88d0b0835d030635c5d08c9a9754c21b5ac00be9
https://github.com/llvm/llvm-project/commit/88d0b0835d030635c5d08c9a9754c21b5ac00be9
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Basic/ABI.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
R clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
R clang/test/SemaCXX/gh134265.cpp
Log Message:
-----------
[MS][clang] Revert vector deleting destructors support (#135611)
Finding operator delete[] is still problematic, without it the extension
is a security hazard, so reverting until the problem with operator
delete[] is figured out.
This reverts the following PRs:
Reland [MS][clang] Add support for vector deleting destructors (llvm#133451)
[MS][clang] Make sure vector deleting dtor calls correct operator delete (llvm#133950)
[MS][clang] Fix crash on deletion of array of pointers (llvm#134088)
[clang] Do not diagnose unused deleted operator delete[] (llvm#134357)
[MS][clang] Error about ambiguous operator delete[] only when required (llvm#135041)
Commit: cbbf562d1c2a076de83d50fedfee78acfb4d8003
https://github.com/llvm/llvm-project/commit/cbbf562d1c2a076de83d50fedfee78acfb4d8003
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/include/lldb/Core/FormatEntity.h
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb][Format][NFC] Remove unused FormatEntity::FormatCString
One can use `FormatStringRef` instead anyway
Commit: 0078cf79adc2f24a168bc774cba1f39dda5e3752
https://github.com/llvm/llvm-project/commit/0078cf79adc2f24a168bc774cba1f39dda5e3752
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/DefiningDialects/_index.md
M mlir/docs/Diagnostics.md
M mlir/docs/Interfaces.md
M mlir/docs/PDLL.md
M mlir/docs/Tutorials/QuickstartRewrites.md
M mlir/docs/Tutorials/Toy/Ch-5.md
M mlir/docs/Tutorials/Toy/Ch-7.md
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/examples/transform-opt/mlir-transform-opt.cpp
M mlir/include/mlir/IR/AffineExpr.h
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/include/mlir/IR/Location.h
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/IR/Value.h
M mlir/include/mlir/Tools/PDLL/AST/Types.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.h
M mlir/lib/Dialect/Transform/Transforms/TransformInterpreterUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/IR/SymbolTableTest.cpp
Log Message:
-----------
[mlir] Remove deprecated cast member functions (#135556)
These have been deprecated for over two years now in favor of free
functions.
See the relevant discourse thread:
https://discourse.llvm.org/t/preferred-casting-style-going-forward/68443
and the deprecation notice: https://mlir.llvm.org/deprecation/.
Commit: 0c21d6b4c8ad7310b0cd81bbefa06b2947b671f9
https://github.com/llvm/llvm-project/commit/0c21d6b4c8ad7310b0cd81bbefa06b2947b671f9
Author: Wenju He <wenju.he at intel.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Fix commands in compile_to_bc are executed sequentially (#130755)
In libclc, we observe that compiling OpenCL source files to bitcode is
executed sequentially on Windows, which increases debug build time by
about an hour.
add_custom_command may introduce additional implicit dependencies, see
https://gitlab.kitware.com/cmake/cmake/-/issues/17097
This PR adds a target for each command, enabling parallel builds of
OpenCL source files.
CMake 3.27 has fixed above issue with DEPENDS_EXPLICIT_ONLY. When LLVM
upgrades cmake vertion to 3.7, we can switch to DEPENDS_EXPLICIT_ONLY.
Commit: 4eaf3a7596fb335edfa36368c2851a256b6e8d75
https://github.com/llvm/llvm-project/commit/4eaf3a7596fb335edfa36368c2851a256b6e8d75
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Support/ELFAttrParserExtended.cpp
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-long.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-short.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-type.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-values.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-ver.s
Log Message:
-----------
[readobj][ELF][AArch64] Handle misformed AArch64 build attribute section (#134888)
Report an error when the .ARM.attributes section for AArch64 is
malformed or violates expected format.
Commit: 4cb1803ff9d052f1b75d90d5be87345e54aebf92
https://github.com/llvm/llvm-project/commit/4cb1803ff9d052f1b75d90d5be87345e54aebf92
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc][NFC] Fix typo in comment
Commit: 10a15024212fe9ac06adad7daad2c1bb510a612c
https://github.com/llvm/llvm-project/commit/10a15024212fe9ac06adad7daad2c1bb510a612c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/AST/ast-dump-array.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[clang] AST: remove source locations from [Variable/Dependent]SizedArrayType (#135511)
Commit: efe9cb0f79a074ab472ec51d8463aac6931d670a
https://github.com/llvm/llvm-project/commit/efe9cb0f79a074ab472ec51d8463aac6931d670a
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-extract.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-extract-mova.ll
Log Message:
-----------
[AArch64] Model ZA array using inaccessible memory (#132058)
This patch changes how ZA array is modelled at LLVM-IR level. Currently
accesses to ZA are represented at LLVM-IR level as memory reads and
writes and at instruction level as unmodeled side-effects. This patch
changes that and models them as purely Inaccessible memory accesses
without any unmodeled side-effects.
Commit: 74e8f29f3138431abc9b393579733f3bbd0d85d8
https://github.com/llvm/llvm-project/commit/74e8f29f3138431abc9b393579733f3bbd0d85d8
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll
A llvm/test/CodeGen/AArch64/csr-copy-hint.mir
M llvm/test/CodeGen/AArch64/ptrauth-ret.ll
M llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
M llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
M llvm/test/CodeGen/AVR/dynalloca.ll
M llvm/test/CodeGen/AVR/return.ll
M llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
M llvm/test/CodeGen/SPARC/32abi.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SPARC/bigreturn.ll
M llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
M llvm/test/CodeGen/SPARC/leafproc.ll
M llvm/test/CodeGen/SPARC/parts.ll
M llvm/test/CodeGen/SPARC/tailcall.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
M llvm/test/CodeGen/X86/ghc-cc64.ll
M llvm/test/CodeGen/X86/mwaitx.ll
Log Message:
-----------
[RegAlloc] Sort CopyHint by IsCSR (#131046)
`weightCalcHelper` is responsible for adding hints to MRI. Prior to this
PR, we fell back on register ID as the last tie breaker for sorting
hints. However, there is an opportunity to add an additional sorting
characteristic: whether or not a register is a callee-saved-register.
I thought of this idea because I saw that `AllocationOrder::create`
calls `RegisterClassInfo::getOrder`, which returns a list of registers
such that the registers which alias callee-saved-registers come last.
>From this, I conclude that the register allocator prefers an order such
that callee-saved-registers are allocated after
non-callee-saved-registers to avoid having to spill the CSR.
This sorting characteristic occurs only as a tie breaker to the Weight
calculation. This is a good idea since the weight calculation is pretty
complex and I'm sure it is a pretty stable metric. I think its pretty
reasonable to agree that whether a register is callee-saved or not is a
better tie breaker than register ID. I think this is evident by the test
diff, since the changes all seem to have no impact or improve the
register allocation.
Commit: bcbdbd25c0a2608299a4e97f12076be06a64d724
https://github.com/llvm/llvm-project/commit/bcbdbd25c0a2608299a4e97f12076be06a64d724
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/ELFAttributes.h
Log Message:
-----------
[llvm][ELF][build attributes] Change StringRef to std::string for BuildAttributeSubSection::Name (#135625)
BuildAttributeSubSection::Name must be a std::string instead of
StringRef because it may be assigned from non-persistent memory.
StringRef is non-owning and unsafe in this context. This change ensures
the subsection name owns its memory, preventing use-after-free or
dangling references.
Context: Work in progress in PR #131990.
Commit: dbeb7c1bbbc90f3d556b9d010d7899311cfc62d6
https://github.com/llvm/llvm-project/commit/dbeb7c1bbbc90f3d556b9d010d7899311cfc62d6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[Github][CI] Upload .ninja_log as an artifact
This enables using tools like https://github.com/nico/ninjatracing for
performance introspection.
Reviewers: mizvekov, lnihlen, tstellar, Endilll, Keenuts
Reviewed By: Keenuts
Pull Request: https://github.com/llvm/llvm-project/pull/135539
Commit: 40727bca9fa4c5c9a3c12ce47ee09efcd3f26761
https://github.com/llvm/llvm-project/commit/40727bca9fa4c5c9a3c12ce47ee09efcd3f26761
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[clang] remove unused frontend flag -fretain-subst-template-type-parm-type-ast-nodes (#134177)
This is a follow-up to #132748, where we deferred the flag removal in
order to ease transition for external users.
The plan is to merge this in the nearish future, in two weeks or so is
my best guess.
Commit: a485abbddda7997177b1b56f4dc8e9c069ae4d9a
https://github.com/llvm/llvm-project/commit/a485abbddda7997177b1b56f4dc8e9c069ae4d9a
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/test/Driver/do_concurrent_to_omp_cli.f90
Log Message:
-----------
[flang] Fix Driver/do_concurrent_to_omp_cli.f90 test not to use runtime (#135485)
Fix Flang invocation in `Driver/do_concurrent_to_omp_cli.f90` test to
run compilation step only, to fix testing when building with
`-DFLANG_INCLUDE_RUNTIME=OFF`. The test is only concerned with warning
being emitted by the compiler, so there is no need to link the resulting
executable.
Commit: 092b6e73e651469527662443b592f98f442ece72
https://github.com/llvm/llvm-project/commit/092b6e73e651469527662443b592f98f442ece72
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/array.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/vscale_gep.ll
M llvm/test/Transforms/LoopUnroll/runtime-multiexit-heuristic.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
Log Message:
-----------
[InstCombine] Handle "add like" in ADD+GEP->GEP+GEP rewrites (#135156)
Considering that "or disjoint" is the canonical for certain add
operations, then I think we want to support such "add like" operations
when doing ADD+GEP->GEP+GEP rewrites to make things more consistent.
Problem was found when improving ValueTracking, which turned an ADD into
OR, and then suddenly optimizations got worse due to these rewrites no
longer triggering.
Commit: b2c9a58b8f28b353b3f0b4ef98fa704c463ba1a4
https://github.com/llvm/llvm-project/commit/b2c9a58b8f28b353b3f0b4ef98fa704c463ba1a4
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Lower/OpenMP/optional-argument-map.f90
A offload/test/offloading/fortran/optional-mapped-arguments.f90
Log Message:
-----------
[Flang][OpenMP][MLIR] Check for presence of Box type before emitting store in MapInfoFinalization pass (#135477)
Currently we don't check for the presence of descriptor/BoxTypes before
emitting stores which lower to memcpys, the issue with this is that
users can have optional arguments, where they don't provide an input,
making the argument effectively null. This can still be mapped and this
causes issues at the moment as we'll emit a memcpy for function
arguments to store to a local variable for certain edge cases, when we
perform this memcpy on a null input, we cause a segfault at runtime.
The fix to this is to simply create a branch around the store that
checks if the data we're copying from is actually present. If it is, we
proceed with the store, if it isn't we skip it.
Commit: f133eae70c8b9f4e70372443b79995c5f39727f0
https://github.com/llvm/llvm-project/commit/f133eae70c8b9f4e70372443b79995c5f39727f0
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A llvm/include/llvm/CodeGen/SanitizerBinaryMetadata.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/SanitizerBinaryMetadata.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/tools/llc/new-pm/pipeline.ll
Log Message:
-----------
[CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (#130069)
Didn't find a test for this (but there are tests for the `Function`
version of this pass)
Commit: 44e32a263a7a696e17f8785108e89e1cb1cbd850
https://github.com/llvm/llvm-project/commit/44e32a263a7a696e17f8785108e89e1cb1cbd850
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll
M llvm/test/Verifier/SystemZ/intrinsic-immarg.ll
M llvm/test/Verifier/intrinsic-immarg.ll
Log Message:
-----------
[Verifier] Fix intrinsic signatures in immarg tests (NFC)
Commit: 2d30a60e9ff8b22f7e07ca5360fe1582f96be1ac
https://github.com/llvm/llvm-project/commit/2d30a60e9ff8b22f7e07ca5360fe1582f96be1ac
Author: John Harrison <harjohn at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/cancel/Makefile
A lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
A lldb/test/API/tools/lldb-dap/cancel/main.c
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
A lldb/tools/lldb-dap/Handler/CancelRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adding support for cancelling a request. (#130169)
Adding support for cancelling requests.
There are two forms of request cancellation.
* Preemptively cancelling a request that is in the queue.
* Actively cancelling the in progress request as a best effort attempt
using `SBDebugger.RequestInterrupt()`.
Commit: b04045cc4165fae487d048bbf928be26e068284e
https://github.com/llvm/llvm-project/commit/b04045cc4165fae487d048bbf928be26e068284e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 2d30a60e9ff8
Commit: fcf0f810ac4b22bda3f21048784ee114da1cb061
https://github.com/llvm/llvm-project/commit/fcf0f810ac4b22bda3f21048784ee114da1cb061
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
A clang/test/Driver/hip-thinlto.hip
Log Message:
-----------
[Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (#134476)
In HIP, the Clang driver already sets `force-import-all` when ThinLTO is
enabled. As a result, all imported functions get the
`available_externally`
linkage. However, these functions are later removed by the
`EliminateAvailableExternallyPass`, effectively undoing the forced
import and
eventually leading to link errors.
The `EliminateAvailableExternallyPass` provides an option to convert
`available_externally` functions into local functions, renaming them to
avoid
conflicts. This behavior is exactly what we need for HIP. This PR
enables that
option (`avail-extern-to-local`) alongside `force-import-all` when
ThinLTO is
used.
With this change, ThinLTO almost works correctly on AMDGPU. The only
remaining
issue is an undefined reference to `__assert_fail`, but that falls
outside the
scope of this PR.
Commit: da6f493d4aab7ac18b680345701d210556438048
https://github.com/llvm/llvm-project/commit/da6f493d4aab7ac18b680345701d210556438048
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/docs/ModFiles.md
Log Message:
-----------
[flang][NFC] Update module file documentation (#135107)
The current module file documentation antedates the current
implementation of module files and contains many aspirational and
conditional statements, all of which can now be resolved with
descriptions of how things actually work.
Commit: dba757a33c9a07a632c8f14d6820dd6cd90fc918
https://github.com/llvm/llvm-project/commit/dba757a33c9a07a632c8f14d6820dd6cd90fc918
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/bug518.F
Log Message:
-----------
[flang] Rework preprocessor fix for replacement in kind suffixes (#135406)
Recent work to better handle macro replacement in literal constant kind
suffixes isn't handling fixed form well, leading to a crash in Fujitsu
test 0113/0113_0073.F. The look-ahead needs to be done with the
higher-level prescanner functions that skip over fixed form comment
fields after column 72. Rework.
Commit: 13b55ad3bb6bafda7d8a62c5fe2fc98157442355
https://github.com/llvm/llvm-project/commit/13b55ad3bb6bafda7d8a62c5fe2fc98157442355
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/StaticAccessedThroughInstanceCheck.cpp
M clang-tools-extra/clang-tidy/utils/Matchers.cpp
M clang/include/clang/AST/PrettyPrinter.h
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/AST/ast-dump-templates.cpp
M clang/test/CXX/temp/temp.decls/temp.mem/p5.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang] implement printing of canonical expressions (#135133)
This patch extends the canonicalization printing policy to cover
expressions
and template names, and wires that up to the template argument printer,
covering expressions, and to the expression within a dependent decltype.
This is helpful for debugging, or if these expressions somehow end up
in diagnostics, as without this patch they can print as completely
unrelated
expressions, which can be quite confusing.
This is because expressions are not uniqued, unlike types, and
when a template specialization containing an expression is the first to
be
canonicalized, the expression ends up appearing in the canonical type of
subsequent equivalent specializations.
Fixes https://github.com/llvm/llvm-project/issues/92292
Commit: 882200684bf1a0edcd3a8edd31c3fd601a2298df
https://github.com/llvm/llvm-project/commit/882200684bf1a0edcd3a8edd31c3fd601a2298df
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Parser/OpenMP/bug518.f
Log Message:
-----------
[flang][OpenMP] Prescanning bug with !$ fixed form line continuation (#135416)
The logic for fixed form compiler directive line continuation has a hole
that can apply continuation for !$ even if the next line does not begin
with a fixed form comment character. Rearrange the nested if statements
to enforce that requirement for all compiler directives.
Commit: 9f7aac177cac18e03ca68e2a69e06700250cd3d7
https://github.com/llvm/llvm-project/commit/9f7aac177cac18e03ca68e2a69e06700250cd3d7
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/spec-expr.f90
Log Message:
-----------
[flang] Allow host-associated INTENT(OUT) in specification expr. (#135426)
Nearly, but not all, other compilers have a blanket prohibition against
the use of an INTENT(OUT) dummy argument in a specification expression.
Some compilers, however, permit an INTENT(OUT) dummy argument to appear
in a specification expression in a BLOCK construct or inner procedure
via host association.
The argument some have put forth to accept this usage comes from a
reading of 10.1.11 (specification expressions) in Fortran 2023 that, if
followed consistently, would also require host-associated OPTIONAL dummy
argument to be allowed. That would be dangerous for reasons that should
be obvious.
However, I can agree that a non-OPTIONAL dummy argument can't be assumed
to remain undefined on entry to a BLOCK construct or inner procedure, so
we can accept host-associated INTENT(OUT) in specification expressions
with a portability warning.
Commit: 8ede3dd8a19e5bc3db5ba7f7d6b9273f88d2bbee
https://github.com/llvm/llvm-project/commit/8ede3dd8a19e5bc3db5ba7f7d6b9273f88d2bbee
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
Log Message:
-----------
[NFC][MC] Use `StringRef` for Modifier in Inst/Asm Printers (#135403)
- Change various Inst/Asm Printer functions to use a StringRef for the
Modifier parameter (instead of a const char *).
- This simplifies various string comparisons used within these
functions.
- Remove these params for print functions that do not use them.
Commit: 71d10590dbc041139644f00144513c7f487a94ba
https://github.com/llvm/llvm-project/commit/71d10590dbc041139644f00144513c7f487a94ba
Author: Camsyn <camsyn at foxmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CaptureTracking.h
Log Message:
-----------
[CaptureTracking][NFC] Clarify usage expectations in PointerMayBeCaptured comments (#132744)
Fixes issue #132739.
CaptureAnalysis only considers captures through the def-use chain of the
provided pointer, explicitly excluding captures of underlying values or
implicit captures like those involving external globals.
The previous comment for `PointerMayBeCaptured` did not clearly state
this limitation, leading to its incorrect usage in files such as
ThreadSanitizer.cpp and SanitizerMetadata.cpp.
This PR addresses this by refining the comments for the relevant APIs
within `PointerMayBeCaptured` to explicitly document this behavior.
Commit: 2e353a635b90a6c31eee5fd4ec0335f37f130628
https://github.com/llvm/llvm-project/commit/2e353a635b90a6c31eee5fd4ec0335f37f130628
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/docs/OpenACC.md
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-declare-validity.f90
Log Message:
-----------
[flang][openacc] Relax constraint on OpenACC declare statement (#135238)
OpenACC declare statements are restricted from having having clauses
that reference assumed size arrays. It should be the case that we can
implement `deviceptr` and `present` clauses for assumed-size arrays.
This is a first step towards relaxing this restriction.
Note running flang on the following example results in an error in
lowering.
```
$ cat t.f90
subroutine vadd (a, b, c, n)
real(8) :: a(*), b(*), c(*)
!$acc declare deviceptr(a, b, c)
!$acc parallel loop
do i = 1,n
c(i) = a(i) + b(i)
enddo
end subroutine
$ flang -fopenacc -c t.f90
error: loc("/home/akuhlenschmi/work/p4/ta/tests/openacc/src/t.f90":3:7): expect declare attribute on variable in declare operation
error: Lowering to LLVM IR failed
error: loc("/home/akuhlenschmi/work/p4/ta/tests/openacc/src/t.f90":4:7): unsupported OpenACC operation: acc.private.recipe
error: loc("/home/akuhlenschmi/work/p4/ta/tests/openacc/src/t.f90":4:7): LLVM Translation failed for operation: acc.private.recipe
error: failed to create the LLVM module
```
I would like to to share this code, because others are currently working
on the implementation of `deviceptr`, but it is obviously not running
end-to-end. I think the cleanest approach to this would be to put this
exception to the rule behind some feature flag, but I am not certain
what the precedence for that is.
Commit: 04b6f541b7ab6c1b25371cb248277c2b391040c9
https://github.com/llvm/llvm-project/commit/04b6f541b7ab6c1b25371cb248277c2b391040c9
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86Subtarget.h
Log Message:
-----------
[NFC][llvm] Create UEFI helper function (#132462)
Create useful helper functions for UEFI 64 bit target that can be used in
tablegen files in future changes.
Commit: fef5b6f9530c52d623f4729900855e626d5ee722
https://github.com/llvm/llvm-project/commit/fef5b6f9530c52d623f4729900855e626d5ee722
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
Log Message:
-----------
[NFC][LLVM][PowerPC] Cleanup pass initialization for PowerPC (#134422)
- Remove calls to pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767
Commit: 4983aec494119048ccbdd19d237f92ebb24c5d62
https://github.com/llvm/llvm-project/commit/4983aec494119048ccbdd19d237f92ebb24c5d62
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
R flang/test/Lower/OpenMP/Todo/depend-clause-vector-subscript-array-section.f90
M flang/test/Lower/OpenMP/task-depend-array-section.f90
Log Message:
-----------
[flang][OpenMP][HLFIR] Support vector subscripted array sections for DEPEND (#133892)
The OpenMP runtime needs the base address of the array section to
identify the dependency.
If we just put the vector subscript through the usual HLFIR expression
lowering, that would generate a new contiguous array representing the
values of the elements in the array which was sectioned. We cannot use
addresses from this array because these addresses would not match
dependencies on the original array. For example
```
integer :: array(1024)
integer :: indices(2)
indices(1) = 1
indices(2) = 100
!$omp task depend(out: array(1:512))
!$omp end task
!$omp task depend(in: array(indices))
!$omp end task
```
This requires taking the lowering path previously only used for ordered
assignments to get the address of the elements in the original array
which were indexed. This is done using `hlfir.elemental_addr`. e.g.
```
array(indices) = 2
```
`hlfir.elemental_addr` is awkward to use because it (by design) doesn't
return something like `!hlfir.expr<>` (like `hlfir.elemental`) and so it
can't have a generic lowering: each place it is used has to carefully
inline the contents of the operation and extract the needed address.
For this reason, `hlfir.elemental_addr` is not allowed outside of these
ordered assignments. In this commit I ignore this restriction so that I
can use `hlfir.elemental_addr` to lower the OpenMP DEPEND clause (this
works because the operation is inlined and removed before the verifier
runs).
One alternative solution would have been to provide my own more limited
re-implementation of `HlfirDesignatorBuilder` which skipped
`hlfir::elemental_addr`, instead inlining its body directly at the
current insertion point applying indices only for the first element.
This would have been difficult to maintain because designation in
Fortran is complex.
Commit: f9b8971bea0d93fe6b86364bb02a96a35eee9aba
https://github.com/llvm/llvm-project/commit/f9b8971bea0d93fe6b86364bb02a96a35eee9aba
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Align RFFT2d and FFT2d operator examples (#135261)
* Minor variable name alignment
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 45aba5149b94412da01eef482e8b815a9889779b
https://github.com/llvm/llvm-project/commit/45aba5149b94412da01eef482e8b815a9889779b
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Align AddOp examples to spec (#135266)
* simple example variable name alignment
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 5d489f484867b7ddcb3efe51144a133970921082
https://github.com/llvm/llvm-project/commit/5d489f484867b7ddcb3efe51144a133970921082
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Align AbsOp example variable names (#135268)
* Minor example variable name alignment
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 88c3e0eecffd42c6743638db51ad6db379996ff2
https://github.com/llvm/llvm-project/commit/88c3e0eecffd42c6743638db51ad6db379996ff2
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
Log Message:
-----------
[CVP] Add tests for ucmp/scmp with switch (NFC)
Commit: 1175f5b988ce706fd3e084912ed34ae6254f5cc3
https://github.com/llvm/llvm-project/commit/1175f5b988ce706fd3e084912ed34ae6254f5cc3
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__verbose_abort
M libcxx/src/verbose_abort.cpp
Log Message:
-----------
[libc++] Removes the _LIBCPP_VERBOSE_ABORT_NOT_NOEXCEPT macro. (#135494)
This makes __libcpp_verbose_abort unconditionally noexcept. This was
planned for the upcomming release.
Commit: 9800c3489a06a285cbc469a9aab4601e57dac35a
https://github.com/llvm/llvm-project/commit/9800c3489a06a285cbc469a9aab4601e57dac35a
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/test/Interpreter/inline-virtual.cpp
Log Message:
-----------
[Interp] Mark inline-virtual.cpp as unsupported with ASan (#135402)
See https://github.com/llvm/llvm-project/issues/135401 for the full flakiness report.
It fails on stage2/asan_ubsan check with:
```
+ /home/b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/clang-repl -Xcc -fno-rtti -Xcc -fno-sized-deallocation
JIT session error: In graph incr_module_23-jitted-objectbuffer, section .text.startup: relocation target "_ZN1AD2Ev" at address 0x79618c48d040 is out of range of Delta32 fixup at 0x75618b40d02d (<anonymous block> @ 0x75618b40d010 + 0x1d)
error: Failed to materialize symbols: { (main, { $.incr_module_23.__inits.0, __orc_init_func.incr_module_23, a2 }) }
error: Failed to materialize symbols: { (main, { __orc_init_func.incr_module_23 }) }
The error message ("out of range of Delta32") appears similar to #102858, another Interpreter test that is flaky with ASan.
```
Recent test history on the x86_64-linux-fast bot:
- https://lab.llvm.org/buildbot/#/builders/169/builds/10339: fail
- 10340: buildbot logistical problem
- https://lab.llvm.org/buildbot/#/builders/169/builds/10341: fail
- https://lab.llvm.org/buildbot/#/builders/169/builds/10342: fail
- 10343: pass
- 10344: pass
- https://lab.llvm.org/buildbot/#/builders/169/builds/10345: fail
- 10346: pass
...
Commit: 6b863e810d6decb689bff8f6620e8ea07b356d86
https://github.com/llvm/llvm-project/commit/6b863e810d6decb689bff8f6620e8ea07b356d86
Author: John Harrison <harjohn at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/tools/lldb-dap/Transport.cpp
Log Message:
-----------
[lldb-dap] Fix win32 build. (#135638)
This enum was not fully specified.
Commit: 3b1dafd4271ced4c75625176c6d37f41fe85fc70
https://github.com/llvm/llvm-project/commit/3b1dafd4271ced4c75625176c6d37f41fe85fc70
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++][CI] Pin the XCode version. (#135412)
This version is the current version, to avoid unplanned automatic
updates in the future pin this version.
Commit: e071233fa527027c021509fcbd41238aa9bae2e1
https://github.com/llvm/llvm-project/commit/e071233fa527027c021509fcbd41238aa9bae2e1
Author: Dominik Steenken <dost at de.ibm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
Log Message:
-----------
[SystemZ] Consider VST/VL as SimpleBDXStore/Load (#135623)
Previously `vst` and `vl` were not considered "simple" BDX stores and
loads, leading to, among other things, some opportunities for `mvc`
optimization to be missed.
This PR addresses this and updates some tests to account for additional
`mvc` instructions being emitted.
This is observed to have a neutral or slightly beneficial effect
performance-wise.
Commit: e7aed23d32cb3a1082c5ce9bbe16eb2b56ebe55f
https://github.com/llvm/llvm-project/commit/e7aed23d32cb3a1082c5ce9bbe16eb2b56ebe55f
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/RootAutoDetector.cpp
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
Log Message:
-----------
[ctxprof] Handle instrumenting functions with `musttail` calls (#135121)
Functions with `musttail` calls can't be roots because we can't instrument their `ret` to release the context. This patch tags their `CtxRoot` field in their `FunctionData`. In compiler-rt we then know not to allow such functions become roots, and also not confuse `CtxRoot == 0x1` with there being a context root.
Currently we also lose the context tree under such cases. We can, in a subsequent patch, have the root detector search past these functions.
Commit: 305006179341d8f657b89fdc7d76502f9bc5f0aa
https://github.com/llvm/llvm-project/commit/305006179341d8f657b89fdc7d76502f9bc5f0aa
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/AArch64/stack-size-section.ll
M llvm/test/CodeGen/SystemZ/stack-size-section.ll
Log Message:
-----------
[AsmPrinter] Link .section_sizes to the correct section (#135583)
AsmPrinter may switch the current section when e.g., emitting a jump
table for a switch. `.stack_sizes` should still be linked to the
function section. If the section is wrong, readelf emits a warning
"relocation symbol is not in the expected section".
Commit: aad09da2adb67f5d2db83bed57c4e0d3f4821d86
https://github.com/llvm/llvm-project/commit/aad09da2adb67f5d2db83bed57c4e0d3f4821d86
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRCG/CMakeLists.txt
Log Message:
-----------
[flang] Fix linking to libMLIR (#135483)
Fix regression to MLIR dylib support introduced in #135240. Without the
fix, the build with no static libraries fails:
```
FAILED: bin/fir-opt
: && /usr/lib/ccache/bin/x86_64-pc-linux-gnu-g++ -O2 -pipe -march=native -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -Wno-deprecated-copy -Wno-ctad-maybe-unsupported -fno-strict-aliasing -fno-semantic-interposition -Wl,-O1 -Wl,--as-needed -Wl,-z,pack-relative-relocs -Wl,-rpath-link,/var/tmp/portage/llvm-core/flang-21.0.0.9999/work/flang_build/lib -Wl,--gc-sections -Wl,--dependency-file=tools/fir-opt/CMakeFiles/fir-opt.dir/link.d tools/fir-opt/CMakeFiles/fir-opt.dir/fir-opt.cpp.o -o bin/fir-opt -L/usr/lib/llvm/21/lib64 -Wl,-rpath,"\$ORIGIN/../lib64:/usr/lib/llvm/21/lib64:" lib/libCUFAttrs.a lib/libCUFDialect.a lib/libFIRDialect.a lib/libFIRSupport.a lib/libFIRTransforms.a lib/libFIRCodeGen.a lib/libFIRCodeGenDialect.a lib/libHLFIRDialect.a lib/libHLFIRTransforms.a lib/libFIROpenACCSupport.a lib/libFIROpenMPSupport.a lib/libFlangOpenMPTransforms.a lib/libFIRAnalysis.a lib/libFIRTransforms.a lib/libFIRCodeGen.a lib/libFIROpenACCSupport.a lib/libFIRCodeGenDialect.a -lMLIRIR lib/libFIROpenMPSupport.a lib/libFIRAnalysis.a lib/libFIRBuilder.a lib/libCUFDialect.a lib/libFIRSupport.a lib/libHLFIRDialect.a lib/libFIRDialect.a lib/libCUFAttrs.a lib/libFIRDialectSupport.a lib/libFortranEvaluate.a lib/libFortranDecimal.a lib/libFortranParser.a lib/libFortranSupport.a /usr/lib/llvm/21/lib64/libMLIR.so.21.0gitfa4ac19f /usr/lib/llvm/21/lib64/libclang-cpp.so.21.0gitfa4ac19f /usr/lib/llvm/21/lib64/libLLVM.so.21.0gitfa4ac19f -lquadmath && :
/usr/lib/gcc/x86_64-pc-linux-gnu/14/../../../../x86_64-pc-linux-gnu/bin/ld: cannot find -lMLIRIR: No such file or directory
collect2: error: ld returned 1 exit status
```
Commit: 2a83c0cc134471bdbc8342041d12fa514e17eca1
https://github.com/llvm/llvm-project/commit/2a83c0cc134471bdbc8342041d12fa514e17eca1
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/runtime/relative-vftable.cpp
Log Message:
-----------
[BOLT] Support relative vtable (#135449)
To handle relative vftable, which is enabled with clang option
`-fexperimental-relative-c++-abi-vtables`, we look for PC relative
relocations whose fixup locations fall in vtable address ranges.
For such relocations, actual target is just virtual function itself,
and the addend is to record the distance between vtable slot for
target virtual function and the first virtual function slot in vtable,
which is to match generated code that calls virtual function. So
we can skip the logic of handling "function + offset" and directly
save such relocations for future fixup after new layout is known.
Commit: 3e644859470e9ba77b8365cc7e2b5234492f4c30
https://github.com/llvm/llvm-project/commit/3e644859470e9ba77b8365cc7e2b5234492f4c30
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
Log Message:
-----------
Remove the redundant check for "WeakPtr" in isSmartPtrClass to fix the issue 135612. (#135629)
Commit: da17ced11b1cf44b433cb2b850978df4b6bff279
https://github.com/llvm/llvm-project/commit/da17ced11b1cf44b433cb2b850978df4b6bff279
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/DirectX.cpp
M clang/test/CodeGenDirectX/Builtins/dot2add.c
M clang/test/CodeGenHLSL/builtins/dot2add.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/dot2_error.ll
M llvm/test/CodeGen/DirectX/dot2add.ll
M llvm/test/CodeGen/DirectX/dot3_error.ll
M llvm/test/CodeGen/DirectX/dot4_error.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/normalize.ll
Log Message:
-----------
[DirectX] Use scalar arguments for @llvm.dx.dot intrinsics (#134570)
The `dx.dot2`, `dot3`, and `dot4` intrinsics exist purely to lower
`dx.fdot`, and they map exactly to the DXIL ops of the same name. Using
vectors for their arguments adds unnecessary complexity and causes us to
have vector operations that are not trivial to lower post-scalarizer.
Similarly, the `dx.dot2add` intrinsic is overly generic for something
that only needs to lower to a single `dot2AddHalf` DXIL op. Update its
signature to match the operation it lowers to.
Fixes #134569.
Commit: df84aa8e06d98875fdbaf08e466dcf3eebe27fa3
https://github.com/llvm/llvm-project/commit/df84aa8e06d98875fdbaf08e466dcf3eebe27fa3
Author: Mateusz Sokół <8431159+mtsokol at users.noreply.github.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/Traits.cpp
M mlir/test/Dialect/Shape/canonicalize.mlir
Log Message:
-----------
[MLIR][Shape] Support >2 args in `shape.broadcast` folder (#126808)
Hi!
As the title says, this PR adds support for >2 arguments in
`shape.broadcast` folder by sequentially calling `getBroadcastedShape`.
Commit: c9ec1bc753b0bae7137547e1e39823b2effe82c1
https://github.com/llvm/llvm-project/commit/c9ec1bc753b0bae7137547e1e39823b2effe82c1
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
A flang/test/HLFIR/volatile1.fir
A flang/test/HLFIR/volatile2.fir
A flang/test/HLFIR/volatile3.fir
A flang/test/HLFIR/volatile4.fir
Log Message:
-----------
[flang] Handle volatility in lowering and codegen (#135311)
* Enable lowering and conversion patterns to pass volatility information
from higher level operations to lower level ones.
* Enable codegen to pass volatility to LLVM dialect ops by setting an
attribute on loads, stores, and memory intrinsics.
* Add utilities for passing along the volatility from an input type to
an output type.
To introduce volatile types into the IR, entities with the volatile
attribute will be given a volatile type in the bridge; this is not
enabled in this patch. User code should not result in IR with volatile
types yet, so this patch contains no tests with Fortran source, only IR
that already contains volatile types.
Part 3 of #132486.
Commit: da8ce56c53fe6e34809ba0b310fa90257e230a89
https://github.com/llvm/llvm-project/commit/da8ce56c53fe6e34809ba0b310fa90257e230a89
Author: aankit-ca <quic_aankit at quicinc.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
A llvm/test/CodeGen/Hexagon/hwloop-dist-check.mir
M llvm/test/CodeGen/Hexagon/swp-phi-start.ll
Log Message:
-----------
[HEXAGON] Fix corner cases for hwloops pass (#135439)
Add check to make sure Dist > 0 or Dist < 0 for appropriate cmp cases to
hexagon hardware loops pass. The change modifies the
HexagonHardwareLoops pass to add runtime checks to make sure that
end_value > initial_value for less than comparisons and end_value <
initial_value for greater than comparisons.
Fix for https://github.com/llvm/llvm-project/issues/133241
@androm3da @iajbar PTAL
---------
Co-authored-by: aankit-quic <aankit at quicinc.com>
Commit: c766d0c7321b12db12b3b087941e86df0f1a75d1
https://github.com/llvm/llvm-project/commit/c766d0c7321b12db12b3b087941e86df0f1a75d1
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
Log Message:
-----------
[NFC][AsmPrinter] Refactor AsmPrinter and AArch64AsmPrinter to prepare for jump table partitions on aarch64 (#125993)
With
https://github.com/llvm/llvm-project/commit/3feb724496238ce10d32e8c2bd84b4ea50f9977e,
AsmPrinter can place jump table entries into `.hot` or `.unlikely`
prefixed data sections. This change refactors AsmPrinter and
AArch64AsmPrinter to prepare for the aarch64 port.
* Before this patch, the AsmPrinter class exposes `emitJumpTableInfo` as
a virtual method, and AArch64AsmPrinter overrides `emitJumpTableInfo`
for jump table emission.
* After this patch, both AsmPrinter and AArch64AsmPrinter shares
`AsmPrinter::emitJumpTableInfo`, and class-specific code are moved
inside each class's `emitJumpTableImpl` respectively.
This is a follow-up of https://github.com/llvm/llvm-project/pull/125987,
and https://github.com/llvm/llvm-project/pull/126018 implements the port
for aarch64.
Commit: c5ac63e4fcd58c951f10c3902d8a6692e0a43c55
https://github.com/llvm/llvm-project/commit/c5ac63e4fcd58c951f10c3902d8a6692e0a43c55
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/ThinLTOBitcodeWriter.h
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
A llvm/test/Bitcode/thinlto-preserve-uselistorder.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/unsplittable.ll
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
ThinLTO: Add flag to print uselistorder in bitcode writer pass (#133230)
This is needed in llvm-reduce to avoid perturbing the uselistorder in
intermediate steps. Really llvm-reduce wants pure serialization with
no dependency on the pass manager. There are other optimizations mixed
in to the serialization here depending on metadata in the module, which
is also bad.
Part of #63621
Commit: bae08dad69674385ee8bb2e97423e72dad98435a
https://github.com/llvm/llvm-project/commit/bae08dad69674385ee8bb2e97423e72dad98435a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A llvm/test/tools/llvm-reduce/thinlto-preserve-uselistorder.ll
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
Log Message:
-----------
llvm-reduce: Preserve uselistorder when writing thinlto bitcode (#133369)
Fixes #63621
Commit: 904f1b17d30335b102bd05f63a73e9ed5576ba0a
https://github.com/llvm/llvm-project/commit/904f1b17d30335b102bd05f63a73e9ed5576ba0a
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[CMake] Configure ccache using command line options (#134857)
Since ccache 4.8, it is possible to pass configuration options directly
to ccache on the command line as opposed to through environment
variables.
This is the intended way for CMake to configure ccache, as described on
the GitHub wiki for the project:
https://github.com/ccache/ccache/wiki/CMake
This should allow for uniform ccache configuration that does not rely on
platform-specific environment setup.
Rework the way ccache is configured by LLVM accordingly.
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: a43ff0ec8a684b2f8e93bb9f6df3b513c577091b
https://github.com/llvm/llvm-project/commit/a43ff0ec8a684b2f8e93bb9f6df3b513c577091b
Author: Petr Hosek <phosek at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/aarch64/headers.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
Log Message:
-----------
[libc] Include extra baremetal headers and entrypoints (#135462)
These are all usable in baremetal environments.
Commit: 2b58b3df0bad3de1887fcb113a5eed7ab714812a
https://github.com/llvm/llvm-project/commit/2b58b3df0bad3de1887fcb113a5eed7ab714812a
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "[CMake] Configure ccache using command line options" (#135664)
Reverts llvm/llvm-project#134857
Commit: 9deb08a30196b5b3b3883b5c7be8c4251039bde7
https://github.com/llvm/llvm-project/commit/9deb08a30196b5b3b3883b5c7be8c4251039bde7
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
A mlir/include/mlir-c/Dialect/SMT.h
A mlir/include/mlir-c/Target/ExportSMTLIB.h
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SMT.cpp
M mlir/lib/CAPI/Target/CMakeLists.txt
A mlir/lib/CAPI/Target/ExportSMTLIB.cpp
M mlir/lib/Target/SMTLIB/CMakeLists.txt
M mlir/test/CAPI/CMakeLists.txt
A mlir/test/CAPI/smt.c
M mlir/test/CMakeLists.txt
Log Message:
-----------
[mlir][SMT] C APIs (#135501)
This PR upstreams/adds the C APIs for SMT dialect (from CIRCT).
---------
Co-authored-by: Bea Healy <beahealy22 at gmail.com>
Co-authored-by: Martin Erhart <maerhart at outlook.com>
Co-authored-by: Mike Urbach <mikeurbach at gmail.com>
Co-authored-by: Will Dietz <will.dietz at sifive.com>
Co-authored-by: fzi-hielscher <hielscher at fzi.de>
Co-authored-by: Fehr Mathieu <mathieu.fehr at gmail.com>
Co-authored-by: Clo91eaf <Clo91eaf at qq.com>
Commit: b07fc0fd5e26f894e3a80373577cb5979b8b54bb
https://github.com/llvm/llvm-project/commit/b07fc0fd5e26f894e3a80373577cb5979b8b54bb
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
[HLSL] Move Resource Instance Properties from TypeInfo (#135259)
Fixes https://github.com/llvm/llvm-project/issues/134741
Moves Resource Instance properties from type info into resource info as
described in
https://github.com/llvm/wg-hlsl/blob/main/proposals/0022-resource-instance-analysis.md
Commit: 202cd7bb33b8116bbfc6e25eef8ad8446c57bed5
https://github.com/llvm/llvm-project/commit/202cd7bb33b8116bbfc6e25eef8ad8446c57bed5
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/metadata.ll
Log Message:
-----------
[LV] Extend metadata.ll tests to also check interleaving.
Adds missing test coverage for presering existing metadata when
interleaving.
Commit: be4c99ae112f572695c3e187f4ef4ac4cd592783
https://github.com/llvm/llvm-project/commit/be4c99ae112f572695c3e187f4ef4ac4cd592783
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
Log Message:
-----------
[AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (#126018)
This is a follow-up patch of
https://github.com/llvm/llvm-project/pull/125993 to port jump table
partitions for aarch64.
---------
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: 061f87f75f38e80e7494b5f7235103f7f11a36c3
https://github.com/llvm/llvm-project/commit/061f87f75f38e80e7494b5f7235103f7f11a36c3
Author: MillePlateaux <liulambda at outlook.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaStmt.cpp
A clang/test/Sema/attr-musttail.cpp
Log Message:
-----------
[Clang][Sema]:Fix musttail attribute on a function with not_tail_called attribute has no warning/error (#134465)
The error is emitted when a musttail call is made to a function marked
with the not_tail_called attribute.Closes #133509
Commit: a2c57e1dec7e5641a3cc82dbfb397bea058c03cd
https://github.com/llvm/llvm-project/commit/a2c57e1dec7e5641a3cc82dbfb397bea058c03cd
Author: David Green <david.green at arm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
Log Message:
-----------
[AArch64][GlobalISel] Remove unnecessary fp convert patterns. NFC
We nowadays legalize the fp converts to legal operations earlier, not requiring
patterns that select to multiple instructions.
Commit: f5c5f9f926cb93c58e8cc6302f788474909606b0
https://github.com/llvm/llvm-project/commit/f5c5f9f926cb93c58e8cc6302f788474909606b0
Author: Tsz Chan <keithcth2001 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_itimerval.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_itimerval.h
M libc/include/sys/time.yaml
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/getitimer.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/getitimer.cpp
A libc/src/sys/time/linux/setitimer.cpp
A libc/src/sys/time/setitimer.h
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/getitimer_test.cpp
A libc/test/src/sys/time/setitimer_test.cpp
Log Message:
-----------
[libc] Implement getitimer and setitimer, add proxy headers for itimerval (#134773)
#133983
Commit: 9332f1ea57fb7486c79003eaff43d27bfedea1af
https://github.com/llvm/llvm-project/commit/9332f1ea57fb7486c79003eaff43d27bfedea1af
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-options.hip
Log Message:
-----------
[Clang] add option --offload-jobs=N (#135229)
for specifying number of threads for clang-linker-wrapper.
Commit: 9ba65cbcb5ea24d8f65cbe82474b7513501c5470
https://github.com/llvm/llvm-project/commit/9ba65cbcb5ea24d8f65cbe82474b7513501c5470
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Refactor DecoderEmitter.cpp (#135510)
- Add helper functions to insert ULEB128 encoded value and NumToSkip.
- Use ArrayRef<> instead of const vector references as function
arguments.
- Return `OpHasCompleteDecoder` by value instead of by reference.
- Use range for loops.
- Remove {} around single line if/else bodies.
- In `emitSoftFailTableEntry`, unconditionally emit the Positive and
Negative mask values, instead of explicitly emitting a 0 byte when
the mask is not needed.
Commit: 52166339f1f74f7d97a54eaf687bb5de167f040d
https://github.com/llvm/llvm-project/commit/52166339f1f74f7d97a54eaf687bb5de167f040d
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/blockaddress-canonicalize.mlir
A mlir/test/Dialect/LLVMIR/indirectbr.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/indirectbr.ll
A mlir/test/Target/LLVMIR/indirectbr.mlir
M mlir/test/mlir-translate/import-diagnostics.ll
Log Message:
-----------
[MLIR][LLVM] Support for indirectbr (#135092)
Now that LLVM dialect has `blockaddress` support, introduce import/translation for `indirectbr` instruction.
Commit: 41892fc4353d2dd705666783d799e79748467ed8
https://github.com/llvm/llvm-project/commit/41892fc4353d2dd705666783d799e79748467ed8
Author: Theo de Magalhaes <theo.de-magalhaes at epita.fr>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/SemaCXX/windows-Wpadded-bitfield.cpp
A clang/test/SemaCXX/windows-Wpadded.cpp
Log Message:
-----------
[CLANG-CL] ignores Wpadded (#134426)
[clang] add support for -Wpadded on Windows
Implements the -Wpadded warning for --target=x86_64-windows-msvc etc.
Fixes #61702 .
Commit: 924cf536cebffa7aa67e2dd2f7528fb9629a6f3e
https://github.com/llvm/llvm-project/commit/924cf536cebffa7aa67e2dd2f7528fb9629a6f3e
Author: Joy <yutche at qti.qualcomm.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/cpus.ll
Log Message:
-----------
[AArch64] Add missing test for Qualcomm Oryon-1 processor (#135258)
For completeness add oryon-1 test case to test verifying all valid
AArch64 CPUs are accepted by llc.
Commit: 54b33eba1657f4bfe11db5cc1c562a2d2172c7e3
https://github.com/llvm/llvm-project/commit/54b33eba1657f4bfe11db5cc1c562a2d2172c7e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Add opcode to create step for wide inductions. (#119284)
This patch adds a WideIVStep opcode that can be used to create a vector
with the steps to increment a wide induction. The opcode has 2 operands
* the vector step
* the scale of the vector step
The opcode is later converted into a sequence of recipes that convert
the scale and step to the target type, if needed, and then multiply
vector step by scale.
This simplifies code that needs to materialize step vectors, e.g.
replacing wide IVs as follow up to
https://github.com/llvm/llvm-project/pull/108378 with an increment of
the wide IV step.
PR: https://github.com/llvm/llvm-project/pull/119284
Commit: ff687af04f5b0e85305250587b524cb0b3849aa0
https://github.com/llvm/llvm-project/commit/ff687af04f5b0e85305250587b524cb0b3849aa0
Author: Jan Górski <jan.a.gorski at wp.pl>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/atomic-ops-load.c
Log Message:
-----------
[clang][CodeGen] Add range metadata for atomic load of boolean type. #131476 (#133546)
Fixes #131476.
For `x86_64` it folds
```
movzbl t1(%rip), %eax
andb $1, %al
```
into
```
movzbl t1(%rip), %eax
```
when run: `clang -S atomic-ops-load.c -o atomic-ops-load.s -O1
--target=x86_64`.
But for riscv replaces:
```
lb a0, %lo(t1)(a0)
andi a0, a0, 1
```
with
```
lb a0, %lo(t1)(a0)
zext.b a0, a0
```
when run: `clang -S atomic-ops-load.c -o atomic-ops-load.s -O1
--target=riscv64`.
Commit: 557e931d958104eb5d11b93ad3a21e4017812fcd
https://github.com/llvm/llvm-project/commit/557e931d958104eb5d11b93ad3a21e4017812fcd
Author: Damien L-G <dalg24 at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__mdspan/aligned_accessor.h
M libcxx/include/__mdspan/mdspan.h
A libcxx/include/__memory/is_sufficiently_aligned.h
M libcxx/include/mdspan
M libcxx/include/memory
M libcxx/include/module.modulemap
M libcxx/include/version
M libcxx/modules/std/mdspan.inc
M libcxx/modules/std/memory.inc
A libcxx/test/libcxx/containers/views/mdspan/aligned_accessor/byte_alignment.verify.cpp
A libcxx/test/libcxx/containers/views/mdspan/aligned_accessor/element_type.verify.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/access.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.conversion.from.default_accessor.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.conversion.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.default.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/offset.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/operator.conversion.to.default_accessor.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/types.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mdspan.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/memory/ptr.align/is_sufficiently_aligned.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P2897R7 aligned_accessor: An mdspan accessor expressing pointer over-alignment (#122603)
Closes #118372
Commit: cd7d2c3bf89c9f0e6b7467d9d5ac87ddc829975c
https://github.com/llvm/llvm-project/commit/cd7d2c3bf89c9f0e6b7467d9d5ac87ddc829975c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
A clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGen/struct.c
A clang/test/CIR/CodeGen/struct.cpp
A clang/test/CIR/CodeGen/union.c
A clang/test/CIR/IR/struct.cir
Log Message:
-----------
[CIR] Upstream minimal support for structure types (#135105)
This change adds minimal support for structure types. To keep the
initial change small, only incomplete declarations are being supported
in this patch. More complete support will follow.
Commit: 1bcec036e197f6ab7461722502e4393396b46ec3
https://github.com/llvm/llvm-project/commit/1bcec036e197f6ab7461722502e4393396b46ec3
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
A clang/test/CodeGenHipStdPar/rdc-does-not-enable-hipstdpar.cpp
A clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[HIP][HIPSTDPAR][NFC] Re-order & adapt `hipstdpar` specific passes (#134753)
The `hipstdpar` specific passes were not ordered ideally, especially for
`fgpu-rdc` compilations, which meant that we'd eagerly run accelerator
code selection and remove symbols that might end up used. This change
corrects that aspect by ensuring that accelerator code selection is only
done after linking (this will have to be revisited in the future once
the closed-world assumption no longer holds). Furthermore, we take the
opportunity to move allocation interposition so that it properly gets
printed when print-pipeline-passes is requested. NFC.
Commit: 68806b9c2cf732dc93b17e47e5321394e0fcf8bb
https://github.com/llvm/llvm-project/commit/68806b9c2cf732dc93b17e47e5321394e0fcf8bb
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaFixupKinds.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
A llvm/test/CodeGen/Xtensa/minmax.ll
A llvm/test/CodeGen/Xtensa/sext.ll
M llvm/test/MC/Xtensa/Relocations/fixups-diagnostics.s
M llvm/test/MC/Xtensa/Relocations/fixups.s
M llvm/test/MC/Xtensa/Relocations/relocations.s
A llvm/test/MC/Xtensa/loop.s
A llvm/test/MC/Xtensa/minmax.s
A llvm/test/MC/Xtensa/nsau.s
A llvm/test/MC/Xtensa/sext.s
A llvm/test/MC/Xtensa/sext_invalid.s
Log Message:
-----------
[Xtensa] Implement SEXT, NSA, MINMAX and Loop Xtensa Options. (#133818)
Implement basic support of the several simple Xtensa Options with 1-4
instructions for each option. The Sign Extend Option (SEXT). The NSA
Option. The Minimum/Maximum Integer 32-bit Option and Loop Option.
Fixed address operands, added OPERAND_PCREL to operands descriptions.
Commit: eb3ecd158a8aef854f23553f63d118a0c5ef69af
https://github.com/llvm/llvm-project/commit/eb3ecd158a8aef854f23553f63d118a0c5ef69af
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 557e931d9581
Commit: 888b3ed5b4f441b0dea91d7ec2bda1426abeadec
https://github.com/llvm/llvm-project/commit/888b3ed5b4f441b0dea91d7ec2bda1426abeadec
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp:2417:13: error:
unused variable 'ConstStep' [-Werror,-Wunused-variable]
Commit: 2206e15e78bc3d5289fb2c2cf5a80d6f08412a58
https://github.com/llvm/llvm-project/commit/2206e15e78bc3d5289fb2c2cf5a80d6f08412a58
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[alpha.webkit.UnretainedCallArgsChecker] Don't emit a warning for RetainPtr::operator= (#135526)
Generalize the check for operator= so that it works for RetainPtr and
CheckedPtr instead of just RefPtr.
Commit: 820a9b72b2e28b7607691485103f0d7e75baaf42
https://github.com/llvm/llvm-project/commit/820a9b72b2e28b7607691485103f0d7e75baaf42
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
Fix build by marking possibly unused variable such. (#135689) [NFC]
Commit: a9f73ae4494437c606c2b2e869358b75d8e2d45c
https://github.com/llvm/llvm-project/commit/a9f73ae4494437c606c2b2e869358b75d8e2d45c
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
Log Message:
-----------
[CIR] Fix upstream issue. NFC
- 'PrintCanonicalTypes' from the printing policy is renamed as
'PrintAsCanonical'
Commit: 76db259080fa134579f31d76fe9ab462f47eca87
https://github.com/llvm/llvm-project/commit/76db259080fa134579f31d76fe9ab462f47eca87
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/blockaddress-canonicalize.mlir
R mlir/test/Dialect/LLVMIR/indirectbr.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
R mlir/test/Target/LLVMIR/Import/indirectbr.ll
R mlir/test/Target/LLVMIR/indirectbr.mlir
M mlir/test/mlir-translate/import-diagnostics.ll
Log Message:
-----------
Revert "[MLIR][LLVM] Support for indirectbr" (#135695)
Reverts llvm/llvm-project#135092, broke
https://lab.llvm.org/buildbot/#/builders/169/builds/10469
Commit: b9a3e998b1921f7d1e3093f27d288ee1a121ba4b
https://github.com/llvm/llvm-project/commit/b9a3e998b1921f7d1e3093f27d288ee1a121ba4b
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
A clang/test/CodeGenCXX/bug135668.cpp
A clang/test/SemaCXX/bug135668.cpp
Log Message:
-----------
[Clang]Ensure correct handling of cleanup access control (#135668) (#135686)
The P2719 implementation refactored diagnostics for cleanup delete, and
as part of that I attempted to fix handling of inaccessible cleanup
operator delete. Alas the new branch was incorrect as it was performing
an implicit bool conversion, which resulted in friend accessible cleanup
operators incorrectly being considered erroneous and the allocation path
errored out. This error however did not get diagnosed, so the result was
and so we did not actually error out before codegen.
Added both Sema and CodeGen tests to cover this.
Commit: 23e92c985de96ec2f06be1c94228ad5dff2d9097
https://github.com/llvm/llvm-project/commit/23e92c985de96ec2f06be1c94228ad5dff2d9097
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
Log Message:
-----------
[NFC] Fix bot breakage introduced by #134753 (#135697)
This test needs the amdgpu target, and its absence wreaked havoc with
some of the bots, therefore we now require it.
Commit: 7491ff74d2b99c0e5e879ec7fd370fe9654528c4
https://github.com/llvm/llvm-project/commit/7491ff74d2b99c0e5e879ec7fd370fe9654528c4
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M lldb/source/Target/StopInfo.cpp
Log Message:
-----------
[lldb] Override Should{Select,Show} in StopReasonBreakpoint (#135637)
This is necessary so that LLDB does not select (or show the stop reason
for) a thread which stopped at an internal breakpoint.
Other than manual testing/inspection, which I've done, this does not
seem to lend itself to API testing, as we cannot set internal
breakpoints through the SBAPI.
Commit: 3633de702985e1580d72223ae38a31d0e6fd480b
https://github.com/llvm/llvm-project/commit/3633de702985e1580d72223ae38a31d0e6fd480b
Author: nvptm <pmathew at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][acc] Handle OpenACC host_data in LegalizeDataValues (#134767)
`LegalizeDataValuesInRegion` is intended to replace the SSA values used
in a region with the output of data operations, but misses the handling
of the OpenACC `host_data` construct. As a result, currently
```
!$acc host_data use_device(%var)
...%var...
!$acc end host_data
```
is lowered to
```
%dev_var = acc.use_device(%var)
acc.host_data data_operands(%dev_var) {
...%var...
}
```
This pull request updates the LegalizeDataValuesInRegion to handle
HostDataOp such that lowering results in
```
%dev_var = acc.use_device(%var)
acc.host_data data_operands(%dev_var) {
...%dev_var...
}
```
Commit: 15932624537ddba61efae19c9af212d3e47a4c21
https://github.com/llvm/llvm-project/commit/15932624537ddba61efae19c9af212d3e47a4c21
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
SanitizerCoverage: Remove unused field.
Commit: 8fe5ac896f049020c739769c5186b472c639fd30
https://github.com/llvm/llvm-project/commit/8fe5ac896f049020c739769c5186b472c639fd30
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/mmap_limit_mb.cpp
Log Message:
-----------
[Test][Darwin] Disable test on watchos due to memory restraints (#135671)
Because of the nature of this test (mmap stress-test) it tests too large
of memory allocations to be stable on watchos. WatchOS has memory limits
that can lead to the termination of this process before it reaches the
limit set by the flag. Typical only on devices that are under heavy
load. disable on watchOS.
rdar://147222346
Commit: 8e8d04870dbc3248301534796b4370f75e33f7c0
https://github.com/llvm/llvm-project/commit/8e8d04870dbc3248301534796b4370f75e33f7c0
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
Log Message:
-----------
SampleProfileProbe: Remove unused field.
Commit: 07fe9c6461dbdde6f619fc56bd021cd30b3f6327
https://github.com/llvm/llvm-project/commit/07fe9c6461dbdde6f619fc56bd021cd30b3f6327
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
M llvm/test/CodeGen/NVPTX/i1-load-lower.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
Log Message:
-----------
[NVPTX] Use 0 immediate for i1 trunc, cleanup dead code (#135646)
Update the instruction selection for truncation to i1 to use "setp.ne
%v, 0" as the zero immediate is a preferable canonical form. Also remove
some dead code relating to the "set" instruction which we do not
actually support currently.
Commit: fe9e2090be79a2b807d381a0a045bc606d59c33c
https://github.com/llvm/llvm-project/commit/fe9e2090be79a2b807d381a0a045bc606d59c33c
Author: YunQiang Su <syq at debian.org>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fminimumnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/fminimumnum.ll
Log Message:
-----------
Vectorize: Support fminimumnum and fmaximumnum (#131781)
Support auto-vectorize for fminimum_num and fmaximum_num.
For ARM64 with SVE, scalable vector cannot support yet.
---------
Co-authored-by: Your Name <you at example.com>
Commit: a686b783ce244a6dfebd17b717532c516419fc32
https://github.com/llvm/llvm-project/commit/a686b783ce244a6dfebd17b717532c516419fc32
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
Log Message:
-----------
[clang][tests] Add missing FileCheck check, NFC (#135687)
Commit: 6ba32e8eb203ebabd3fc9fffcea2762500f82e3a
https://github.com/llvm/llvm-project/commit/6ba32e8eb203ebabd3fc9fffcea2762500f82e3a
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/test/MC/AMDGPU/vinterp.s
Log Message:
-----------
[AMDGPU][MC] test update with script for vinterp asm test (#135681)
This is a NFC patch.
Run test update with script with --unique options for vinterp test. This
reduce duplications. This prepares for the upcoming true16 clean up
patch
Commit: cc354d6a6da542515fbd6f39dcb9665b7c26a008
https://github.com/llvm/llvm-project/commit/cc354d6a6da542515fbd6f39dcb9665b7c26a008
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor-templates.cpp
M flang/test/Lower/OpenMP/clause-cleanup.f90
M llvm/lib/Target/X86/X86InstrInfo.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
Log Message:
-----------
[NFC] Fix destroy typo. (#135640)
Commit: e96111d3e9ac67b14cab32925717a62258a2bd60
https://github.com/llvm/llvm-project/commit/e96111d3e9ac67b14cab32925717a62258a2bd60
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove redundant check. nfc (#135605)
Remove the redundant `!TheLoop->contains(Op->getParent())` check since
`!TheLoop->contains(Op)` has already been verified.
Commit: 9cdc3aab3eae55be30003cb486f290f3ee3df3a8
https://github.com/llvm/llvm-project/commit/9cdc3aab3eae55be30003cb486f290f3ee3df3a8
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/Mapper.cpp
Log Message:
-----------
[clang-doc] Use SmartMutex when visiting the AST (#135514)
The SmartMutex will allow us to have a cheap mutex implementation when
using the Standalone executor, since it's single threaded. Performance
should be about the same for AllTUs executor.
Commit: 5df9658d4009e500be1421231b48b210e8c2cd69
https://github.com/llvm/llvm-project/commit/5df9658d4009e500be1421231b48b210e8c2cd69
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
Log Message:
-----------
[RISCV] Refactor register list parsing and improve error messages. (#134938)
Structure the code into a loop that parses a series of ranges and gives
an error when there are too many ranges.
Give errors when ABI and non-ABI names are mixed.
Properly diagnose 'x1-` starting a list.
Use a default bool argument to merge parseRegListCommon and
parseRegList.
Commit: f4ff209e4384d8073f36fb7da9916b33f1140edf
https://github.com/llvm/llvm-project/commit/f4ff209e4384d8073f36fb7da9916b33f1140edf
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/openmp-offload-gpu.c
Log Message:
-----------
[Clang] Forward two linker options to `lld` when ThinLTO is enabled for AMDGPU (#135690)
Commit: a6b424e1e7e6aa83ae49e7e12454998d3b195054
https://github.com/llvm/llvm-project/commit/a6b424e1e7e6aa83ae49e7e12454998d3b195054
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp.ll
Log Message:
-----------
[RISCV] Extend redundant vrgather.vx peephole to vfmv.v.f (#135503)
Extend the transform introduced in 336b290 to vfmv.v.f. This is fairly
trivial and would have been in the original commit except I hadn't
written the FP tests yet.
If the vrgather.vi is preceeded by a vfmv.v.f which writes a superset of
the lanes writen by the vrgather, and the vrgather has no passthru, then
the vrgather has no semantic effect.
Commit: 83344da69145a648aad3e0cd88eab4aaf60b2142
https://github.com/llvm/llvm-project/commit/83344da69145a648aad3e0cd88eab4aaf60b2142
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/CodeGenCXX/local-class-instantiation.cpp
Log Message:
-----------
[Clang] Fix dependent local class instantiation bugs (#134038)
This patch fixes two long-standing bugs that prevent Clang from
instantiating local class members inside a dependent context. These bugs
were introduced in commits 21eb1af469c3 and 919df9d75a.
21eb1af469c3 introduced a concept called eligible methods such that it
did an attempt to skip past ineligible method instantiation when
instantiating class members. Unfortunately, this broke the instantiation
chain for local classes - getTemplateInstantiationPattern() would fail
to find the correct definition pattern if the class was defined within a
partially transformed dependent context.
919df9d75a introduced a separate issue by incorrectly copying the
DeclarationNameInfo during function definition instantiation from the
template pattern, even though that DNI might contain a transformed
TypeSourceInfo. Since that TSI was already updated when the declaration
was instantiated, this led to inconsistencies. As a result, the final
instantiated function could lose track of the transformed declarations,
hence we crash: https://compiler-explorer.com/z/vjvoG76Tf.
This PR corrects them by
1. Removing the bypass logic for method instantiation. The eligible flag
is independent of instantiation and can be updated properly afterward,
so skipping instantiation is unnecessary.
2. Carefully handling TypeSourceInfo by creating a new instance that
preserves the pattern's source location while using the already
transformed type.
Fixes https://github.com/llvm/llvm-project/issues/59734
Fixes https://github.com/llvm/llvm-project/issues/132208
Commit: f1dd6b3cf8d957f28e06f475c8a652f201fc830b
https://github.com/llvm/llvm-project/commit/f1dd6b3cf8d957f28e06f475c8a652f201fc830b
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Conversion/TensorToLinalg/tensor-ops-to-linalg.mlir
Log Message:
-----------
[mlir][tensor] Fix `createFillOrGenerateOp` (#121205)
This PR clones the padding value defined inside the PadOp block to
outside to prevent a crash. Fixes #120947.
Commit: 9ce8356acbe3e79764f4147a0e7cc30e1b759b45
https://github.com/llvm/llvm-project/commit/9ce8356acbe3e79764f4147a0e7cc30e1b759b45
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ControlFlowIntegrity.rst
Log Message:
-----------
Fix broken link.
Commit: c3959f22abc62882be6c9df2fe4151c924ac3d9a
https://github.com/llvm/llvm-project/commit/c3959f22abc62882be6c9df2fe4151c924ac3d9a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[MachineLICM] Remove CurPreheader parameter that is always nullptr (#135554)
Also, rename `getCurPreheader` -> `getOrCreatePreheader` to make it
clear that this method may alter CFG.
Update `Changed` if the method modified a loop by splitting a critical
edge (this change is not strictly NFC).
The removed parameter was probably intended to save compile time by not
trying to a critical edge after the first attempt has failed, but it is
only tried once per loop.
PR: https://github.com/llvm/llvm-project/pull/135554
Commit: 8c22f569b3b19450034832769ef77d5b2ec997d7
https://github.com/llvm/llvm-project/commit/8c22f569b3b19450034832769ef77d5b2ec997d7
Author: Matt <mattstark75 at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Modules/safe_buffers_optout.cpp
Log Message:
-----------
[Fix] Speedup -Wunsafe-buffer-usage when using clang modules. (#127161)
Each piece of code should have analysis run on it precisely once.
However, if you build a module, and then build another module depending
on it, the header file of the module you depend on will have
`-Wunsafe-buffer-usage` run on it twice. This normally isn't a huge
issue, but in the case of using the standard library as a module, simply
adding the line `#include <cstddef>` increases compile times by 900ms
(from 100ms to 1 second) on my machine. I believe this is because the
standard library has massive modules, of which only a small part is used
(the AST is ~700k lines), and because if what I've been told is correct,
the AST is lazily generated, and `-Wunsafe-buffer-usage` forces it to be
evaluated every time.
See https://issues.chromium.org/issues/351909443 for details and
benchmarks.
Commit: 984ec70b61cb57b00e622a21b259aaf11775c5f0
https://github.com/llvm/llvm-project/commit/984ec70b61cb57b00e622a21b259aaf11775c5f0
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/docs/ControlFlowIntegrity.rst
Log Message:
-----------
Minor documentation update.
Commit: 1cf9f764ac41fb3492e10c78640dd50e616388db
https://github.com/llvm/llvm-project/commit/1cf9f764ac41fb3492e10c78640dd50e616388db
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
Log Message:
-----------
[clang][frontend] Make `CompilerInstance::FailedModules` thread-safe (#135473)
This PR makes some progress towards making it possible to create clones
of `CompilerInstance` that are independent of each other and can be used
in a multi-threaded setting. This PR tackles
`CompilerInstance::FailedModules`, makes it a value-type instead of a
mutable shared pointer, and adds explicit copies & moves where
appropriate.
Besides that change, this PR also turns two previously free functions
with internal linkage into member functions of `CompilerInstance`, which
makes it possible to reduce the public API of that class that relates to
`FailedModules`. This reduces some API churn that was necessary for each
new member of `CompilerInstance` that needs to be cloned.
Commit: ab58bcfac43d1bf352d7129b786e9c7f28e81fdf
https://github.com/llvm/llvm-project/commit/ab58bcfac43d1bf352d7129b786e9c7f28e81fdf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/tools/llvm-debuginfo-analyzer/llvm-debuginfo-analyzer.cpp
M llvm/tools/llvm-nm/llvm-nm.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[tools] Use llvm::append_range (NFC) (#135721)
Commit: 62ef10a0f62c668e1fa7e357f56052f3364544c5
https://github.com/llvm/llvm-project/commit/62ef10a0f62c668e1fa7e357f56052f3364544c5
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vector types (#132358)
Fixes https://github.com/llvm/llvm-project/issues/128650
Also adds few previously existing permlane64 tests which somehow got
removed in between.
Commit: eb7f51485e8060a390a36a61a30a6f4332c24aae
https://github.com/llvm/llvm-project/commit/eb7f51485e8060a390a36a61a30a6f4332c24aae
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Tools/mlir-pdll-lsp-server/PDLLServer.cpp
M mlir/lib/Tools/tblgen-lsp-server/TableGenServer.cpp
Log Message:
-----------
[mlir] Use llvm::append_range (NFC) (#135722)
Commit: 01c1c78103d026d0d0007ae7b7d54b36edef1324
https://github.com/llvm/llvm-project/commit/01c1c78103d026d0d0007ae7b7d54b36edef1324
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/NewGVN.cpp
Log Message:
-----------
[Scalar] Construct SmallVector with an iterator range (NFC) (#135725)
Commit: 2538c607e903a1fe0cfcacd5732235cc8ff3adf7
https://github.com/llvm/llvm-project/commit/2538c607e903a1fe0cfcacd5732235cc8ff3adf7
Author: Reid Kleckner <rnk at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[CodeGen] Prune headers and move code out of line for build efficiency, NFC (#135622)
I noticed these destructors taking time with -ftime-trace and moved some
of them for minor build efficiency improvements.
The main impact of moving destructors out of line is that it avoids
requiring container fields containing other types from being complete,
i.e. one can have uptr<T> or vector<T> as a field with an incomplete
type T, and that means we can reduce transitive includes, as with
LegalizerInfo.h.
Move expensive getDebugOperandsForReg template out-of-line. The
std::function instantiation shows up in time trace even if you don't use
the function.
Commit: f46cea5b42ed4d05fd11dc1e693ddc6153769cde
https://github.com/llvm/llvm-project/commit/f46cea5b42ed4d05fd11dc1e693ddc6153769cde
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-14 (Mon, 14 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
Log Message:
-----------
Revert "[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vector types (#132358)"
This reverts commit 62ef10a0f62c668e1fa7e357f56052f3364544c5.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/132358
Commit: a388395b869ada3a4d104aa9963fa233b45522ea
https://github.com/llvm/llvm-project/commit/a388395b869ada3a4d104aa9963fa233b45522ea
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/include/llvm/CodeGen/StackFrameLayoutAnalysisPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (#130070)
Commit: fceb9cecdf6264eb773ee826b72a51a9ec68ec74
https://github.com/llvm/llvm-project/commit/fceb9cecdf6264eb773ee826b72a51a9ec68ec74
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/C/C11/n1285.c
M clang/test/CodeGenCXX/sections.cpp
A clang/test/FixIt/fixit-bool.cpp
M clang/test/Modules/odr_hash.cpp
M clang/test/OpenMP/declare_variant_messages.c
M clang/test/OpenMP/declare_variant_messages.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/distribute_simd_linear_messages.cpp
M clang/test/OpenMP/for_linear_messages.cpp
M clang/test/OpenMP/for_simd_linear_messages.cpp
M clang/test/OpenMP/for_simd_misc_messages.c
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_misc_messages.c
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/simd_misc_messages.c
M clang/test/OpenMP/target_parallel_for_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/target_simd_linear_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/target_teams_distribute_simd_linear_messages.cpp
M clang/test/OpenMP/task_affinity_messages.cpp
M clang/test/OpenMP/task_depend_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/teams_distribute_simd_linear_messages.cpp
M clang/test/Sema/code_align.c
M clang/test/Sema/warn-int-in-bool-context.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetime-capture-by.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/warn-dangling-local.cpp
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M clang/test/SemaHLSL/Language/OutputParameters.hlsl
M clang/test/SemaHLSL/parameter_modifiers.hlsl
M clang/test/SemaOpenCL/to_addr_builtin.cl
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[clang] consistently quote expressions in diagnostics (#134769)
Commit: 17b4cacbd48b75a6a4c9dfe687dd39f5e88189c3
https://github.com/llvm/llvm-project/commit/17b4cacbd48b75a6a4c9dfe687dd39f5e88189c3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/X86/pr134602.ll
Log Message:
-----------
[DAG] isSplatValue - only treat binop splats shared undef elements as undef (#135597)
#134602 demonstrated an issue where an AND node always had at least one demanded UNDEF element in either operand, and incorrectly reported this an all-undef result - despite the other element being 0 (so would correctly fold to 0).
This fix only assumes a binops splats element is undefined if both operands are undef.
Fixes #134602
Commit: 0f526498a1b0819055d1094fd9850fdbcab5b903
https://github.com/llvm/llvm-project/commit/0f526498a1b0819055d1094fd9850fdbcab5b903
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/FileEntry.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Preprocessor/embed-reject-device-files-lin.c
A clang/test/Preprocessor/embed-reject-device-files-win.c
Log Message:
-----------
[clang] Reject character devices in #embed for now (#135370)
See https://github.com/llvm/llvm-project/issues/126629 . Right now they
are not supported properly and support requires modifying several layers
of LLVM. For now simply reject them while proper support is being
developed to avoid potential security problems.
Commit: 06da00ae2d116bb2c4063b124429c2d29eb69d87
https://github.com/llvm/llvm-project/commit/06da00ae2d116bb2c4063b124429c2d29eb69d87
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/CodeGen/arm-target-features.c
M clang/test/Driver/print-supported-extensions-arm.c
M clang/test/Preprocessor/arm-target-features.c
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM][Clang] Make `+nosimd` functional for AArch32 Targets (#130623)
`+simd` and `+nosimd` are used to enable or disable NEON Instructions
when compiling for ARM Targets. However, up until now, using these
has not been possible. To enable this, these options are mapped to the
relevant LLVM backend option (`+neon` and `-neon`) so it can be both
enabled and disabled successfully by the user.
Tests have been added to ensure this behaviour is maintained in the
future, along with updates to existing tests as behaviour has now changed
relating to the use of `+simd` and `+nosimd`.
As `simd` has been mapped within the ARMTargetParser.def, support for
this extension is also added for the `--print-support-extensions` command
when the target is AArch32. This will print the `simd` option, along with the
description that relates to the Neon feature. This previously was not
possible as `simd` did not have a related Feature or Negative Feature.
To make this functional as intended, MVE and MVE.FP now rely on their
own Enum identifier, rather than `AEK_SIMD`. While SIMD does refer to
both Neon and Helium technologies, in terms of command line options,
SIMD relates to Neon. Helium relates to MVE and MVE.FP. The Enum
now reflects this too.
Commit: ccbbb1722fc4b53a75dda59b613d7aea0a47b506
https://github.com/llvm/llvm-project/commit/ccbbb1722fc4b53a75dda59b613d7aea0a47b506
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
Log Message:
-----------
[mlir] [dataflow] : Improve the time and space footprint of data flow. (#135325)
MLIR's data flow analysis (especially dense data flow analysis)
constructs a lattice at every lattice anchor (which, for dense data
flow, means every program point). As the program grows larger, the time
and space complexity can become unmanageable.
However, in many programs, the lattice values at numerous lattice
anchors are actually identical. We can leverage this observation to
improve the complexity of data flow analysis. This patch introducing
equivalence lattice anchor to group lattice anchors that must contains
identical lattice on certain state to improve the time and space
footprint of data flow.
Commit: 3266f9c3d6ae07289d0253d1efeb3d951830105c
https://github.com/llvm/llvm-project/commit/3266f9c3d6ae07289d0253d1efeb3d951830105c
Author: Timothy Hoffman <4001421+tim-hoffman at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/Traits/_index.md
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.td
M mlir/lib/IR/SymbolTable.cpp
Log Message:
-----------
[MLIR] Documentation updates and typo fixes (#125273)
Commit: 440ae4be5be421a54b82f60899c1bc17d7fbc0c3
https://github.com/llvm/llvm-project/commit/440ae4be5be421a54b82f60899c1bc17d7fbc0c3
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/docs/CodeOfConduct.rst
Log Message:
-----------
[doc][CoC] Update committee members list (#135594)
The list of Code of Conduct committee member names was out of date. This
updates it, and orders them alphabetically by last name.
Commit: 17ac7e0e844331d6c4530a678e41ed109766947e
https://github.com/llvm/llvm-project/commit/17ac7e0e844331d6c4530a678e41ed109766947e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/test/CodeGen/X86/lea-8bit.ll
Log Message:
-----------
[X86][APX] Fix a typo in LEA suffix (#135734)
Found during reviewing #135632
Commit: 1ee8fe810fab9f660b72585a782a449c8f83d8e6
https://github.com/llvm/llvm-project/commit/1ee8fe810fab9f660b72585a782a449c8f83d8e6
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/Basic/Targets/Mips.cpp
M clang/test/Driver/mips-abi.c
Log Message:
-----------
[Mips] Fix clang compile error when -march=p5600 with -mmsa (#132679)
When -march=p5600 with -mmsa, the result of getISARev is 0, so report
error. Append p5600 to cases mips32r5.
Fix #91948.
Commit: b4017d814217160fa776ca05afc711770a13ac13
https://github.com/llvm/llvm-project/commit/b4017d814217160fa776ca05afc711770a13ac13
Author: David Green <david.green at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/neon-extmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Improve MULL generation (#112405)
This splits the existing post-legalize lowering of vector umull/smull
into two parts - one to perform the optimization of mul(ext,ext) -> mull
and one to perform the v2i64 mul scalarization. The mull part is moved
to post legalizer combine and has been taught a few extra tricks from
SDAG, using known bits to convert mul(sext, zext) or mul(zext,
zero-upper-bits) into umull. This can be important to prevent v2i64
scalarization of muls.
Commit: 5307040473d9b4d78a9031fb072c1261275aa87e
https://github.com/llvm/llvm-project/commit/5307040473d9b4d78a9031fb072c1261275aa87e
Author: Iris <0.0 at owo.li>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[NFC] Fix auto* warning (#135765)
Commit: 0f86e2395e4f22bf3cb05e38be05b90575066829
https://github.com/llvm/llvm-project/commit/0f86e2395e4f22bf3cb05e38be05b90575066829
Author: Miguel Saldivar <miguel.saldivar at hpe.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/minval-maxval-issue-134308.fir
Log Message:
-----------
[flang] Avoid optimizing min and max if not valid type (#134972)
In `makeMinMaxInitValGenerator` it explicitly checks for only
`FloatType` and `IntegerType`, so we shouldn't match if we don't have
either of those types.
Fix for #134308
Commit: e65faed187485db3638aa6415f7e9df053623dcf
https://github.com/llvm/llvm-project/commit/e65faed187485db3638aa6415f7e9df053623dcf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[AArch64] Fix a warning
This patch fixes:
lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc:570:42:
error: unused variable 'GIMatchData_matchinfo'
[-Werror,-Wunused-variable]
Commit: 96e38766118c62ed42ddedd4642284cdca12904e
https://github.com/llvm/llvm-project/commit/96e38766118c62ed42ddedd4642284cdca12904e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
Log Message:
-----------
[AsmPrinter] Migrate away from PointerUnion::dyn_cast (NFC) (#135740)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
We use dyn_cast_if_present here because Bound can be null.
Commit: 00eaff3e9c897c263a879416d0f151d7ca7eeaff
https://github.com/llvm/llvm-project/commit/00eaff3e9c897c263a879416d0f151d7ca7eeaff
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.td
M mlir/include/mlir/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
A mlir/test/Dialect/Bufferization/Transforms/tensorlike-bufferlike.mlir
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestTensorLikeAndBufferLike.cpp
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.h
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][bufferization] Add tensor-like and buffer-like interfaces (#134220)
Current one-shot bufferization infrastructure operates on top of
TensorType and BaseMemRefType. These are non-extensible base classes of
the respective builtins: tensor and memref. Thus, the infrastructure is
bound to work only with builtin tensor/memref types. At the same time,
there are customization points that allow one to provide custom logic to
control the bufferization behavior.
This patch introduces new type interfaces: tensor-like and buffer-like
that aim to supersede TensorType/BaseMemRefType within the bufferization
dialect and allow custom tensors / memrefs to be used. Additionally,
these new type interfaces are attached to the respective builtin types
so that the switch is seamless.
Note that this patch does very minimal initial work, it does NOT
refactor bufferization infrastructure.
See https://discourse.llvm.org/t/rfc-changing-base-types-for-tensors-and-memrefs-from-c-base-classes-to-type-interfaces/85509
Commit: 81499edb30665d377a680990ef3c5129f9b54261
https://github.com/llvm/llvm-project/commit/81499edb30665d377a680990ef3c5129f9b54261
Author: Vy Nguyen <vyng at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[NFC][lldb]Fix stack-use-after-free bugs in exit-callbacks. (#135763)
Commit: 03b0f55d9c6319a851a60bb084faca0e32a38f2b
https://github.com/llvm/llvm-project/commit/03b0f55d9c6319a851a60bb084faca0e32a38f2b
Author: Brian Cody <brian.j.cody at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/tools/libclang/CXType.cpp
M clang/tools/libclang/libclang.map
Log Message:
-----------
[cindex] Add support for calling getFullyQualifiedName to the Python binding. (#135420)
We're coming from llvm 11. There was a change made back in 15f3cd6 that
changed how type spelling works. Previous we were given namespaces of
the types within the spelling, and this was necessary in our use-case.
There is a more appropriate function available but it was not being
exposed over the Python bindings. This PR is intended to make make this
already-existing functionality accessible.
---------
Co-authored-by: Jannick Kremer <jannick.kremer at mailbox.org>
Commit: 7eae1a4d1fd84e87eb31ea263d0df838cce8fa1b
https://github.com/llvm/llvm-project/commit/7eae1a4d1fd84e87eb31ea263d0df838cce8fa1b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github][CI] Name premerge artifacts per OS
This patch renames premerge artifacts per OS. Without this, the premerge
artifacts will conflict with each other and the slower running job will
fail to upload the artifact.
Commit: 38faf32d23d1edb7708711d0f9e0db853ddf75a5
https://github.com/llvm/llvm-project/commit/38faf32d23d1edb7708711d0f9e0db853ddf75a5
Author: alekuz01 <aleksei.kuzmenko at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M bolt/CMakeLists.txt
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/runtime/common.h
M bolt/runtime/hugify.cpp
A bolt/test/runtime/Inputs/user_func_order.txt
R bolt/test/runtime/X86/Inputs/user_func_order.txt
R bolt/test/runtime/X86/hugify.c
R bolt/test/runtime/X86/user-func-reorder.c
A bolt/test/runtime/hugify.c
A bolt/test/runtime/user-func-reorder.c
Log Message:
-----------
[BOLT] Enable hugify for AArch64 (#117158)
Add required hugify instrumentation and runtime libraries support for AArch64.
Fixes #58226
Unblocks #62695
Commit: 9a6c001b125d7d37b8f2c8b96461768c797c4e3f
https://github.com/llvm/llvm-project/commit/9a6c001b125d7d37b8f2c8b96461768c797c4e3f
Author: YLChenZ <chentongyongcz at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
Log Message:
-----------
[clang][ast]: Add DynamicAllocLValue and TypeInfoLValue support to APValue::dump(). (#135178)
Closes #134996.
The crash about `TypeInfoLValue` is https://godbolt.org/z/73WY31s55.
After the patch:
```cpp
//test.cpp
#include <typeinfo>
constexpr const std::type_info* val = &typeid(int);
```
```
lambda at ubuntu22:~/test$ clang++ -std=c++20 -Xclang -ast-dump -fsyntax-only test.cpp
LValue Base=TypeInfoLValue typeid(int), Null=0, Offset=0, HasPath=1, PathLength=0, Path=()
```
```cpp
//DAtest.cpp
constexpr int *m = new int(42);
```
```
lambda at ubuntu22:~/test$ clang++ -std=c++20 -Xclang -ast-dump -fsyntax-only DAtest.cpp
LValue Base=DynamicAllocLValue 'int', Null=0, Offset=0, HasPath=1, PathLength=0, Path=()
```
Commit: 595cc960b6da7f55d64d2025abb67a9aabb01a85
https://github.com/llvm/llvm-project/commit/595cc960b6da7f55d64d2025abb67a9aabb01a85
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/test/Fir/CUDA/cuda-target-rewrite.mlir
A flang/test/Fir/target-rewrite-fmfs.fir
M flang/test/Fir/target-rewrite-selective.fir
Log Message:
-----------
[flang] Propagate fast-math flags in target-rewrite (#135723)
TargetRewritePass was dropping fast-math flags. Add the flags to the new
call ops and update tests.
Commit: ddfd81bb76c05b095c8eca7a45f71547c3df2a89
https://github.com/llvm/llvm-project/commit/ddfd81bb76c05b095c8eca7a45f71547c3df2a89
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopVersioning.h
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
Log Message:
-----------
[LoopVer] Add function to get the alias_scope/noalias metadata (NFC).
Split out logic to get noalias/alias_scope metadata to separate function
in LoopVersioning. This will be used to migrate away from
annotateInstWithNoAlias in LV.
Commit: e1382b3b459d39659694ee854073bbdb1aa1d98d
https://github.com/llvm/llvm-project/commit/e1382b3b459d39659694ee854073bbdb1aa1d98d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
R llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
R llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
Revert "[SLP] Make getSameOpcode support interchangeable instructions. (#133888)"
This reverts commit 123993fd974629ca0a094918db4c21ad1c2624d0.
Commit: 535eaa4f3be5dda5cf3aa13348aac8d9a27d20f0
https://github.com/llvm/llvm-project/commit/535eaa4f3be5dda5cf3aa13348aac8d9a27d20f0
Author: earnol <earnol at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTest.h
Log Message:
-----------
[clang][test] Improve unit tests for Fixed point AST matchers. (#134398)
We have AST matchers for fixed point float numbers since commits
789215dc0db174c9fdd273436fdd60d8289a9fc0 and
ff9120636e9c890b4db735d252d16b92091dde55. However in those commits the
unit tests were not added. Amending the test suit by adding missing
tests.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 72560e7b0d3ab30da362eccc6a7586663690fab6
https://github.com/llvm/llvm-project/commit/72560e7b0d3ab30da362eccc6a7586663690fab6
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/test/MC/AMDGPU/bf16_imm.s
M llvm/test/MC/AMDGPU/gfx11-promotions.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
Log Message:
-----------
[AMDGPU][MC] test update with script for gfx11/gfx12 mc test (#135527)
This is a NFC patch.
Run test update with script with --unique options for many gfx11/gfx12
mc test. This format files. This prepares for the upcoming true16 clean
up patch
Commit: bf3b3d012c6b6b4369ac76e467f7fc78ee5aaca8
https://github.com/llvm/llvm-project/commit/bf3b3d012c6b6b4369ac76e467f7fc78ee5aaca8
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/EliminateBarriers.cpp
Log Message:
-----------
[mlir][GPU] Don't look into neighboring functions for barrier elimination (#135293)
If a `func.func` is nested in some other operation, the barrier
eliminator's recursion into parents will examine the neighbors of each
function. Therefore, don't recurse into the parent of an operation if
that operation is IsolatedFromAbove, like a func.func is.
Furthermore, define functions as a region that executes only once,
since, within the context of this pass (which runs on functions) it is
true.
Commit: 7f2587a23919c841584dce345ca42b9802410281
https://github.com/llvm/llvm-project/commit/7f2587a23919c841584dce345ca42b9802410281
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
Log Message:
-----------
[SLP][NFC]Add a test with missing zext on signed minimum reduction, NFC
Commit: 552902455c7a3958930d4607ac8b85fd39d7c8a3
https://github.com/llvm/llvm-project/commit/552902455c7a3958930d4607ac8b85fd39d7c8a3
Author: Wenju He <wenju.he at intel.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A libclc/clc/include/clc/integer/clc_ctz.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_ctz.cl
M libclc/generic/include/clc/clc.h
A libclc/generic/include/clc/integer/ctz.h
M libclc/generic/lib/SOURCES
A libclc/generic/lib/integer/ctz.cl
Log Message:
-----------
[libclc] Add ctz built-in implementation to clc and generic (#135309)
Commit: 57025b42c43b2f14f7e58692bc19cd53d1b8a45e
https://github.com/llvm/llvm-project/commit/57025b42c43b2f14f7e58692bc19cd53d1b8a45e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
Log Message:
-----------
[SLP]Mark smin reduction as signed compare
Reduction signed min must be marked as signed compare, fixing the
analysis for the cases, where the incoming arguments are unsigned.
Fixes #133943
Commit: 478065882303823623e1bc2d62b2a98097f9f53d
https://github.com/llvm/llvm-project/commit/478065882303823623e1bc2d62b2a98097f9f53d
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC][TableGen] DecoderEmitter optimize scope stack in `Filter::emitTableEntry` (#135693)
- Create a new stack scope only in the fallthrough case.
- For the non-fallthrough cases, any fixup entries will naturally be
added to the existing scope without needing to copy them manually.
- Verified that the generated `GenDisassembler` files are identical with
and without this change.
Commit: f215a61891b0368d2d7e329bc994c9053dc3fac9
https://github.com/llvm/llvm-project/commit/f215a61891b0368d2d7e329bc994c9053dc3fac9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][linalg][vector] Refine create{Read|Write}OrMasked{Read|Write} (nfc) (#135350)
The semantics of `createReadOrMaskedRead` and `createWriteOrMaskedWrite`
are currently a bit inconsistent and not fully documented:
* The input vector sizes are passed as `readShape` and
`inputVectorSizes`, respectively — inconsistent naming.
* Currently, the input vector sizes in `createWriteOrMaskedWrite` are
not required to be complete: any missing trailing sizes are inferred
from the destination tensor. This only works when the destination
tensor is statically shaped.
* Unlike `createReadOrMaskedRead`, the documentation for
`createWriteOrMaskedWrite` does not specify that write offsets are
hard-coded to 0.
This PR only updates the documentation and unifies the naming. As such,
it is NFC.
A follow-up PR will generalize and unify the implementation to support,
for example, dynamically shaped destination tensors — a requirement for
enabling scalable vectorization of `linalg.pack` and `linalg.unpack`.
Commit: 9ab2dea61eee82faae8b85c99e889026e8b4f2c1
https://github.com/llvm/llvm-project/commit/9ab2dea61eee82faae8b85c99e889026e8b4f2c1
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/test/Dialect/Math/algebraic-simplification.mlir
Log Message:
-----------
[mlir][math] powi with negative exponent should invert at the end (#135735)
Previously, an FPowI operation would invert the base *before* performing
a sequence of multiplications, but this led to discrepancies between
LLVM pow intrinsic folding and that coming from the math dialect.
See compiler-rt's version, which does the inverse at the end of the
calculation: compiler-rt/lib/builtins/powidf2.c
Commit: bcfc9f452983f9b0b14f2cda8f4d212a0821c972
https://github.com/llvm/llvm-project/commit/bcfc9f452983f9b0b14f2cda8f4d212a0821c972
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
Log Message:
-----------
[SLP][REVEC] VectorValuesAndScales should be supported by REVEC. (#135762)
We should align REVEC with the SLP algorithm as closely as possible. For
example, by applying REVEC-specific handling when calling IRBuilder's
Create methods, performing cost analysis via TTI, and expanding shuffle
masks using transformScalarShuffleIndicesToVector.
reference commit: 3b18d47ecbaba4e519ebf0d1bc134a404a56a9da
Commit: 637f352c3edc207f6f79c16f4760d218904fb9f7
https://github.com/llvm/llvm-project/commit/637f352c3edc207f6f79c16f4760d218904fb9f7
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/cmp.ll
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
Log Message:
-----------
[NFC][CostModel][AArch64] Add bf16 coverage for compare tests.
Commit: d0e4af8a88dc7a0377677000d0c92104ff215347
https://github.com/llvm/llvm-project/commit/d0e4af8a88dc7a0377677000d0c92104ff215347
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCast.cpp
A clang/test/Sema/warn-cast-function-type-win.c
Log Message:
-----------
Silence -Wcast-function-type warnings on idiomatic Windows code (#135660)
On Windows, GetProcAddress() is the API used to dynamically load
function pointers (similar to dlsym on Linux). This API returns a
function pointer (a typedef named FARPROC), which means that casting
from the call to the eventual correct type is technically a function
type mismatch on the cast. However, because this is idiomatic code on
Windows, we should accept it unless -Wcast-function-type-strict is
passed.
This was brought up in post-commit review feedback on
https://github.com/llvm/llvm-project/pull/86131
Commit: 88b6229dc3f65876b3f627616a024cd5dbcadcb0
https://github.com/llvm/llvm-project/commit/88b6229dc3f65876b3f627616a024cd5dbcadcb0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[TableGen] Remove unhelpful error messages from PseudoLoweringEmitter. (#135747)
All of the notes using the location of ResultInst will just print the
location inside of the PseudoInstExpansion class.
There was one note using the location of DI->getDef(), but knowing where
one of the two mismatched types is defined isn't helpful. The operand
types need to be the same, so the mismatch message we already printed
should be enough.
Commit: 7b5a459611212b650e863c0ad6a9fa49c07e29df
https://github.com/llvm/llvm-project/commit/7b5a459611212b650e863c0ad6a9fa49c07e29df
Author: Paul Bowen-Huggett <paulhuggett at mac.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/test/MC/RISCV/target-abi-invalid.s
Log Message:
-----------
[RISCV] Just reporting an error shouldn't generate a crash diagnostic (#134040)
Wanting to examine some of generated code, I tried MCA with the command:
~~~bash
llvm-mca -mtriple=riscv32-unknown-unknown -mcpu=rocket -iterations=300
core_list_join.s
~~~
I was greeted with the following error message:
~~~
LLVM ERROR: RV32 target requires an RV32 CPU
PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash
backtrace.
Stack dump:
…
~~~
On beginning to investigate the “bug”, I discovered that the code was
simply attempting to report a user error. It used report_fatal_error()
to do so but with the “bool GenCrashDiag” argument enabled (the
default). This tiny change adds a wrapper function which calls
report_fatal_error() as before but with GenCrashDiag disabled.
Commit: a399c6926a8701083c767cbb041e22ff92e9d717
https://github.com/llvm/llvm-project/commit/a399c6926a8701083c767cbb041e22ff92e9d717
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M lldb/test/requirements.txt
Log Message:
-----------
[CI] monolithic-linux improvements (#135499)
Some improvements to monolithic-linux CI:
1) Add correct configuration and dependencies for LLDB testing which
is actually relevant for clang changes.
2) Skip clang installation and separate configuration for runtimes.
They will be built with the just built clang either way.
This avoids building the runtimes twice when LLDB is also tested.
3) Make sure any generated clang reproducers end up as artifacts.
4) Set up llvm-symbolizer environment variable so that its preferred
over
any symbolizer just built, as it can be much slower when built for
debugging.
5) Add all projects as dependencies of `.ci`, to make sure everything is
tested when it changes.
Commit: 289baf1f42c8b5773271b611cd235d4ab94bb4e8
https://github.com/llvm/llvm-project/commit/289baf1f42c8b5773271b611cd235d4ab94bb4e8
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Expr.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (#135757)
Fixes https://github.com/llvm/llvm-project/issues/135522
Commit: d41e517748e2dbb51e27bed217f3dd7a4c4fb86f
https://github.com/llvm/llvm-project/commit/d41e517748e2dbb51e27bed217f3dd7a4c4fb86f
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
A llvm/test/Transforms/SLPVectorizer/bbi-106161.ll
A llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
We use the term "interchangeable instructions" to refer to different
operators that have the same meaning (e.g., `add x, 0` is equivalent to
`mul x, 1`).
Non-constant values are not supported, as they may incur high costs with
little benefit.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: c8121b99a99fe1785add732aa062039b7c5fdd32
https://github.com/llvm/llvm-project/commit/c8121b99a99fe1785add732aa062039b7c5fdd32
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcilb-invalid.s
M llvm/test/MC/RISCV/xqcilb-relocations.s
Log Message:
-----------
[RISCV] Xqcilb: remove RISCVMCExpr::VK_QC_E_JUMP_PLT and drop `@plt` parsing
Follow-up to the just landed #135044 . Remove `@plt` parsing (only
needed by legacy `call foo at plt`). MCParser's `@` parsing is problematic.
Supporting target variations like (`foo+2 at plt foo at plt+2 (foo+2)@plt`)
involves messy hacks. We should refrain from adding new `@` uses.
Remove unneeded `RISCVMCExpr::VK_QC_E_JUMP_PLT` (should only be used
when an instruction might have multiple reasonable relocations
https://maskray.me/blog/2025-03-16-relocation-generation-in-assemblers).
---
GCC's initial initial RISC-V port made a mistake by having both `call
foo` (non-PIC) and `call foo at plt` (PIC), likely misled by x86/SystemZ.
It was determined that the `@plt` was not needed. Since R_RISCV_CALL had
questionable undefined weak semantics in GNU ld (which has been removed
then), we kept R_RISCV_CALL_PLT and deprecated R_RISCV_CALL.
For RISC-V instructions, we only keep `@` in call/jump for backward
compatibility and discourage it for all other instructions.
(
There is disagreement about whether `PLT` in `JUMP_PLT` is useful or
misleading.
MaskRay's opnion: For new branch relocations with procedure call
semantics, use `_CALL` and avoid `_PLT` in the relocation name.
`_PLT` should only be used in data directives (e.g. R_RISCV_PLT32) to
indicate that the address of a function is not significant.
)
Pull Request: https://github.com/llvm/llvm-project/pull/135507
Commit: 98534eee847dfa80ff88b213a628a6149f8754d9
https://github.com/llvm/llvm-project/commit/98534eee847dfa80ff88b213a628a6149f8754d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir] Migrate away from PointerUnion::dyn_cast (NFC) (#135770)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we have a call to dyn_cast earlier in the function, implying
that attrOrProp is nonnull.
Commit: ece10a64cb180ba931b60cbd939d80412973eada
https://github.com/llvm/llvm-project/commit/ece10a64cb180ba931b60cbd939d80412973eada
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Sema/attr-decl-after-definition-std.c
Log Message:
-----------
Allow some attributes on declarations after definitions (#135791)
The deprecated, maybe_unused, and nodiscard standard attributes may all
be applied to a redeclaration after a definition has already appeared.
We were previously dropping the attribute in that case, now we retain
the attribute after the redeclaration.
Note: someday we may want to tablegen this as part of information from
Attr.td. We may also want to relax the restriction here so that the
syntax used does not matter. This is an intentionally conservative fix.
Fixes #135481
Commit: a9553990fb6de8b4d99d05c95fe949deef6357e1
https://github.com/llvm/llvm-project/commit/a9553990fb6de8b4d99d05c95fe949deef6357e1
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
R llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.exe
R llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.o
Log Message:
-----------
[DWARFLinker] Update `stmt-seq-macho.test` to use `update_test_body.py` (#133363)
In this change we update DWARFLinker test
`llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test` to be self-contained
and easy to regenerate via `update_test_body.py`. As relating to [this
comment](https://github.com/llvm/llvm-project/pull/132875/files#r2012471834)
- this would be approach nr.2
Updating the test can be done via:
```
PATH=/path/to/llvm/bin:$PATH llvm/utils/update_test_body.py llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
```
Commit: 40050888a11a92a2fbf4da5dda5956ca9ecb6b55
https://github.com/llvm/llvm-project/commit/40050888a11a92a2fbf4da5dda5956ca9ecb6b55
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][depscan] Centralize logic for populating StableDirs, NFC (#135704)
Pass a reference to `StableDirs` when creating ModuleDepCollector. This
avoids needing to create one from the same ScanInstance for each call to
`handleTopLevelModule` & reduces the amount of potential downstream
changes needed for handling StableDirs.
Commit: 3192ecfa89a48b5f56ff36956abe7e84327ced5d
https://github.com/llvm/llvm-project/commit/3192ecfa89a48b5f56ff36956abe7e84327ced5d
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/test/CodeCompletion/member-access.c
Log Message:
-----------
[CodeComplete] Don't drop ArrayToPointerDecay when doing member completion (#134951)
Fixes https://github.com/llvm/llvm-project/issues/123146.
rdar://138851576
Commit: 1545f1139127b92be15fcd2964114028a2d07194
https://github.com/llvm/llvm-project/commit/1545f1139127b92be15fcd2964114028a2d07194
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
Log Message:
-----------
[NFC][NVPTX] Use StringRef for Modifier arg in NVPTXInstPrinter (#135793)
- Use StringRef type for Modifier instead of const char *.
- Remove Modifier arg from functions that do not need them.
Commit: 68383fc20880f2d6ec6618d8870cd89e727bdc19
https://github.com/llvm/llvm-project/commit/68383fc20880f2d6ec6618d8870cd89e727bdc19
Author: Nicolas van Kempen <nvankemp at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/performance/for-range-copy.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/inefficient-algorithm.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/type-promotion-in-math-fn.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-no-warn.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-hungarian-notation-lower-case-prefix.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-outofline.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration-cxx17.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration.c
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-declaration-ignore-macros.cpp
Log Message:
-----------
[NFC][clang-tidy] Remove {{^}} clauses in some tests (1/N) (#134737)
`check_clang_tidy` now matches full lines only, so `{{^}}` clauses are
no longer necessary.
I am splitting those changes over multiple PRs to make review easier.
Numbering them but the actual order doesn't matter.
Commit: 7a41761407c485d18b7d48232b308556b3b43934
https://github.com/llvm/llvm-project/commit/7a41761407c485d18b7d48232b308556b3b43934
Author: Wanyi <wanyi at meta.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/API/SBProcess.cpp
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
Log Message:
-----------
[lldb] Make SBProcess thread related actions listen to StopLocker (#134339)
# Summary
This PR updates `SBProcess::GetNumThreads()` and
`SBProcess::GetThreadAtIndex()` to listen to the stop locker.
`SBProcess::GetNumThreads()` will return 0 if the process is running.
## Problem Description
Recently upon debugging a program with thousands of threads in VS Code,
lldb-dap would hang at a `threads` request sent right after receiving
the `configurationDone` response. Soon after it will end the debug
session with the following error
```
Process <pid> exited with status = -1 (0xffffffff) lost connection
```
This is because LLDB is still in the middle of resuming all the threads.
And requesting threads will end up interrupt the process on Linux. From
the gdb-remote log it ended up getting `lldb::StateType::eStateInvalid`
and just exit with status -1.
I don't think it's reasonable to allow getting threads from a running
process. There are a few approaches to fix this:
1) Send the stopped event to IDE after `configurationDone`. This aligns
with the CLI behavior.
2) However, the above approach will break the existing user facing
behavior. The alternative will be reject the `threads` request if the
process is not stopped.
3) Improve the run lock. This is a synchronize issue where process was
in the middle of resuming while lldb-dap attempts to interrupt it.
**This PR implements the option 3**
## HOWEVER
This fixed the "lost connection" issue below but new issue has surfaced.
>From testing, and also from checking the [VSCode source
code](https://github.com/microsoft/vscode/blob/174af221c9ea2ccdb64abe4aab8e1a805e77beae/src/vs/workbench/contrib/debug/browser/debugSession.ts#L791),
it expects having threadID to perform `pause`. So after attaching,
without any threads reported to the client, the user will not be able to
pause the attached process. `setBreakpoint` will still work and once we
make a stop at the bp (or any stop that will report threads, client can
perform pause again.
## NEXT
1) Made an attempt to return initial thread list so that VSCode can
pause (second commit in the PR)
2) Investigate why threads will trigger unwinding the second frame of a
thread, which leads to sending the interrupt
3) Decided if we want to support `stopOnEntry` for attaching, given
i. This is not an official specification
ii. If enable stopOnEntry, we need to fix attaching on Linux, to send
only one stopped event. Currently, all threads upon attaching will have
stop reason `SIGSTOP` and lldb-dap will send `stopped` event for each
one of them. Every `stopped` will trigger the client request for
threads.
iii. Alternatively, we can support auto continue correspond to `(lldb)
process attach --continue`. This require the ii above.
### Additionally
lldb-dap will not send a `continued` event after `configurationDone`
because it checks `dap.focus_tid == LLDB_INVALID_THREAD_ID` (so that we
don't send it for `launch` request). Notice `dap.focus_tid` will only
get assigned when handling stop or stepping.
According to DAP
> Please note: a debug adapter is not expected to send this event in
response to a request that implies that execution continues, e.g. launch
or continue.
It is only necessary to send a continued event if there was no previous
request that implied this.
So I guess we are not violating DAP if we don't send `continued` event.
But I'd like to get some sense about this.
## Test Plan
Used following program for testing:
https://gist.github.com/kusmour/1729d2e07b7b1063897db77de194e47d
**NOTE: Utilize stdin to get pid and attach AFTER hitting enter. Attach
should happen when all the threads start running.**
DAP messages before the change
<img width="1165" alt="image"
src="https://github.com/user-attachments/assets/a9ad85fb-81ce-419c-95e5-612639905c66"
/>
DAP message after the change - report zero threads after attaching
<img width="1165" alt="image"
src="https://github.com/user-attachments/assets/a1179e18-6844-437a-938c-0383702294cd"
/>
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 9b13d345303d819bb83de7ebbeb826d704add0bc
https://github.com/llvm/llvm-project/commit/9b13d345303d819bb83de7ebbeb826d704add0bc
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][bazel] Remove a no-op libc_internal_target macro. (#135818)
This macro is a no-op after 90c001ac9e1d92a1a95d191d1640ab5337a937e5:
libc_function macro now produce a "regular" cc_library target, without
modifying its name, and this target is intended to only be used in
tests.
Thus, libc_internal_target macro is no longer needed, and we can safely
treat libc_function rules and libc_support_library rules identically for
test purposes.
`libc_function_deps` attribute of a `libc_test` macro can also be
cleaned up, but I plan to do this in a subsequent change.
Commit: 3b9103044361094a8fde16a877f2e8cb0f96ce24
https://github.com/llvm/llvm-project/commit/3b9103044361094a8fde16a877f2e8cb0f96ce24
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/docs/InterfaceExportAnnotations.rst
M llvm/docs/Reference.rst
Log Message:
-----------
[llvm] add documentation for public interface annotations (LLVM_ABI, etc)
## Purpose
Add documentation for the existing family of `LLVM_ABI` annotation
macros defined in llvm/Support/Compiler.h. These annotations are used to
describe LLVM's public interface.
## Background
This documentation is in support of the annotation effort described
[here](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307/).
## Validation
Manually inspected rendered ReST document on GitHub.
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Commit: 30d13e359190f7a0e2122292ec4a4fc1a6c71acc
https://github.com/llvm/llvm-project/commit/30d13e359190f7a0e2122292ec4a4fc1a6c71acc
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/array.cpp
Log Message:
-----------
[CIR] Upstream ArraySubscriptExpr from function parameter with pointer base (#135493)
This change adds an ArraySubscriptExpr from the function parameter with
base type as Pointer
Issue https://github.com/llvm/llvm-project/issues/130197
Commit: 3f58ff20fe540fbbc2e5bfea1606f8cdc00d4157
https://github.com/llvm/llvm-project/commit/3f58ff20fe540fbbc2e5bfea1606f8cdc00d4157
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
R llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
Log Message:
-----------
AArch64: Remove the PAUTH_BLEND pseudo-instruction.
It can be represented using a regular MOVK instruction
which also has the advantage of sometimes being selectable
without a preceding MOV.
Reviewers: ahmedbougacha, asl, atrosinenko
Reviewed By: atrosinenko
Pull Request: https://github.com/llvm/llvm-project/pull/134765
Commit: a5aa0c46c3274eaf25dde4d792a1abd6191cccf9
https://github.com/llvm/llvm-project/commit/a5aa0c46c3274eaf25dde4d792a1abd6191cccf9
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ControlFlowIntegrity.rst
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/unique-source-file-names.c
A clang/test/Driver/unique-source-file-names.c
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
A llvm/test/Transforms/ThinLTOBitcodeWriter/unique-source-file-names.ll
Log Message:
-----------
Introduce -funique-source-file-names flag.
The purpose of this flag is to allow the compiler to assume that each
object file passed to the linker has been compiled using a unique
source file name. This is useful for reducing link times when doing
ThinLTO in combination with whole-program devirtualization or CFI,
as it allows modules without exported symbols to be built with ThinLTO.
Reviewers: vitalybuka, teresajohnson
Reviewed By: teresajohnson
Pull Request: https://github.com/llvm/llvm-project/pull/135728
Commit: d0c973a7a0149db3b71767d4c5a20a31e6a8ed5b
https://github.com/llvm/llvm-project/commit/d0c973a7a0149db3b71767d4c5a20a31e6a8ed5b
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Stack.h
M clang/lib/Basic/Stack.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M llvm/include/llvm/Support/CrashRecoveryContext.h
A llvm/include/llvm/Support/ProgramStack.h
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CrashRecoveryContext.cpp
A llvm/lib/Support/ProgramStack.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/ProgramStackTest.cpp
Log Message:
-----------
[llvm][clang] Allocate a new stack instead of spawning a new thread to get more stack space (#133173)
Clang spawns a new thread to avoid running out of stack space. This can
make debugging and performance analysis more difficult as how the
threads are connected is difficult to recover.
This patch introduces `runOnNewStack` and applies it in Clang. On
platforms that have good support for it this allocates a new stack and
moves to it using assembly. Doing split stacks like this actually runs
on most platforms, but many debuggers and unwinders reject the large or
backwards stack offsets that occur. Apple platforms and tools are known
to support this, so this only enables it there for now.
Commit: 429a84f8a4bf559f43f50072747ef49d3e3b2cf1
https://github.com/llvm/llvm-project/commit/429a84f8a4bf559f43f50072747ef49d3e3b2cf1
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/ProgramStack.h
Log Message:
-----------
[clang] Fix ambiguity in `runOnNewStack`
Commit: 227f4066befadf0d10eddb39947e35dbf820b1bb
https://github.com/llvm/llvm-project/commit/227f4066befadf0d10eddb39947e35dbf820b1bb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port d0c973a7a014
Commit: 13615f7b506a693783764da87dc80e97cf59b95c
https://github.com/llvm/llvm-project/commit/13615f7b506a693783764da87dc80e97cf59b95c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openacc-parsers.cpp
M flang/test/Semantics/OpenACC/acc-atomic-validity.f90
M llvm/include/llvm/Frontend/OpenACC/ACC.td
Log Message:
-----------
[flang][openacc] Allow if clause on atomic directives (#135451)
The new version of the OpenACC specification will allow the if clause on
the atomic directives. Allow it in `ACC.td` and update the parse node
and parser in flang to support it.
OpenACC dialect will need to be updated to support it as well.
Commit: 8f25e43055058a6a16bf44573feb37a9ce51dc1a
https://github.com/llvm/llvm-project/commit/8f25e43055058a6a16bf44573feb37a9ce51dc1a
Author: AdityaK <hiraditya at msn.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/IR/BuiltinAttributes.cpp
Log Message:
-----------
[NFC] Rename hasSameElementsOrSplat to hasSameNumElementsOrSplat (#133183)
Makes it less confusing as this function only matches the number of
elements
Commit: 9a1ece26126363c64c67d9a6e357076e814acf9e
https://github.com/llvm/llvm-project/commit/9a1ece26126363c64c67d9a6e357076e814acf9e
Author: marius doerner <marius.doerner1 at icloud.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Preprocessor/embed___has_embed.c
M clang/test/Preprocessor/has_attribute.c
M clang/test/Preprocessor/has_attribute.cpp
M clang/test/Preprocessor/has_c_attribute.c
M clang/test/Preprocessor/has_include.c
A clang/test/Preprocessor/pr133574.c
Log Message:
-----------
[clang] Clear `NeedsCleaning` flag after `ExpandBuiltinMacro` (#133574)
After builtin macro expansion in `Preprocessor::ExpandBuiltinMacro` the
result token may have the `Token::NeedsCleaning` flag set which causes
an assertion failure later on when the lexer retrieves the spelling of
the token in `getSpellingSlow`.
This commit adds an `Tok.clearFlag(Token::NeedsCleaning)` call to the
end of `ExpandBuiltinMacro`.
Closes #128384
Commit: b581bd3429b28420ff473f700fe96c18127a475d
https://github.com/llvm/llvm-project/commit/b581bd3429b28420ff473f700fe96c18127a475d
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-private.f90
Log Message:
-----------
[flang][OpenACC] use correct type when create private box init recipe (#135698)
The recipe for initializing private box types was incorrect because
hlfir::createTempFromMold() is not a suitable utility function when the
box element type is a trivial type.
Commit: bd9c5112c750f07df2886562b227d9e2aeb338c8
https://github.com/llvm/llvm-project/commit/bd9c5112c750f07df2886562b227d9e2aeb338c8
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
A mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add error_if checks for Transpose (#135219)
This adds missing error_if checking for Transpose Op
also moved all transpose op's verifier tests from
invalid.mlir to verifier.mlir
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 96064e1b516aba4d7cbea2ab183b20b19b7eea86
https://github.com/llvm/llvm-project/commit/96064e1b516aba4d7cbea2ab183b20b19b7eea86
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
Log Message:
-----------
[mlir][tosa] Add table size check for Table Op (#135262)
Add table size check for Table Op
and add lit tests to error_if_check.mlir
also corrected some existing tests that violated the table size checks
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 4f64c80d5a23c244f942193e58ecac666c173308
https://github.com/llvm/llvm-project/commit/4f64c80d5a23c244f942193e58ecac666c173308
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Support/thread.h
Log Message:
-----------
[llvm] Add missing include for !LLVM_ENABLE_THREADS
thread.h used report_fatal_error without including ErrorHandling.h
Commit: e6e56f5b6a80c6ce55630d6075475cb363afb149
https://github.com/llvm/llvm-project/commit/e6e56f5b6a80c6ce55630d6075475cb363afb149
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll
Log Message:
-----------
[MemProf] Handle recursion during stack node update (#135837)
If we are replacing a sequence of stack nodes with a single node
representing inlined IR, and the stack id sequence contains recursion,
we may have already removed some edges. Handle this case correctly by
skipping the now removed edge.
Commit: a3283a92aea147e89d9d404fa7c8500223c7c22a
https://github.com/llvm/llvm-project/commit/a3283a92aea147e89d9d404fa7c8500223c7c22a
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/PointerAuthentication.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGPointerAuth.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/ast-dump-ptrauth-json.cpp
A clang/test/CodeGen/ptrauth-debuginfo.c
A clang/test/CodeGen/ptrauth-qualifier-const-init.c
A clang/test/CodeGen/ptrauth-qualifier-function.c
A clang/test/CodeGen/ptrauth-qualifier-loadstore.c
A clang/test/CodeGenCXX/mangle-itanium-ptrauth.cpp
A clang/test/CodeGenCXX/mangle-ms-ptrauth.cpp
A clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
A clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
A clang/test/Parser/ptrauth-qualifier.c
A clang/test/Preprocessor/ptrauth_extension.c
A clang/test/Sema/ptrauth-atomic-ops.c
A clang/test/Sema/ptrauth-qualifier.c
A clang/test/SemaCXX/ptrauth-qualifier.cpp
A clang/test/SemaCXX/ptrauth-template-parameters.cpp
A clang/test/SemaObjC/ptrauth-qualifier.m
M libcxxabi/test/test_demangle.pass.cpp
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/lib/Demangle/MicrosoftDemangle.cpp
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
A llvm/test/Demangle/ms-ptrauth.test
Log Message:
-----------
[PAC] Add support for __ptrauth type qualifier (#100830)
The qualifier allows programmer to directly control how pointers are
signed when they are stored in a particular variable.
The qualifier takes three arguments: the signing key, a flag specifying
whether address discrimination should be used, and a non-negative
integer that is used for additional discrimination.
```
typedef void (*my_callback)(const void*);
my_callback __ptrauth(ptrauth_key_process_dependent_code, 1, 0xe27a) callback;
```
Co-Authored-By: John McCall rjmccall at apple.com
Commit: a1d52fcdca8bda4fe8c6652b2de83f408f4ad4f2
https://github.com/llvm/llvm-project/commit/a1d52fcdca8bda4fe8c6652b2de83f408f4ad4f2
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
Clarify documentation for -funique-source-file-names.
Reviewers: efriedma-quic, teresajohnson
Reviewed By: teresajohnson, efriedma-quic
Pull Request: https://github.com/llvm/llvm-project/pull/135832
Commit: 2271f0bebd48c9ed8b16b500886a819c4f269a6a
https://github.com/llvm/llvm-project/commit/2271f0bebd48c9ed8b16b500886a819c4f269a6a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-full-match.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
Log Message:
-----------
[SLP]Check for perfect/shuffled match for the split node
If the potential split node is a perfect/shuffled match of another split
node, need to skip creation of the another split node with the same
scalars, it should be a buildvector.
Fixes #135800
Commit: 823adc7a2dc90cdd0f953f3dc9684481368f2b62
https://github.com/llvm/llvm-project/commit/823adc7a2dc90cdd0f953f3dc9684481368f2b62
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
A bolt/test/AArch64/validate-secondary-entry-point.s
A bolt/test/RISCV/validate-secondary-entry-point.s
Log Message:
-----------
[BOLT] Validate secondary entry point (#135731)
Some functions have their sizes as zero in input binary's symbol
table, like those compiled by assembler. When figuring out function
sizes, we may create label symbol if it doesn't point to any constant
island. However, before function size is known, marker symbol can
not be correctly associated to a function and therefore all such
checks would fail and we could end up adding a code label pointing
to constant island as secondary entry point and later mistakenly
marking the function as not simple.
Querying the global marker symbol array has big throughput overhead.
Instead we can run an extra check when post processing entry points
to identify such label symbols that actually point to constant islands.
Commit: 14cb6566d6701feaef2ffd686af5de4ff9e3eb29
https://github.com/llvm/llvm-project/commit/14cb6566d6701feaef2ffd686af5de4ff9e3eb29
Author: John Harrison <harjohn at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
Log Message:
-----------
[lldb-dap] Improve error reporting for dap command arguments. (#135684)
Previously the error only contained the failed to parse JSON message,
which has no additional context.
This improves the error messages and improves the consistency of
handling properties in protocol structures. Updating the fields to use
'ObjectMapper.map' instead of 'ObjectMapper.mapOptional' caught that
adapterID was misspelled as well.
For example, previously:
```
$ echo 'Content-Length: 81\r\n\r\n{"type":"request","command":"initialize","seq":1,"arguments":{"adapterID":12345}} | lldb-dap
```
Worked without an error but now it reports:
```
invalid arguments for request 'initialize': expected string at arguments.adapterID
{
"adapterID": /* error: expected string */ 12345
}
```
Commit: 85eb44e304e0a0a7da78448ceee60fdfec235edb
https://github.com/llvm/llvm-project/commit/85eb44e304e0a0a7da78448ceee60fdfec235edb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
Log Message:
-----------
[SLP]Fix number of operands for the split node
FOr the split node number of operands should be requested via
getNumOperands() function, even if the main op is CallInst.
Commit: 2b983a24583dd4e131d727717872a56712b5dd52
https://github.com/llvm/llvm-project/commit/2b983a24583dd4e131d727717872a56712b5dd52
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR][AMDGPU] Adding dynamic size check to avoid subword buffer load (#135014)
Motivation: amdgpu buffer load instruction will return all zeros when
loading sub-word values. For example, assuming the buffer size is
exactly one word and we attempt to invoke
`llvm.amdgcn.raw.ptr.buffer.load.v2i32` starting from byte 2 of the
word, we will not receive the actual value of the buffer but all zeros
for the first word. This is because the boundary has been crossed for
the first word.
This PR come up with a fix to this problem, such that, it creates a
bounds check against the buffer load instruction. It will compare the
offset + vector size to see if the upper bound of the address will
exceed the buffer size. If it does, masked transfer read will be
optimized to `vector.load` + `arith.select`, else, it will continue to
fall back to default lowering of the masked vector load.
Commit: f83c5fe01fbee0f53ecf69d887e7a7b054f2a9ae
https://github.com/llvm/llvm-project/commit/f83c5fe01fbee0f53ecf69d887e7a7b054f2a9ae
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CFG.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[nfc] Expose `canReturn` from FunctionAttrs (#135650)
This is a fairly light-weight traversal and is needed in instrumentation. No need to run the whole `FunctionAttrs` pass at this stage. To avoid layering issues, this patch factors `canRun` and related under Analysis/CFG.
Commit: 12697c5516f8a9e4407e01d99324ce6958910184
https://github.com/llvm/llvm-project/commit/12697c5516f8a9e4407e01d99324ce6958910184
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
A llvm/test/CodeGen/AArch64/pr135776.ll
Log Message:
-----------
[LegalizeTypes] Check getTypeAction before calling GetScalarizedVector. (#135838)
Use getTypeAction instead of trying to guess how a type will be
legalized. On AArch64, v1f16 is scalarized but v1f16 is widened.
Fixes #135776
Commit: ddb12674300eb1af5e6945b5447e7bff7cff4cd8
https://github.com/llvm/llvm-project/commit/ddb12674300eb1af5e6945b5447e7bff7cff4cd8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll
Log Message:
-----------
[SLP]Insert vector instruction after landingpad
If the node must be emitted in the landingpad block, need to insert the
instructions after the landingpad instruction to avoid a crash.
Fixes #135781
Commit: 0f3e460e06e03ce37445546457a16d6f1eee1e21
https://github.com/llvm/llvm-project/commit/0f3e460e06e03ce37445546457a16d6f1eee1e21
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/test/Dialect/Tensor/bubble-reshapes.mlir
Log Message:
-----------
[mlir][Tensor] Generalize the pattern to swap `tensor.collapse_shape` -> `tensor.expand_shape`. (#133819)
The current patterns compared the reassocation indices for the two ops
and failed if neither of them were of size 1. This patch relaxes this
restriction by handling a new case where the reassociation indices might
be of the same size.
Also generalizes to cases where when generating the swapped
`tensor.expand_shape` -> `tensor.collapse_shape` if one of them is
degenerate, those are not generated.
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: d30a5b41fe72a1dd83714d3e21fd539b91e63c8c
https://github.com/llvm/llvm-project/commit/d30a5b41fe72a1dd83714d3e21fd539b91e63c8c
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/MC/RISCV/xmips-invalid.s
M llvm/test/MC/RISCV/xmips-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Fix xmipscmov extension name (#135647)
The right name was used in riscv-toolchain-conventions docs.
Commit: 9c73eba8aa17cb7ca4248ab1c7f67ea7ec9b50b1
https://github.com/llvm/llvm-project/commit/9c73eba8aa17cb7ca4248ab1c7f67ea7ec9b50b1
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/Sema/attr-capabilities.c
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
Merge similar Clang Thread Safety attributes (#135561)
Some of the old lock-based and new capability-based spellings behave
basically in the same way, so merging them simplifies the code
significantly.
There are two minor functional changes: we only warn (instead of an
error) when the try_acquire_capability attribute is used on something
else than a function. The alternative would have been to produce an
error for the old spelling, but we seem to only warn for all function
attributes, so this is arguably more consistent.
The second change is that we also check the first argument (which is the
value returned for a successful try-acquire) for `this`. But from what I
can tell, this code is defunct anyway at the moment (see #31414).
Commit: 7cb7b2d39d3b4aa984bfaeaf5e69fbfb074edd41
https://github.com/llvm/llvm-project/commit/7cb7b2d39d3b4aa984bfaeaf5e69fbfb074edd41
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
[llvm] Build Windows release package with clang-cl if possible (#135446)
If `clang-cl.exe` and `lld-link.exe` are installed in `%PATH%`, the
Windows release build script will now use these by default, in place of
MSVC. The reason for doing this is that MSVC still has, for the past
year(s), a O(N^2) behavior when building certain LLVM source files,
which leads to long build times (minutes per file). A report was filled
here:
https://developercommunity.visualstudio.com/t/ON2-in-SparseBitVectorBase-when-com/10657991
Also added a `--force-msvc` option to the script, to use MSVC even if
clang-cl is installed.
Commit: d0372179fbbcb7b3fa680a78919a980fa4384c46
https://github.com/llvm/llvm-project/commit/d0372179fbbcb7b3fa680a78919a980fa4384c46
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CFG.h
Log Message:
-----------
[nfc] Add doc comment for `canReturn` in Analysis/CFG.h (#135862)
Commit: 2d98bdc12c291523c3543ceaf1c526e25dcaedc6
https://github.com/llvm/llvm-project/commit/2d98bdc12c291523c3543ceaf1c526e25dcaedc6
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Stack.h
M clang/lib/Basic/Stack.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M llvm/include/llvm/Support/CrashRecoveryContext.h
R llvm/include/llvm/Support/ProgramStack.h
M llvm/include/llvm/Support/thread.h
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CrashRecoveryContext.cpp
R llvm/lib/Support/ProgramStack.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/ProgramStackTest.cpp
Log Message:
-----------
Revert "[llvm][clang] Allocate a new stack instead of spawning a new … (#135865)
…thread to get more stack space (#133173)"
This change breaks the Clang build on Mac AArch64.
This reverts commit d0c973a7a0149db3b71767d4c5a20a31e6a8ed5b. This
reverts commit 429a84f8a4bf559f43f50072747ef49d3e3b2cf1. This reverts
commit 4f64c80d5a23c244f942193e58ecac666c173308.
Commit: 8ed397d8e4d014ecc5df89a9d908c5808f201b65
https://github.com/llvm/llvm-project/commit/8ed397d8e4d014ecc5df89a9d908c5808f201b65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/pr135821.ll
Log Message:
-----------
[DAGCombiner] Disable narrowExtractedVectorLoad for indexed loads. (#135847)
The later code does not expect or preserve the index output.
Fixes #135821
Commit: a6208ce4c15142c26c6b73651bf466ae6b470cb0
https://github.com/llvm/llvm-project/commit/a6208ce4c15142c26c6b73651bf466ae6b470cb0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CFG.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Log Message:
-----------
[nfc] move `isPresplitCoroSuspendExitEdge` to Analysis/CFG (#135849)
Commit: 6e2bca840df9dfcffc5068c1ad0c9575f0c57e76
https://github.com/llvm/llvm-project/commit/6e2bca840df9dfcffc5068c1ad0c9575f0c57e76
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 2d98bdc12c29
Commit: 31f39c83259401a26b3660dd75f645002258571d
https://github.com/llvm/llvm-project/commit/31f39c83259401a26b3660dd75f645002258571d
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-cast-load-i1.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
Log Message:
-----------
[AMDGPU] Remove the AnnotateKernelFeatures pass (#130198)
Previously the AnnotateKernelFeatures pass infers two attributes:
amdgpu-calls and amdgpu-stack-objects, which are used to help determine
if flat scratch init is allowed. PR #118907 created the
amdgpu-no-flat-scratch-init attribute. Continuing with that work, this
patch makes use of this attribute to determine flat scratch init,
replacing amdgpu-calls and amdgpu-stack-objects. This also leads to the
removal of the AnnotateKernelFeatures pass.
Commit: 16980d5463c787a48ffb78fd9bbe3d9d32757f34
https://github.com/llvm/llvm-project/commit/16980d5463c787a48ffb78fd9bbe3d9d32757f34
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
R clang/test/CodeGenCXX/local-class-instantiation.cpp
Log Message:
-----------
Revert "[Clang] Fix dependent local class instantiation bugs" (#135870)
Reverts llvm/llvm-project#134038
This crashes clang as reported here:
https://github.com/llvm/llvm-project/pull/134038#issuecomment-2807092646
Commit: af63e1b505453de3e6a281d1b72e62fa8d396b23
https://github.com/llvm/llvm-project/commit/af63e1b505453de3e6a281d1b72e62fa8d396b23
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
Log Message:
-----------
[OpenACC][CIR] Implement 'self' lowering on compute constructs (#135851)
This is our first attempt at lowering a clause that is an 'operand' in
the OpenACC operand, so it does quite a bit of refactoring. My previous
plans on how to emit the clauses was not viable, so we instead do
'create the op, then use the visitor to fill in the operands'. This
resulted in the 'applyAttributes' function getting removed and a few
other functions simplified.
Additionally, it requires setting the insertion point a little to make
sure we're inserting 'around' the operation correctly.
Finally, since the OpenACC dialect only understands the MLIR types, we
had to introduce a use of the unrealized-conversion-cast, which we'll
probably getting good use out of in the future.
Commit: e4d951d2e42a9124bd87275a864804c4b84b62e3
https://github.com/llvm/llvm-project/commit/e4d951d2e42a9124bd87275a864804c4b84b62e3
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
LowerTypeTests: Fix quadratic complexity.
Currently we have quadratic complexity in LowerTypeTests because
ScopedSaveAliaseesAndUsed loops over all aliases for each disjoint
set, and the number of aliases and number of disjoint sets is
roughly proportional to the program size. Fix that by moving
ScopedSaveAliaseesAndUsed to LowerTypeTestsModule::lower() so that
we do this only once.
Reviewers: fmayer, vitalybuka
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/135875
Commit: 3428cc94c893f9a09728c707baf018b9cdfaf243
https://github.com/llvm/llvm-project/commit/3428cc94c893f9a09728c707baf018b9cdfaf243
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang-rt/lib/runtime/extensions.cpp
M flang/include/flang/Runtime/extensions.h
Log Message:
-----------
[flang] Implement external routine usage of hostnm() (#134900)
Previously, `hostnm` extended intrinsic was implemented as proper
intrinsic. Since then we found out that some applications use `hostnm`
as external routine via `external hostnm`. This prevents `hostnm` from
being recognized as an intrinsic. This PR implements `hostnm` as
external routine.
Commit: 58c3fba7063eaca926931a412c329e9ac4deefd6
https://github.com/llvm/llvm-project/commit/58c3fba7063eaca926931a412c329e9ac4deefd6
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
Revert "LowerTypeTests: Fix quadratic complexity."
This reverts commit e4d951d2e42a9124bd87275a864804c4b84b62e3.
Need to investigate some test failures.
Commit: 860d0383db80ea881e957a5628d04e9d725b919d
https://github.com/llvm/llvm-project/commit/860d0383db80ea881e957a5628d04e9d725b919d
Author: Haowei <haowei at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Not building llvm-mt when LIBXML2 is not enabled. (#135877)
This patch prevents including the llvm-mt to `LLVM_TOOLCHAIN_TOOLS` in the
Fuchsia toolchain when LIBXML2 is not explicitly enabled.
Commit: 6ad922b75a41911e0e394d5d367bee1240ad509f
https://github.com/llvm/llvm-project/commit/6ad922b75a41911e0e394d5d367bee1240ad509f
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
Log Message:
-----------
[OpenACC][CIR] Implement lowering for 'if' on compute constructs
This is the same for these as the 'self' was, except it doesn't support
the 'empty' variant, so we have to just generate the condition. This
patch does that, and extracts the 'condition' emission to a separate
function since the two share it.
Commit: 0b8f817aab7a242e0bfb519cb07c8979ffadef36
https://github.com/llvm/llvm-project/commit/0b8f817aab7a242e0bfb519cb07c8979ffadef36
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M bolt/runtime/hugify.cpp
Log Message:
-----------
[BOLT] Fix conditional compilation of hugify.cpp (#135880)
Fix builds after #117158: do not build hugify.cpp on Apple platforms.
Commit: bd4d3519c708d70ed8c827a27b63f13b0229ef00
https://github.com/llvm/llvm-project/commit/bd4d3519c708d70ed8c827a27b63f13b0229ef00
Author: Camsyn <camsyn at foxmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M compiler-rt/lib/asan/asan_report.cpp
A compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
Log Message:
-----------
[ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (#131756)
### Description
This PR resolves a deadlock between AddressSanitizer (ASan) and
LeakSanitizer (LSan)
that occurs when both sanitizers attempt to acquire locks in conflicting
orders across
threads. The fix ensures safe lock acquisition ordering by preloading
module information
before error reporting.
---
### Issue Details
**Reproducer**
```cpp
// Thread 1: ASan error path
int arr[1] = {0};
std::thread t([&]() {
arr[1] = 1; // Triggers ASan OOB error
});
// Thread 2: LSan check path
__lsan_do_leak_check();
```
**Lock Order Conflict**:
- Thread 1 (ASan error reporting):
1. Acquires ASan thread registry lock (B)
1. Attempts to acquire libdl lock (A) via `dl_iterate_phdr`
- Thread 2 (LSan leak check):
1. Acquires libdl lock (A) via `dl_iterate_phdr`
1. Attempts to acquire ASan thread registry lock (B)
This creates a circular wait condition (A -> B -> A) meeting all four
Coffman deadlock criteria.
---
### Fix Strategy
The root cause lies in ASan's error reporting path needing
`dl_iterate_phdr` (requiring lock A)
while already holding its thread registry lock (B). The solution:
1. **Preload Modules Early**: Force module list initialization _before_
acquiring ASan's thread lock
2. **Avoid Nested Locking**: Ensure symbolization (via dl_iterate_phdr)
completes before error reporting locks
Key code change:
```cpp
// Before acquiring ASan's thread registry lock:
Symbolizer::GetOrInit()->GetRefreshedListOfModules();
```
This guarantees module information is cached before lock acquisition,
eliminating
the need for `dl_iterate_phdr` calls during error reporting.
---
### Testing
Added **asan_lsan_deadlock.cpp** test case:
- Reproduces deadlock reliably without fix **under idle system
conditions**
- Uses watchdog thread to detect hangs
- Verifies ASan error reports correctly without deadlock
**Note**: Due to the inherent non-determinism of thread scheduling and
lock acquisition timing,
this test may not reliably reproduce the deadlock on busy systems (e.g.,
during parallel
`ninja check-asan` runs).
---
### Impact
- Fixes rare but severe deadlocks in mixed ASan+LSan environments
- Maintains thread safety guarantees for both sanitizers
- No user-visible behavior changes except deadlock elimination
---
### Relevant Buggy Code
- Code in ASan's asan_report.cpp
```cpp
explicit ScopedInErrorReport(bool fatal = false)
: halt_on_error_(fatal || flags()->halt_on_error) {
// Acquire lock B
asanThreadRegistry().Lock();
}
~ScopedInErrorReport() {
...
// Try to acquire lock A under holding lock B via the following path
// #4 0x000071a353d83e93 in __GI___dl_iterate_phdr (
// callback=0x5d1a07a39580 <__sanitizer::dl_iterate_phdr_cb(dl_phdr_info*, unsigned long, void*)>,
// data=0x6da3510fd3f0) at ./elf/dl-iteratephdr.c:39
// #5 0x00005d1a07a39574 in __sanitizer::ListOfModules::init (this=0x71a353ebc080)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp:784
// #6 0x00005d1a07a429e3 in __sanitizer::Symbolizer::RefreshModules (this=0x71a353ebc058)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:188
// #7 __sanitizer::Symbolizer::FindModuleForAddress (this=this at entry=0x71a353ebc058,
// address=address at entry=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:214
// #8 0x00005d1a07a4291b in __sanitizer::Symbolizer::SymbolizePC (this=0x71a353ebc058, addr=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:88
// #9 0x00005d1a07a40df7 in __sanitizer::(anonymous namespace)::StackTraceTextPrinter::ProcessAddressFrames (
// this=this at entry=0x6da3510fd520, pc=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:37
// #10 0x00005d1a07a40d27 in __sanitizer::StackTrace::PrintTo (this=this at entry=0x6da3510fd5e8,
// output=output at entry=0x6da3510fd588)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:110
// #11 0x00005d1a07a410a1 in __sanitizer::StackTrace::Print (this=0x6da3510fd5e8)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:133
// #12 0x00005d1a0798758d in __asan::ErrorGeneric::Print (
// this=0x5d1a07aa4e08 <__asan::ScopedInErrorReport::current_error_+8>)
// at llvm-project/compiler-rt/lib/asan/asan_errors.cpp:617
current_error_.Print();
...
}
```
- Code in LSan's lsan_common_linux.cpp
```cpp
void LockStuffAndStopTheWorld(StopTheWorldCallback callback,
CheckForLeaksParam *argument) {
// Acquire lock A
dl_iterate_phdr(LockStuffAndStopTheWorldCallback, ¶m);
}
static int LockStuffAndStopTheWorldCallback(struct dl_phdr_info *info,
size_t size, void *data) {
// Try to acquire lock B under holding lock A via the following path
// #3 0x000055555562b34a in __sanitizer::ThreadRegistry::Lock (this=<optimized out>)
// at llvm-project/compiler-rt/lib/asan/../sanitizer_common/sanitizer_thread_registry.h:99
// #4 __lsan::LockThreads () at llvm-project/compiler-rt/lib/asan/asan_thread.cpp:484
// #5 0x0000555555652629 in __lsan::ScopedStopTheWorldLock::ScopedStopTheWorldLock (this=<optimized out>)
// at llvm-project/compiler-rt/lib/lsan/lsan_common.h:164
// #6 __lsan::LockStuffAndStopTheWorldCallback (info=<optimized out>, size=<optimized out>, data=0x0,
// data at entry=0x7fffffffd158) at llvm-project/compiler-rt/lib/lsan/lsan_common_linux.cpp:120
ScopedStopTheWorldLock lock;
DoStopTheWorldParam *param = reinterpret_cast<DoStopTheWorldParam *>(data);
StopTheWorld(param->callback, param->argument);
return 1;
}
```
Commit: 77f0708b9d4feee8b8a67a5f571be741be4e26af
https://github.com/llvm/llvm-project/commit/77f0708b9d4feee8b8a67a5f571be741be4e26af
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc]: Remove `-Wglobal-constructors` for libc tests (#131485)
* Relates to: https://github.com/llvm/llvm-project/issues/119281
* Removes `-Wglobal-constructors` as per:
https://github.com/llvm/llvm-project/pull/131485#pullrequestreview-2728020622
Commit: 6c6ab2a270b799f1397926c9064fa30fe2be1d96
https://github.com/llvm/llvm-project/commit/6c6ab2a270b799f1397926c9064fa30fe2be1d96
Author: YunQiang Su <syq at debian.org>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
Log Message:
-----------
AArch64: Set FMAXIMUMNUM and FMINIMUMNUM as Promote if not fullfp16 (#135708)
Since Promote will emit FP_EXTEND, the result of it will never be sNaN,
so we don't need worry about duplicated of FCANONICALIZE in
expandFMINIMUMNUM_FMAXIMUMNUM.
Commit: 4c97c5131f9ca32ce644a0be6e3586077ee03aa6
https://github.com/llvm/llvm-project/commit/4c97c5131f9ca32ce644a0be6e3586077ee03aa6
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilia.ll
Log Message:
-----------
[RISCV] Add ISel patterns for Xqcilia instructions (#135724)
This patch adds instruction selection patterns for generating the long
immediate arithmetic instructions.
We prefer generating instructions that have a 26 bit immediate to a 32
bit immediate given that both are of the same size but the former might
be easier to register allocate for. Base RISC-V arithmetic instructions
will be preferred, when applicable.
Commit: 0ce8ad68e44aaf50d1e2aa304fa8a1127e311e1d
https://github.com/llvm/llvm-project/commit/0ce8ad68e44aaf50d1e2aa304fa8a1127e311e1d
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/test/CodeGen/SPARC/float-constants.ll
Log Message:
-----------
[SPARC] Use fzero/fzeros to materialize FP zeros when we have VIS
Reviewers: rorth, brad0, s-barannikov
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135712
Commit: f3de63c64998eb46db9cf26aca9ebcc5453f6f44
https://github.com/llvm/llvm-project/commit/f3de63c64998eb46db9cf26aca9ebcc5453f6f44
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
Log Message:
-----------
[SPARC] Use addxccc to do multiword addition when we have VIS3
Reviewers: brad0, s-barannikov, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135713
Commit: e4f2191f568db718ed67defa664f83f763e7e74a
https://github.com/llvm/llvm-project/commit/e4f2191f568db718ed67defa664f83f763e7e74a
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3
Reviewers: s-barannikov, rorth, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135714
Commit: 0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
https://github.com/llvm/llvm-project/commit/0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM for CV immediate branch (#135771)
If there is another branch instruction also with immediate operand, but
it is used to specify which bit to be tested is set or clear. We only
check whether operand2 is immediate or not here. There are no way to
distinguish between them.
So add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM that we can know what
kinds of immediate branch instruction are matched in Select_* Pseudo.
Commit: 5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4
https://github.com/llvm/llvm-project/commit/5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
R llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
Revert "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897)
This change breaks multiply tests on SPARC.
https://lab.llvm.org/buildbot/#/builders/108/builds/11691/steps/6/logs/FAIL__LLVM__multiply-extension_ll
Reverts llvm/llvm-project#135714
Commit: bed03ae36600f83f214c41af333f47fe8ead9ede
https://github.com/llvm/llvm-project/commit/bed03ae36600f83f214c41af333f47fe8ead9ede
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
Log Message:
-----------
[X86] Fix the issue of creating index reg negations (#135632)
The 8 and 16 bit LEA instruction support was added by PR #122102, and we
have to update creating index register negations accordingly. The issue
is exposed with APX NDD instructions.
Commit: e676866368a84c88aad90e138268e00a1c56a230
https://github.com/llvm/llvm-project/commit/e676866368a84c88aad90e138268e00a1c56a230
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
A llvm/test/CodeGen/Mips/vararg.ll
Log Message:
-----------
[Mips] Fix clang crashes when compiling a variadic function while targeting mips3 (#130558)
issue reason:
Because mips3 has the feature 'FeatureGP64Bit', when target mips3
process function `writeVarArgRegs`, the result of `getGPRSizeInBytes` is
8 and the result of `GetVarArgRegs` is `Mips::A0, Mips::A1, Mips::A2,
Mips::A3`. This would generate `gpr64 = COPY $a1` which should be `gpr64
= COPY $a1_64`.
Also when process `CC_Mips_FixedArg`, mips would CCDelegateTo
`CC_MipsO32_FP`. In fact, it should CCDelegateTo `CC_MipsN`.
Fix #98716.
Commit: 517605c20e6014543e91d45524a17c443aa11bd4
https://github.com/llvm/llvm-project/commit/517605c20e6014543e91d45524a17c443aa11bd4
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[alpha.webkit.UnretainedCallArgsChecker] Add the support for RetainPtrArc (#135532)
WebKit uses #define to rename RetainPtr to RetainPtrArc so add the
support for it.
Commit: 71d091699f956c89135bc165165e815ab7876359
https://github.com/llvm/llvm-project/commit/71d091699f956c89135bc165165e815ab7876359
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/inttypes/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/epoll/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc][bazel] Fold "libc_function_deps" into "deps" for libc_tests. (#135835)
libc_function_deps and deps are now identical, as we no longer need or
have special treatment for libc_function targets. Merge these attributes
passed to the libc_test macro, and fix all relevant libc_test macro
invocations. This change is a no-op.
This concludes cleanup started in
9b13d345303d819bb83de7ebbeb826d704add0bc.
Commit: a024d13f84dbe7b3d1eee555ddc82cdd1af814e0
https://github.com/llvm/llvm-project/commit/a024d13f84dbe7b3d1eee555ddc82cdd1af814e0
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll
Log Message:
-----------
[LoongArch] make ABDS/ABDU legal for lsx/lasx (#134190)
Commit: b07c88563febdb62b82daad0480d7b6131bc54d4
https://github.com/llvm/llvm-project/commit/b07c88563febdb62b82daad0480d7b6131bc54d4
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/include/llvm/Support/InterleavedRange.h
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/InterleavedRangeTest.cpp
Log Message:
-----------
[Support] Add format object for interleaved ranges (#135517)
Add two new format functions for printing ranges: `interleaved` and
`interleaved_array`.
This is meant to improve the ergonomics of printing ranges. Before this
patch, we have to either use `llvm::interleave` or write a for loop by
hand. For example:
Before:
```c++
ArrayRef<Type> types = ...;
ArrayRef<Values> values = ...;
LLVM_DEBUG({
llvm::dbgs() << "Types: ";
llvm::interleave_comma(llvm::dbgs(), types);
llvm::dbgs() << "\n";
llvm::dbgs() << "Values: [";
llvm::interleave_comma(llvm::dbgs(), values);
llvm::dbgs() << "]\n";
}):
```
After:
```c++
ArrayRef<Type> types = ...;
ArrayRef<Values> values = ...;
LLVM_DEBUG(llvm::dbgs() << "Types: " << interleaved(types) << "\n");
LLVM_DEBUG(llvm::dbgs() << "Values: " << interleaved_array(values) << "\n");
```
The separator and the prefix/suffix strings are customizable.
Commit: 04b87e15e40f8857e29ade8321b8b67691545a50
https://github.com/llvm/llvm-project/commit/04b87e15e40f8857e29ade8321b8b67691545a50
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
Log Message:
-----------
[flang][fir] Lower `do concurrent` loop nests to `fir.do_concurrent` (#132904)
Adds support for lowering `do concurrent` nests from PFT to the new
`fir.do_concurrent` MLIR op as well as its special terminator
`fir.do_concurrent.loop` which models the actual loop nest.
To that end, this PR emits the allocations for the iteration variables
within the block of the `fir.do_concurrent` op and creates a region for
the `fir.do_concurrent.loop` op that accepts arguments equal in number
to the number of the input `do concurrent` iteration ranges.
For example, given the following input:
```fortran
do concurrent(i=1:10, j=11:20)
end do
```
the changes in this PR emit the following MLIR:
```mlir
fir.do_concurrent {
%22 = fir.alloca i32 {bindc_name = "i"}
%23:2 = hlfir.declare %22 {uniq_name = "_QFsub1Ei"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%24 = fir.alloca i32 {bindc_name = "j"}
%25:2 = hlfir.declare %24 {uniq_name = "_QFsub1Ej"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
fir.do_concurrent.loop (%arg1, %arg2) = (%18, %20) to (%19, %21) step (%c1, %c1_0) {
%26 = fir.convert %arg1 : (index) -> i32
fir.store %26 to %23#0 : !fir.ref<i32>
%27 = fir.convert %arg2 : (index) -> i32
fir.store %27 to %25#0 : !fir.ref<i32>
}
}
```
Commit: 3264a50fe2b61e79572d1623d0cceb2fe88da533
https://github.com/llvm/llvm-project/commit/3264a50fe2b61e79572d1623d0cceb2fe88da533
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-sm100a.ll
Log Message:
-----------
[clang][NVPTX] Add builtins and intrinsics for conversions of new FP types (#134345)
This change:
- Adds NVVM intrinsics and clang builtins for the cvt instruction
variants of types (FP6) `.e2m3x2`, `.e3m2x2`, and (FP8) `.ue8m0x2`
introduced in PTX 8.6 for `sm_100a`, `sm_101a`, and `sm_120a`.
- Adds clang builtins for cvt instruction variant of type tf32.
Tests are added in `NVPTX/convert-sm100a.ll` and
`clang/test/CodeGen/builtins-nvptx.c` and verified through ptxas 12.8.0.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Commit: 2a024046217a1acae4806328ac77bd88648c2bab
https://github.com/llvm/llvm-project/commit/2a024046217a1acae4806328ac77bd88648c2bab
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
Log Message:
-----------
[clang] fix a crash in error recovery in expressions resolving to templates (#135893)
We were using AssumedTemplate incorrectly for error recovery.
Fixes #135621
Commit: 3de88fe40fd0dc5f52ba0bc7ebbaf16e938d6670
https://github.com/llvm/llvm-project/commit/3de88fe40fd0dc5f52ba0bc7ebbaf16e938d6670
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/include/llvm/Frontend/HLSL/CBuffer.h
A llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
A llvm/lib/Target/DirectX/DXILCBufferAccess.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
A llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
Log Message:
-----------
[DirectX] Implement the DXILCBufferAccess pass (#134571)
This introduces a pass that walks accesses to globals in cbuffers and
replaces them with accesses via the cbuffer handle itself. The logic to
interpret the cbuffer metadata is kept in `lib/Frontend/HLSL` so that it
can be reused by other consumers of that metadata.
Fixes #124630.
Commit: 40460a5cf76c973a783fb2f5229e1076398df96e
https://github.com/llvm/llvm-project/commit/40460a5cf76c973a783fb2f5229e1076398df96e
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilo.ll
Log Message:
-----------
[RISCV] Add basic ISel patterns for Xqcilo instructions (#135901)
This patch adds basic instruction selection patterns for generating the
48 bit load/store instructions that are a part of the Qualcomm uC Xqcilo
vendor extension.
Commit: 123b0e2a1e9de7465be8fb337a80d5d8984f93ae
https://github.com/llvm/llvm-project/commit/123b0e2a1e9de7465be8fb337a80d5d8984f93ae
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
Log Message:
-----------
Reapply "[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vector types (#132358)" (#135758)
reapply https://github.com/llvm/llvm-project/pull/132358, tests updated.
Commit: f3c77445791b510858561cb424ffa1cd7513250b
https://github.com/llvm/llvm-project/commit/f3c77445791b510858561cb424ffa1cd7513250b
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
A clang/test/Sema/complex-div-warn-higher-precision.cpp
Log Message:
-----------
[Clang][Sema] Fix -Whigher-precision-for-complex-division (#131477)
- Fix false positive when divisor is a real number.
- Fix false negative when divident is real, but divisor is complex.
- Fix false negative when due to promotion the division is performed in
higher precision than the divident.
- Fix false negative in divide and assign (`a /= b`).
Fixes: #131127
---------
Co-authored-by: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Commit: dfb5b6e27ca3f8b79ebd3346d11b3088c1600b81
https://github.com/llvm/llvm-project/commit/dfb5b6e27ca3f8b79ebd3346d11b3088c1600b81
Author: leecheechen <chenli at loongson.cn>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/prefetchi.ll
Log Message:
-----------
[LoongArch] Don't crash on instruction prefetch intrinsics (#135760)
Instead of failing to select during isel, drop the intrinsic in
lowering.
Similar as the X86's PR. Seeing: https://reviews.llvm.org/D151050.
Fixes #134624
Commit: 9e650349bfdcd34998c461e1441f02a79c664d38
https://github.com/llvm/llvm-project/commit/9e650349bfdcd34998c461e1441f02a79c664d38
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[mlir] Construct SmallVector with ArrayRef (NFC) (#135899)
Commit: 52e3f3d68cbabf81c4c118cfb823828f03b712c4
https://github.com/llvm/llvm-project/commit/52e3f3d68cbabf81c4c118cfb823828f03b712c4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
Log Message:
-----------
[mlir] Use llvm::make_first_range (NFC) (#135900)
Commit: ac4712482e3ff886eee7c044dd33dd4b5d648036
https://github.com/llvm/llvm-project/commit/ac4712482e3ff886eee7c044dd33dd4b5d648036
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCFixup.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
Log Message:
-----------
[LoongArch] Use FirstRelocationKind to remove ELFObjectWriter::recordRelocation special case
The current implementation of R_LARCH_SUB{8,16,32,64} and TLS relocation types relies on fixup kinds FirstLiteralRelocationKind + offset (originally intended for .reloc directives). While this is clever and prevents switch cases like
```
case fixup_...sub8:
return ELF::R_LARCH_SUB8;
```
it needs revision.
GNU Assembler treats .reloc directives differently from standard relocations, notably by skipping
* Skipping STT_SECTION adjustments (when a referenced symbol is local and satisfies certain conditions, it can be redirected to a section symbol).
* Skipping STT_TLS symbol type setting for TLS relocations.
Encode relocatin type t with FirstRelocationKind+t instead of
FirstLiteralRelocationKind+t. The new value is less than
FirstLiteralRelocationKind and will not be treated as a .reloc
directive.
Close #135521
Commit: 2ef78ddee1138c4a67ed09fa7a07084b06e8f277
https://github.com/llvm/llvm-project/commit/2ef78ddee1138c4a67ed09fa7a07084b06e8f277
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/premerge.yaml
M .mailmap
M bolt/CMakeLists.txt
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/runtime/common.h
M bolt/runtime/hugify.cpp
A bolt/test/AArch64/validate-secondary-entry-point.s
A bolt/test/RISCV/validate-secondary-entry-point.s
A bolt/test/runtime/Inputs/user_func_order.txt
R bolt/test/runtime/X86/Inputs/user_func_order.txt
R bolt/test/runtime/X86/hugify.c
R bolt/test/runtime/X86/user-func-reorder.c
A bolt/test/runtime/hugify.c
A bolt/test/runtime/relative-vftable.cpp
A bolt/test/runtime/user-func-reorder.c
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-tidy/readability/StaticAccessedThroughInstanceCheck.cpp
M clang-tools-extra/clang-tidy/utils/Matchers.cpp
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/test/CMakeLists.txt
M clang-tools-extra/clangd/test/lit.site.cfg.py.in
M clang-tools-extra/test/clang-tidy/checkers/performance/for-range-copy.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/inefficient-algorithm.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/type-promotion-in-math-fn.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-no-warn.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-hungarian-notation-lower-case-prefix.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-outofline.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration-cxx17.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration.c
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-declaration-ignore-macros.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ControlFlowIntegrity.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/PointerAuthentication.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/PrettyPrinter.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/ABI.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/FileEntry.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
A clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Basic/Targets/Mips.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGPointerAuth.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/DirectX.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/PPCLinux.cpp
M clang/lib/Driver/ToolChains/PPCLinux.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-array.cpp
M clang/test/AST/ast-dump-ptrauth-json.cpp
M clang/test/AST/ast-dump-templates.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor-templates.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/C/C11/n1285.c
M clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/CodeGen/struct.c
A clang/test/CIR/CodeGen/struct.cpp
A clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
A clang/test/CIR/IR/struct.cir
M clang/test/CXX/temp/temp.decls/temp.mem/p5.cpp
M clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
M clang/test/CodeCompletion/member-access.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
M clang/test/CodeGen/arm-target-features.c
A clang/test/CodeGen/atomic-ops-load.c
M clang/test/CodeGen/attr-target-x86.c
A clang/test/CodeGen/builtin-maxnum-minnum.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/ptrauth-debuginfo.c
A clang/test/CodeGen/ptrauth-qualifier-const-init.c
A clang/test/CodeGen/ptrauth-qualifier-function.c
A clang/test/CodeGen/ptrauth-qualifier-loadstore.c
A clang/test/CodeGen/unique-source-file-names.c
A clang/test/CodeGenCXX/bug135668.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
A clang/test/CodeGenCXX/mangle-itanium-ptrauth.cpp
A clang/test/CodeGenCXX/mangle-ms-ptrauth.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
R clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
A clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
M clang/test/CodeGenCXX/sections.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/CodeGenDirectX/Builtins/dot2add.c
M clang/test/CodeGenHLSL/builtins/dot2add.hlsl
A clang/test/CodeGenHipStdPar/rdc-does-not-enable-hipstdpar.cpp
A clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
A clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
A clang/test/Driver/arm-fpu-selection.s
A clang/test/Driver/armv7-default-neon.s
A clang/test/Driver/armv7s-default-vfpv4.s
M clang/test/Driver/armv8.1m.main.s
M clang/test/Driver/hip-options.hip
A clang/test/Driver/hip-thinlto.hip
M clang/test/Driver/mips-abi.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/print-supported-extensions-arm.c
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/Driver/unique-source-file-names.c
A clang/test/FixIt/fixit-bool.cpp
M clang/test/Interpreter/inline-virtual.cpp
M clang/test/Modules/odr_hash.cpp
A clang/test/Modules/relocatable-modules.cpp
M clang/test/Modules/safe_buffers_optout.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/OpenMP/declare_variant_messages.c
M clang/test/OpenMP/declare_variant_messages.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/distribute_simd_linear_messages.cpp
M clang/test/OpenMP/for_linear_messages.cpp
M clang/test/OpenMP/for_simd_linear_messages.cpp
M clang/test/OpenMP/for_simd_misc_messages.c
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_misc_messages.c
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/simd_misc_messages.c
M clang/test/OpenMP/target_parallel_for_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/target_simd_linear_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/target_teams_distribute_simd_linear_messages.cpp
M clang/test/OpenMP/task_affinity_messages.cpp
M clang/test/OpenMP/task_depend_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_linear_messages.cpp
M clang/test/OpenMP/teams_distribute_simd_linear_messages.cpp
A clang/test/Parser/ptrauth-qualifier.c
M clang/test/Preprocessor/arm-target-features.c
A clang/test/Preprocessor/embed-reject-device-files-lin.c
A clang/test/Preprocessor/embed-reject-device-files-win.c
M clang/test/Preprocessor/embed___has_embed.c
M clang/test/Preprocessor/has_attribute.c
M clang/test/Preprocessor/has_attribute.cpp
M clang/test/Preprocessor/has_c_attribute.c
M clang/test/Preprocessor/has_include.c
A clang/test/Preprocessor/pr133574.c
A clang/test/Preprocessor/ptrauth_extension.c
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
M clang/test/Sema/attr-capabilities.c
A clang/test/Sema/attr-decl-after-definition-std.c
A clang/test/Sema/attr-musttail.cpp
M clang/test/Sema/code_align.c
A clang/test/Sema/complex-div-warn-higher-precision.cpp
A clang/test/Sema/ptrauth-atomic-ops.c
A clang/test/Sema/ptrauth-qualifier.c
A clang/test/Sema/warn-cast-function-type-win.c
M clang/test/Sema/warn-int-in-bool-context.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetime-capture-by.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/bug135668.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
R clang/test/SemaCXX/gh134265.cpp
A clang/test/SemaCXX/ptrauth-qualifier.cpp
A clang/test/SemaCXX/ptrauth-template-parameters.cpp
M clang/test/SemaCXX/warn-dangling-local.cpp
A clang/test/SemaCXX/windows-Wpadded-bitfield.cpp
A clang/test/SemaCXX/windows-Wpadded.cpp
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M clang/test/SemaHLSL/Language/OutputParameters.hlsl
M clang/test/SemaHLSL/parameter_modifiers.hlsl
A clang/test/SemaObjC/ptrauth-qualifier.m
M clang/test/SemaOpenCL/to_addr_builtin.cl
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
M clang/tools/libclang/CXType.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/Format/FormatTest.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/RootAutoDetector.cpp
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/asan/TestCases/Posix/mmap_limit_mb.cpp
A compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang/docs/Extensions.md
M flang/docs/ModFiles.md
M flang/docs/OpenACC.md
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Driver/do_concurrent_to_omp_cli.f90
M flang/test/Driver/flang-ld-powerpc.f90
M flang/test/Driver/linker-flags.f90
M flang/test/Fir/CUDA/cuda-target-rewrite.mlir
A flang/test/Fir/target-rewrite-fmfs.fir
M flang/test/Fir/target-rewrite-selective.fir
A flang/test/HLFIR/minval-maxval-issue-134308.fir
A flang/test/HLFIR/volatile1.fir
A flang/test/HLFIR/volatile2.fir
A flang/test/HLFIR/volatile3.fir
A flang/test/HLFIR/volatile4.fir
M flang/test/Lower/OpenACC/acc-private.f90
R flang/test/Lower/OpenMP/Todo/depend-clause-vector-subscript-array-section.f90
M flang/test/Lower/OpenMP/clause-cleanup.f90
A flang/test/Lower/OpenMP/optional-argument-map.f90
M flang/test/Lower/OpenMP/task-depend-array-section.f90
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
A flang/test/Parser/OpenMP/bug518.f
A flang/test/Preprocessing/bug518.F
M flang/test/Semantics/OpenACC/acc-atomic-validity.f90
M flang/test/Semantics/OpenACC/acc-declare-validity.f90
M flang/test/Semantics/spec-expr.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/aarch64/headers.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_itimerval.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_itimerval.h
M libc/include/sys/time.yaml
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/getitimer.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/getitimer.cpp
A libc/src/sys/time/linux/setitimer.cpp
A libc/src/sys/time/setitimer.h
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/getitimer_test.cpp
A libc/test/src/sys/time/setitimer_test.cpp
A libclc/clc/include/clc/integer/clc_ctz.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_ctz.cl
M libclc/cmake/modules/AddLibclc.cmake
R libclc/generic/include/clc/atom_decl_int32.inc
R libclc/generic/include/clc/atom_decl_int64.inc
A libclc/generic/include/clc/atomic/atom_add.h
A libclc/generic/include/clc/atomic/atom_and.h
A libclc/generic/include/clc/atomic/atom_cmpxchg.h
A libclc/generic/include/clc/atomic/atom_dec.h
A libclc/generic/include/clc/atomic/atom_decl_int32.inc
A libclc/generic/include/clc/atomic/atom_decl_int64.inc
A libclc/generic/include/clc/atomic/atom_inc.h
A libclc/generic/include/clc/atomic/atom_max.h
A libclc/generic/include/clc/atomic/atom_min.h
A libclc/generic/include/clc/atomic/atom_or.h
A libclc/generic/include/clc/atomic/atom_sub.h
A libclc/generic/include/clc/atomic/atom_xchg.h
A libclc/generic/include/clc/atomic/atom_xor.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_global_int32_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_global_int32_extended_atomics/atom_xor.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_int64_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_int64_extended_atomics/atom_xor.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_add.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_cmpxchg.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_dec.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_inc.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_sub.h
R libclc/generic/include/clc/cl_khr_local_int32_base_atomics/atom_xchg.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_and.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_max.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_min.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_or.h
R libclc/generic/include/clc/cl_khr_local_int32_extended_atomics/atom_xor.h
M libclc/generic/include/clc/clc.h
A libclc/generic/include/clc/integer/ctz.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/atom_int32_binary.inc
A libclc/generic/lib/atomic/atom_add.cl
A libclc/generic/lib/atomic/atom_and.cl
A libclc/generic/lib/atomic/atom_cmpxchg.cl
A libclc/generic/lib/atomic/atom_dec.cl
A libclc/generic/lib/atomic/atom_inc.cl
A libclc/generic/lib/atomic/atom_int32_binary.inc
A libclc/generic/lib/atomic/atom_max.cl
A libclc/generic/lib/atomic/atom_min.cl
A libclc/generic/lib/atomic/atom_or.cl
A libclc/generic/lib/atomic/atom_sub.cl
A libclc/generic/lib/atomic/atom_xchg.cl
A libclc/generic/lib/atomic/atom_xor.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_global_int32_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_global_int32_extended_atomics/atom_xor.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_int64_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_int64_extended_atomics/atom_xor.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_add.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_cmpxchg.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_dec.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_inc.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_sub.cl
R libclc/generic/lib/cl_khr_local_int32_base_atomics/atom_xchg.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_and.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_max.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_min.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_or.cl
R libclc/generic/lib/cl_khr_local_int32_extended_atomics/atom_xor.cl
A libclc/generic/lib/integer/ctz.cl
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/memory_order.h
M libcxx/include/__bit/popcount.h
M libcxx/include/__functional/hash.h
A libcxx/include/__mdspan/aligned_accessor.h
M libcxx/include/__mdspan/mdspan.h
A libcxx/include/__memory/is_sufficiently_aligned.h
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__utility/convert_to_integral.h
M libcxx/include/__utility/to_underlying.h
M libcxx/include/__verbose_abort
M libcxx/include/future
M libcxx/include/mdspan
M libcxx/include/memory
M libcxx/include/module.modulemap
M libcxx/include/version
M libcxx/modules/std/mdspan.inc
M libcxx/modules/std/memory.inc
M libcxx/src/verbose_abort.cpp
A libcxx/test/libcxx/containers/views/mdspan/aligned_accessor/byte_alignment.verify.cpp
A libcxx/test/libcxx/containers/views/mdspan/aligned_accessor/element_type.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.iterators/reverse_iterator.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/access.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.conversion.from.default_accessor.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.conversion.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/ctor.default.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/offset.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/operator.conversion.to.default_accessor.pass.cpp
A libcxx/test/std/containers/views/mdspan/aligned_accessor/types.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mdspan.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/memory/ptr.align/is_sufficiently_aligned.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxxabi/test/test_demangle.pass.cpp
M libunwind/docs/BuildingLibunwind.rst
M lldb/include/lldb/API/SBReproducer.h
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/FormatEntity.h
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Core/RichManglingContext.h
M lldb/include/lldb/Host/ProcessRunLock.h
M lldb/include/lldb/Symbol/SymbolContext.h
M lldb/include/lldb/Target/Language.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
R lldb/scripts/reproducer-replay.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBReproducer.cpp
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/RichManglingContext.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Host/common/ProcessRunLock.cpp
M lldb/source/Host/windows/ProcessRunLock.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/Language.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/param_entry_vals/basic_entry_values/main.cpp
M lldb/test/API/functionalities/tail_call_frames/inlining_and_tail_calls/main.cpp
M lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
A lldb/test/API/tools/lldb-dap/cancel/Makefile
A lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
A lldb/test/API/tools/lldb-dap/cancel/main.c
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/Shell/Recognizer/verbose_trap-in-stl-max-depth.test
M lldb/test/Shell/Settings/TestFrameFormatName.test
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
M lldb/test/requirements.txt
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
A lldb/tools/lldb-dap/Handler/CancelRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/DiagnosticEventTest.cpp
M lldb/unittests/Core/RichManglingContextTest.cpp
M lldb/unittests/Interpreter/TestCommandPaths.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
M lldb/unittests/Language/ObjC/ObjCLanguageTest.cpp
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M lldb/unittests/Process/ProcessEventDataTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteClientBaseTest.cpp
M lldb/unittests/ScriptInterpreter/Lua/ScriptInterpreterTests.cpp
M lldb/unittests/Target/ExecutionContextTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Target/StackFrameRecognizerTest.cpp
M lldb/unittests/Thread/ThreadTest.cpp
M llvm/cmake/modules/TableGen.cmake
M llvm/docs/CodeOfConduct.rst
A llvm/docs/InterfaceExportAnnotations.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/Analysis/CFG.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/BranchRelaxation.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/MachineInstr.h
A llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
A llvm/include/llvm/CodeGen/SanitizerBinaryMetadata.h
A llvm/include/llvm/CodeGen/StackFrameLayoutAnalysisPass.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
A llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/Frontend/OpenACC/ACC.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/ELFAttributes.h
M llvm/include/llvm/Support/Endian.h
A llvm/include/llvm/Support/InterleavedRange.h
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h
M llvm/include/llvm/Transforms/IPO/ThinLTOBitcodeWriter.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/LoopVersioning.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/PHITransAddr.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/BranchRelaxation.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp
M llvm/lib/CodeGen/SanitizerBinaryMetadata.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/Demangle/MicrosoftDemangle.cpp
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
A llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
M llvm/lib/IR/Type.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/ELFAttrParserExtended.cpp
M llvm/lib/TableGen/CMakeLists.txt
M llvm/lib/TableGen/Main.cpp
A llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXIL.td
A llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
A llvm/lib/Target/DirectX/DXILCBufferAccess.h
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaFixupKinds.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Analysis/CostModel/AArch64/cmp.ll
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
A llvm/test/Analysis/ScalarEvolution/pr135531.ll
A llvm/test/Bitcode/thinlto-preserve-uselistorder.ll
M llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
A llvm/test/CodeGen/AArch64/aarch64-sve-fill-spill-pair.ll
M llvm/test/CodeGen/AArch64/branch-relax-block-size.mir
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
M llvm/test/CodeGen/AArch64/cpus.ll
A llvm/test/CodeGen/AArch64/csr-copy-hint.mir
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/neon-extmul.ll
M llvm/test/CodeGen/AArch64/peephole-orr.mir
A llvm/test/CodeGen/AArch64/pr135776.ll
A llvm/test/CodeGen/AArch64/pr135821.ll
R llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
M llvm/test/CodeGen/AArch64/ptrauth-ret.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-extract.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-extract-mova.ll
A llvm/test/CodeGen/AArch64/stack-size-section.ll
A llvm/test/CodeGen/AArch64/sve-vls-ldst-opt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-sext-inreg.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-trunc-sextinreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-cast-load-i1.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-non-byte-sizes.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
M llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
M llvm/test/CodeGen/AVR/dynalloca.ll
M llvm/test/CodeGen/AVR/return.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/dot2_error.ll
M llvm/test/CodeGen/DirectX/dot2add.ll
M llvm/test/CodeGen/DirectX/dot3_error.ll
M llvm/test/CodeGen/DirectX/dot4_error.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/normalize.ll
A llvm/test/CodeGen/Hexagon/hwloop-dist-check.mir
M llvm/test/CodeGen/Hexagon/swp-phi-start.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll
A llvm/test/CodeGen/LoongArch/prefetchi.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
A llvm/test/CodeGen/Mips/vararg.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
A llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
M llvm/test/CodeGen/NVPTX/i1-load-lower.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/PowerPC/pr43527.ll
M llvm/test/CodeGen/PowerPC/pr48519.ll
M llvm/test/CodeGen/PowerPC/sms-grp-order.ll
A llvm/test/CodeGen/RISCV/emit-x8-as-fp.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
A llvm/test/CodeGen/RISCV/xqcilia.ll
A llvm/test/CodeGen/RISCV/xqcilo.ll
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
M llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
M llvm/test/CodeGen/SPARC/32abi.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SPARC/bigreturn.ll
M llvm/test/CodeGen/SPARC/float-constants.ll
M llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
M llvm/test/CodeGen/SPARC/leafproc.ll
M llvm/test/CodeGen/SPARC/parts.ll
M llvm/test/CodeGen/SPARC/tailcall.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SystemZ/stack-size-section.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
A llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
M llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
M llvm/test/CodeGen/X86/fake-use-remove-loads.mir
M llvm/test/CodeGen/X86/ghc-cc64.ll
M llvm/test/CodeGen/X86/lea-8bit.ll
M llvm/test/CodeGen/X86/mwaitx.ll
A llvm/test/CodeGen/X86/pr134602.ll
A llvm/test/CodeGen/Xtensa/minmax.ll
A llvm/test/CodeGen/Xtensa/sext.ll
A llvm/test/Demangle/ms-ptrauth.test
M llvm/test/MC/AMDGPU/bf16_imm.s
M llvm/test/MC/AMDGPU/gfx11-promotions.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/vinterp.s
A llvm/test/MC/Disassembler/RISCV/emit-x8-as-fp.txt
A llvm/test/MC/RISCV/emit-x8-as-fp.s
M llvm/test/MC/RISCV/function-call-invalid.s
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
M llvm/test/MC/RISCV/tail-call-invalid.s
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/test/MC/RISCV/xmips-invalid.s
M llvm/test/MC/RISCV/xmips-valid.s
M llvm/test/MC/RISCV/xqcilb-invalid.s
M llvm/test/MC/RISCV/xqcilb-relocations.s
M llvm/test/MC/Xtensa/Relocations/fixups-diagnostics.s
M llvm/test/MC/Xtensa/Relocations/fixups.s
M llvm/test/MC/Xtensa/Relocations/relocations.s
A llvm/test/MC/Xtensa/loop.s
A llvm/test/MC/Xtensa/minmax.s
A llvm/test/MC/Xtensa/nsau.s
A llvm/test/MC/Xtensa/sext.s
A llvm/test/MC/Xtensa/sext_invalid.s
A llvm/test/Other/new-pm-lto-prelink-samplepgo-inline-threshold.ll
R llvm/test/Other/new-pm-thinlto-prelink-samplepgo-inline-threshold.ll
A llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
M llvm/test/Transforms/GVN/pr65447.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-loadstore.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-combine-to-u-forms.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-ptest.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-rdffr-predication.ll
M llvm/test/Transforms/InstCombine/array.ll
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/sincospi.ll
M llvm/test/Transforms/InstCombine/vscale_gep.ll
M llvm/test/Transforms/LICM/pr50367.ll
M llvm/test/Transforms/LICM/pr59324.ll
M llvm/test/Transforms/LoopUnroll/runtime-multiexit-heuristic.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll
M llvm/test/Transforms/ObjCARC/contract.ll
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fminimumnum.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
A llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fminimumnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
A llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-full-match.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
A llvm/test/Transforms/SLPVectorizer/bbi-106161.ll
A llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
M llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split.ll
A llvm/test/Transforms/ThinLTOBitcodeWriter/unique-source-file-names.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/unsplittable.ll
M llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll
M llvm/test/Verifier/SystemZ/intrinsic-immarg.ll
M llvm/test/Verifier/intrinsic-immarg.ll
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
R llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.exe
R llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.o
M llvm/test/tools/llc/new-pm/pipeline.ll
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-long.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-short.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-type.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-values.s
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-melformed-ver.s
A llvm/test/tools/llvm-reduce/thinlto-preserve-uselistorder.ll
M llvm/tools/llvm-debuginfo-analyzer/llvm-debuginfo-analyzer.cpp
M llvm/tools/llvm-nm/llvm-nm.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/DXILResourceTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/InterleavedRangeTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/LLVMVisualizers/llvm.natvis
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/SequenceToOffsetTable.h
M llvm/utils/TableGen/Basic/TableGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
M llvm/utils/gdb-scripts/prettyprinters.py
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/TableGen/BUILD.gn
M llvm/utils/lldbDataFormatters.py
M llvm/utils/release/build_llvm_release.bat
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/DefiningDialects/_index.md
M mlir/docs/Diagnostics.md
M mlir/docs/Interfaces.md
M mlir/docs/PDLL.md
M mlir/docs/Traits/_index.md
M mlir/docs/Tutorials/QuickstartRewrites.md
M mlir/docs/Tutorials/Toy/Ch-5.md
M mlir/docs/Tutorials/Toy/Ch-7.md
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/examples/transform-opt/mlir-transform-opt.cpp
A mlir/include/mlir-c/Dialect/SMT.h
A mlir/include/mlir-c/Target/ExportSMTLIB.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.td
M mlir/include/mlir/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/IR/AffineExpr.h
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.td
M mlir/include/mlir/IR/EnumAttr.td
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/include/mlir/IR/Location.h
M mlir/include/mlir/IR/Properties.td
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/IR/Value.h
M mlir/include/mlir/Tools/PDLL/AST/Types.h
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/Analysis/Presburger/Simplex.cpp
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SMT.cpp
M mlir/lib/CAPI/Target/CMakeLists.txt
A mlir/lib/CAPI/Target/ExportSMTLIB.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/GPU/Transforms/EliminateBarriers.cpp
M mlir/lib/Dialect/GPU/Transforms/ShuffleRewriter.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.h
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Traits.cpp
M mlir/lib/Dialect/Transform/Transforms/TransformInterpreterUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/SymbolTable.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Target/SMTLIB/CMakeLists.txt
M mlir/lib/Tools/mlir-pdll-lsp-server/PDLLServer.cpp
M mlir/lib/Tools/tblgen-lsp-server/TableGenServer.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/CAPI/CMakeLists.txt
A mlir/test/CAPI/smt.c
M mlir/test/CMakeLists.txt
A mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-unsupported.mlir
M mlir/test/Conversion/TensorToLinalg/tensor-ops-to-linalg.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/AMDGPU/transfer-read-to-load.mlir
A mlir/test/Dialect/Bufferization/Transforms/tensorlike-bufferlike.mlir
M mlir/test/Dialect/GPU/shuffle-rewrite.mlir
M mlir/test/Dialect/Math/algebraic-simplification.mlir
M mlir/test/Dialect/OpenACC/legalize-data.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Shape/canonicalize.mlir
M mlir/test/Dialect/Tensor/bubble-reshapes.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
A mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/IR/enum-attr-invalid.mlir
M mlir/test/IR/enum-attr-roundtrip.mlir
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestTensorLikeAndBufferLike.cpp
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.h
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/IR/SymbolTableTest.cpp
A offload/test/offloading/fortran/optional-mapped-arguments.f90
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/inttypes/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/epoll/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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