[all-commits] [llvm/llvm-project] 8ed397: [DAGCombiner] Disable narrowExtractedVectorLoad fo...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Apr 15 22:39:32 PDT 2025
Branch: refs/heads/users/vitalybuka/spr/main.nfccfi-add-test-to-check-for-flto-and-fvisibility-flags
Home: https://github.com/llvm/llvm-project
Commit: 8ed397d8e4d014ecc5df89a9d908c5808f201b65
https://github.com/llvm/llvm-project/commit/8ed397d8e4d014ecc5df89a9d908c5808f201b65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/pr135821.ll
Log Message:
-----------
[DAGCombiner] Disable narrowExtractedVectorLoad for indexed loads. (#135847)
The later code does not expect or preserve the index output.
Fixes #135821
Commit: a6208ce4c15142c26c6b73651bf466ae6b470cb0
https://github.com/llvm/llvm-project/commit/a6208ce4c15142c26c6b73651bf466ae6b470cb0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/include/llvm/Analysis/CFG.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Log Message:
-----------
[nfc] move `isPresplitCoroSuspendExitEdge` to Analysis/CFG (#135849)
Commit: 6e2bca840df9dfcffc5068c1ad0c9575f0c57e76
https://github.com/llvm/llvm-project/commit/6e2bca840df9dfcffc5068c1ad0c9575f0c57e76
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 2d98bdc12c29
Commit: 31f39c83259401a26b3660dd75f645002258571d
https://github.com/llvm/llvm-project/commit/31f39c83259401a26b3660dd75f645002258571d
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-cast-load-i1.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
Log Message:
-----------
[AMDGPU] Remove the AnnotateKernelFeatures pass (#130198)
Previously the AnnotateKernelFeatures pass infers two attributes:
amdgpu-calls and amdgpu-stack-objects, which are used to help determine
if flat scratch init is allowed. PR #118907 created the
amdgpu-no-flat-scratch-init attribute. Continuing with that work, this
patch makes use of this attribute to determine flat scratch init,
replacing amdgpu-calls and amdgpu-stack-objects. This also leads to the
removal of the AnnotateKernelFeatures pass.
Commit: 16980d5463c787a48ffb78fd9bbe3d9d32757f34
https://github.com/llvm/llvm-project/commit/16980d5463c787a48ffb78fd9bbe3d9d32757f34
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
R clang/test/CodeGenCXX/local-class-instantiation.cpp
Log Message:
-----------
Revert "[Clang] Fix dependent local class instantiation bugs" (#135870)
Reverts llvm/llvm-project#134038
This crashes clang as reported here:
https://github.com/llvm/llvm-project/pull/134038#issuecomment-2807092646
Commit: af63e1b505453de3e6a281d1b72e62fa8d396b23
https://github.com/llvm/llvm-project/commit/af63e1b505453de3e6a281d1b72e62fa8d396b23
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
Log Message:
-----------
[OpenACC][CIR] Implement 'self' lowering on compute constructs (#135851)
This is our first attempt at lowering a clause that is an 'operand' in
the OpenACC operand, so it does quite a bit of refactoring. My previous
plans on how to emit the clauses was not viable, so we instead do
'create the op, then use the visitor to fill in the operands'. This
resulted in the 'applyAttributes' function getting removed and a few
other functions simplified.
Additionally, it requires setting the insertion point a little to make
sure we're inserting 'around' the operation correctly.
Finally, since the OpenACC dialect only understands the MLIR types, we
had to introduce a use of the unrealized-conversion-cast, which we'll
probably getting good use out of in the future.
Commit: e4d951d2e42a9124bd87275a864804c4b84b62e3
https://github.com/llvm/llvm-project/commit/e4d951d2e42a9124bd87275a864804c4b84b62e3
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
LowerTypeTests: Fix quadratic complexity.
Currently we have quadratic complexity in LowerTypeTests because
ScopedSaveAliaseesAndUsed loops over all aliases for each disjoint
set, and the number of aliases and number of disjoint sets is
roughly proportional to the program size. Fix that by moving
ScopedSaveAliaseesAndUsed to LowerTypeTestsModule::lower() so that
we do this only once.
Reviewers: fmayer, vitalybuka
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/135875
Commit: 3428cc94c893f9a09728c707baf018b9cdfaf243
https://github.com/llvm/llvm-project/commit/3428cc94c893f9a09728c707baf018b9cdfaf243
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M flang-rt/lib/runtime/extensions.cpp
M flang/include/flang/Runtime/extensions.h
Log Message:
-----------
[flang] Implement external routine usage of hostnm() (#134900)
Previously, `hostnm` extended intrinsic was implemented as proper
intrinsic. Since then we found out that some applications use `hostnm`
as external routine via `external hostnm`. This prevents `hostnm` from
being recognized as an intrinsic. This PR implements `hostnm` as
external routine.
Commit: 58c3fba7063eaca926931a412c329e9ac4deefd6
https://github.com/llvm/llvm-project/commit/58c3fba7063eaca926931a412c329e9ac4deefd6
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
Revert "LowerTypeTests: Fix quadratic complexity."
This reverts commit e4d951d2e42a9124bd87275a864804c4b84b62e3.
Need to investigate some test failures.
Commit: 860d0383db80ea881e957a5628d04e9d725b919d
https://github.com/llvm/llvm-project/commit/860d0383db80ea881e957a5628d04e9d725b919d
Author: Haowei <haowei at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Not building llvm-mt when LIBXML2 is not enabled. (#135877)
This patch prevents including the llvm-mt to `LLVM_TOOLCHAIN_TOOLS` in the
Fuchsia toolchain when LIBXML2 is not explicitly enabled.
Commit: 6ad922b75a41911e0e394d5d367bee1240ad509f
https://github.com/llvm/llvm-project/commit/6ad922b75a41911e0e394d5d367bee1240ad509f
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
Log Message:
-----------
[OpenACC][CIR] Implement lowering for 'if' on compute constructs
This is the same for these as the 'self' was, except it doesn't support
the 'empty' variant, so we have to just generate the condition. This
patch does that, and extracts the 'condition' emission to a separate
function since the two share it.
Commit: 0b8f817aab7a242e0bfb519cb07c8979ffadef36
https://github.com/llvm/llvm-project/commit/0b8f817aab7a242e0bfb519cb07c8979ffadef36
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M bolt/runtime/hugify.cpp
Log Message:
-----------
[BOLT] Fix conditional compilation of hugify.cpp (#135880)
Fix builds after #117158: do not build hugify.cpp on Apple platforms.
Commit: bd4d3519c708d70ed8c827a27b63f13b0229ef00
https://github.com/llvm/llvm-project/commit/bd4d3519c708d70ed8c827a27b63f13b0229ef00
Author: Camsyn <camsyn at foxmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M compiler-rt/lib/asan/asan_report.cpp
A compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
Log Message:
-----------
[ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (#131756)
### Description
This PR resolves a deadlock between AddressSanitizer (ASan) and
LeakSanitizer (LSan)
that occurs when both sanitizers attempt to acquire locks in conflicting
orders across
threads. The fix ensures safe lock acquisition ordering by preloading
module information
before error reporting.
---
### Issue Details
**Reproducer**
```cpp
// Thread 1: ASan error path
int arr[1] = {0};
std::thread t([&]() {
arr[1] = 1; // Triggers ASan OOB error
});
// Thread 2: LSan check path
__lsan_do_leak_check();
```
**Lock Order Conflict**:
- Thread 1 (ASan error reporting):
1. Acquires ASan thread registry lock (B)
1. Attempts to acquire libdl lock (A) via `dl_iterate_phdr`
- Thread 2 (LSan leak check):
1. Acquires libdl lock (A) via `dl_iterate_phdr`
1. Attempts to acquire ASan thread registry lock (B)
This creates a circular wait condition (A -> B -> A) meeting all four
Coffman deadlock criteria.
---
### Fix Strategy
The root cause lies in ASan's error reporting path needing
`dl_iterate_phdr` (requiring lock A)
while already holding its thread registry lock (B). The solution:
1. **Preload Modules Early**: Force module list initialization _before_
acquiring ASan's thread lock
2. **Avoid Nested Locking**: Ensure symbolization (via dl_iterate_phdr)
completes before error reporting locks
Key code change:
```cpp
// Before acquiring ASan's thread registry lock:
Symbolizer::GetOrInit()->GetRefreshedListOfModules();
```
This guarantees module information is cached before lock acquisition,
eliminating
the need for `dl_iterate_phdr` calls during error reporting.
---
### Testing
Added **asan_lsan_deadlock.cpp** test case:
- Reproduces deadlock reliably without fix **under idle system
conditions**
- Uses watchdog thread to detect hangs
- Verifies ASan error reports correctly without deadlock
**Note**: Due to the inherent non-determinism of thread scheduling and
lock acquisition timing,
this test may not reliably reproduce the deadlock on busy systems (e.g.,
during parallel
`ninja check-asan` runs).
---
### Impact
- Fixes rare but severe deadlocks in mixed ASan+LSan environments
- Maintains thread safety guarantees for both sanitizers
- No user-visible behavior changes except deadlock elimination
---
### Relevant Buggy Code
- Code in ASan's asan_report.cpp
```cpp
explicit ScopedInErrorReport(bool fatal = false)
: halt_on_error_(fatal || flags()->halt_on_error) {
// Acquire lock B
asanThreadRegistry().Lock();
}
~ScopedInErrorReport() {
...
// Try to acquire lock A under holding lock B via the following path
// #4 0x000071a353d83e93 in __GI___dl_iterate_phdr (
// callback=0x5d1a07a39580 <__sanitizer::dl_iterate_phdr_cb(dl_phdr_info*, unsigned long, void*)>,
// data=0x6da3510fd3f0) at ./elf/dl-iteratephdr.c:39
// #5 0x00005d1a07a39574 in __sanitizer::ListOfModules::init (this=0x71a353ebc080)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp:784
// #6 0x00005d1a07a429e3 in __sanitizer::Symbolizer::RefreshModules (this=0x71a353ebc058)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:188
// #7 __sanitizer::Symbolizer::FindModuleForAddress (this=this at entry=0x71a353ebc058,
// address=address at entry=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:214
// #8 0x00005d1a07a4291b in __sanitizer::Symbolizer::SymbolizePC (this=0x71a353ebc058, addr=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp:88
// #9 0x00005d1a07a40df7 in __sanitizer::(anonymous namespace)::StackTraceTextPrinter::ProcessAddressFrames (
// this=this at entry=0x6da3510fd520, pc=102366378805727)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:37
// #10 0x00005d1a07a40d27 in __sanitizer::StackTrace::PrintTo (this=this at entry=0x6da3510fd5e8,
// output=output at entry=0x6da3510fd588)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:110
// #11 0x00005d1a07a410a1 in __sanitizer::StackTrace::Print (this=0x6da3510fd5e8)
// at llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp:133
// #12 0x00005d1a0798758d in __asan::ErrorGeneric::Print (
// this=0x5d1a07aa4e08 <__asan::ScopedInErrorReport::current_error_+8>)
// at llvm-project/compiler-rt/lib/asan/asan_errors.cpp:617
current_error_.Print();
...
}
```
- Code in LSan's lsan_common_linux.cpp
```cpp
void LockStuffAndStopTheWorld(StopTheWorldCallback callback,
CheckForLeaksParam *argument) {
// Acquire lock A
dl_iterate_phdr(LockStuffAndStopTheWorldCallback, ¶m);
}
static int LockStuffAndStopTheWorldCallback(struct dl_phdr_info *info,
size_t size, void *data) {
// Try to acquire lock B under holding lock A via the following path
// #3 0x000055555562b34a in __sanitizer::ThreadRegistry::Lock (this=<optimized out>)
// at llvm-project/compiler-rt/lib/asan/../sanitizer_common/sanitizer_thread_registry.h:99
// #4 __lsan::LockThreads () at llvm-project/compiler-rt/lib/asan/asan_thread.cpp:484
// #5 0x0000555555652629 in __lsan::ScopedStopTheWorldLock::ScopedStopTheWorldLock (this=<optimized out>)
// at llvm-project/compiler-rt/lib/lsan/lsan_common.h:164
// #6 __lsan::LockStuffAndStopTheWorldCallback (info=<optimized out>, size=<optimized out>, data=0x0,
// data at entry=0x7fffffffd158) at llvm-project/compiler-rt/lib/lsan/lsan_common_linux.cpp:120
ScopedStopTheWorldLock lock;
DoStopTheWorldParam *param = reinterpret_cast<DoStopTheWorldParam *>(data);
StopTheWorld(param->callback, param->argument);
return 1;
}
```
Commit: 77f0708b9d4feee8b8a67a5f571be741be4e26af
https://github.com/llvm/llvm-project/commit/77f0708b9d4feee8b8a67a5f571be741be4e26af
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc]: Remove `-Wglobal-constructors` for libc tests (#131485)
* Relates to: https://github.com/llvm/llvm-project/issues/119281
* Removes `-Wglobal-constructors` as per:
https://github.com/llvm/llvm-project/pull/131485#pullrequestreview-2728020622
Commit: 6c6ab2a270b799f1397926c9064fa30fe2be1d96
https://github.com/llvm/llvm-project/commit/6c6ab2a270b799f1397926c9064fa30fe2be1d96
Author: YunQiang Su <syq at debian.org>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
Log Message:
-----------
AArch64: Set FMAXIMUMNUM and FMINIMUMNUM as Promote if not fullfp16 (#135708)
Since Promote will emit FP_EXTEND, the result of it will never be sNaN,
so we don't need worry about duplicated of FCANONICALIZE in
expandFMINIMUMNUM_FMAXIMUMNUM.
Commit: 4c97c5131f9ca32ce644a0be6e3586077ee03aa6
https://github.com/llvm/llvm-project/commit/4c97c5131f9ca32ce644a0be6e3586077ee03aa6
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilia.ll
Log Message:
-----------
[RISCV] Add ISel patterns for Xqcilia instructions (#135724)
This patch adds instruction selection patterns for generating the long
immediate arithmetic instructions.
We prefer generating instructions that have a 26 bit immediate to a 32
bit immediate given that both are of the same size but the former might
be easier to register allocate for. Base RISC-V arithmetic instructions
will be preferred, when applicable.
Commit: 0ce8ad68e44aaf50d1e2aa304fa8a1127e311e1d
https://github.com/llvm/llvm-project/commit/0ce8ad68e44aaf50d1e2aa304fa8a1127e311e1d
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/test/CodeGen/SPARC/float-constants.ll
Log Message:
-----------
[SPARC] Use fzero/fzeros to materialize FP zeros when we have VIS
Reviewers: rorth, brad0, s-barannikov
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135712
Commit: f3de63c64998eb46db9cf26aca9ebcc5453f6f44
https://github.com/llvm/llvm-project/commit/f3de63c64998eb46db9cf26aca9ebcc5453f6f44
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
Log Message:
-----------
[SPARC] Use addxccc to do multiword addition when we have VIS3
Reviewers: brad0, s-barannikov, rorth
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135713
Commit: e4f2191f568db718ed67defa664f83f763e7e74a
https://github.com/llvm/llvm-project/commit/e4f2191f568db718ed67defa664f83f763e7e74a
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
A llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3
Reviewers: s-barannikov, rorth, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/135714
Commit: 0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
https://github.com/llvm/llvm-project/commit/0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
Author: Jim Lin <jim at andestech.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM for CV immediate branch (#135771)
If there is another branch instruction also with immediate operand, but
it is used to specify which bit to be tested is set or clear. We only
check whether operand2 is immediate or not here. There are no way to
distinguish between them.
So add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM that we can know what
kinds of immediate branch instruction are matched in Select_* Pseudo.
Commit: 5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4
https://github.com/llvm/llvm-project/commit/5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrVIS.td
R llvm/test/CodeGen/SPARC/multiply-extension.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
Log Message:
-----------
Revert "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897)
This change breaks multiply tests on SPARC.
https://lab.llvm.org/buildbot/#/builders/108/builds/11691/steps/6/logs/FAIL__LLVM__multiply-extension_ll
Reverts llvm/llvm-project#135714
Commit: bed03ae36600f83f214c41af333f47fe8ead9ede
https://github.com/llvm/llvm-project/commit/bed03ae36600f83f214c41af333f47fe8ead9ede
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
Log Message:
-----------
[X86] Fix the issue of creating index reg negations (#135632)
The 8 and 16 bit LEA instruction support was added by PR #122102, and we
have to update creating index register negations accordingly. The issue
is exposed with APX NDD instructions.
Commit: e676866368a84c88aad90e138268e00a1c56a230
https://github.com/llvm/llvm-project/commit/e676866368a84c88aad90e138268e00a1c56a230
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
A llvm/test/CodeGen/Mips/vararg.ll
Log Message:
-----------
[Mips] Fix clang crashes when compiling a variadic function while targeting mips3 (#130558)
issue reason:
Because mips3 has the feature 'FeatureGP64Bit', when target mips3
process function `writeVarArgRegs`, the result of `getGPRSizeInBytes` is
8 and the result of `GetVarArgRegs` is `Mips::A0, Mips::A1, Mips::A2,
Mips::A3`. This would generate `gpr64 = COPY $a1` which should be `gpr64
= COPY $a1_64`.
Also when process `CC_Mips_FixedArg`, mips would CCDelegateTo
`CC_MipsO32_FP`. In fact, it should CCDelegateTo `CC_MipsN`.
Fix #98716.
Commit: 517605c20e6014543e91d45524a17c443aa11bd4
https://github.com/llvm/llvm-project/commit/517605c20e6014543e91d45524a17c443aa11bd4
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[alpha.webkit.UnretainedCallArgsChecker] Add the support for RetainPtrArc (#135532)
WebKit uses #define to rename RetainPtr to RetainPtrArc so add the
support for it.
Commit: 71d091699f956c89135bc165165e815ab7876359
https://github.com/llvm/llvm-project/commit/71d091699f956c89135bc165165e815ab7876359
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/inttypes/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/epoll/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc][bazel] Fold "libc_function_deps" into "deps" for libc_tests. (#135835)
libc_function_deps and deps are now identical, as we no longer need or
have special treatment for libc_function targets. Merge these attributes
passed to the libc_test macro, and fix all relevant libc_test macro
invocations. This change is a no-op.
This concludes cleanup started in
9b13d345303d819bb83de7ebbeb826d704add0bc.
Commit: a024d13f84dbe7b3d1eee555ddc82cdd1af814e0
https://github.com/llvm/llvm-project/commit/a024d13f84dbe7b3d1eee555ddc82cdd1af814e0
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll
Log Message:
-----------
[LoongArch] make ABDS/ABDU legal for lsx/lasx (#134190)
Commit: b07c88563febdb62b82daad0480d7b6131bc54d4
https://github.com/llvm/llvm-project/commit/b07c88563febdb62b82daad0480d7b6131bc54d4
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/include/llvm/Support/InterleavedRange.h
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/InterleavedRangeTest.cpp
Log Message:
-----------
[Support] Add format object for interleaved ranges (#135517)
Add two new format functions for printing ranges: `interleaved` and
`interleaved_array`.
This is meant to improve the ergonomics of printing ranges. Before this
patch, we have to either use `llvm::interleave` or write a for loop by
hand. For example:
Before:
```c++
ArrayRef<Type> types = ...;
ArrayRef<Values> values = ...;
LLVM_DEBUG({
llvm::dbgs() << "Types: ";
llvm::interleave_comma(llvm::dbgs(), types);
llvm::dbgs() << "\n";
llvm::dbgs() << "Values: [";
llvm::interleave_comma(llvm::dbgs(), values);
llvm::dbgs() << "]\n";
}):
```
After:
```c++
ArrayRef<Type> types = ...;
ArrayRef<Values> values = ...;
LLVM_DEBUG(llvm::dbgs() << "Types: " << interleaved(types) << "\n");
LLVM_DEBUG(llvm::dbgs() << "Values: " << interleaved_array(values) << "\n");
```
The separator and the prefix/suffix strings are customizable.
Commit: 04b87e15e40f8857e29ade8321b8b67691545a50
https://github.com/llvm/llvm-project/commit/04b87e15e40f8857e29ade8321b8b67691545a50
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
Log Message:
-----------
[flang][fir] Lower `do concurrent` loop nests to `fir.do_concurrent` (#132904)
Adds support for lowering `do concurrent` nests from PFT to the new
`fir.do_concurrent` MLIR op as well as its special terminator
`fir.do_concurrent.loop` which models the actual loop nest.
To that end, this PR emits the allocations for the iteration variables
within the block of the `fir.do_concurrent` op and creates a region for
the `fir.do_concurrent.loop` op that accepts arguments equal in number
to the number of the input `do concurrent` iteration ranges.
For example, given the following input:
```fortran
do concurrent(i=1:10, j=11:20)
end do
```
the changes in this PR emit the following MLIR:
```mlir
fir.do_concurrent {
%22 = fir.alloca i32 {bindc_name = "i"}
%23:2 = hlfir.declare %22 {uniq_name = "_QFsub1Ei"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%24 = fir.alloca i32 {bindc_name = "j"}
%25:2 = hlfir.declare %24 {uniq_name = "_QFsub1Ej"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
fir.do_concurrent.loop (%arg1, %arg2) = (%18, %20) to (%19, %21) step (%c1, %c1_0) {
%26 = fir.convert %arg1 : (index) -> i32
fir.store %26 to %23#0 : !fir.ref<i32>
%27 = fir.convert %arg2 : (index) -> i32
fir.store %27 to %25#0 : !fir.ref<i32>
}
}
```
Commit: 3264a50fe2b61e79572d1623d0cceb2fe88da533
https://github.com/llvm/llvm-project/commit/3264a50fe2b61e79572d1623d0cceb2fe88da533
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-sm100a.ll
Log Message:
-----------
[clang][NVPTX] Add builtins and intrinsics for conversions of new FP types (#134345)
This change:
- Adds NVVM intrinsics and clang builtins for the cvt instruction
variants of types (FP6) `.e2m3x2`, `.e3m2x2`, and (FP8) `.ue8m0x2`
introduced in PTX 8.6 for `sm_100a`, `sm_101a`, and `sm_120a`.
- Adds clang builtins for cvt instruction variant of type tf32.
Tests are added in `NVPTX/convert-sm100a.ll` and
`clang/test/CodeGen/builtins-nvptx.c` and verified through ptxas 12.8.0.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Commit: 2a024046217a1acae4806328ac77bd88648c2bab
https://github.com/llvm/llvm-project/commit/2a024046217a1acae4806328ac77bd88648c2bab
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-16 (Wed, 16 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
Log Message:
-----------
[clang] fix a crash in error recovery in expressions resolving to templates (#135893)
We were using AssumedTemplate incorrectly for error recovery.
Fixes #135621
Commit: 3de88fe40fd0dc5f52ba0bc7ebbaf16e938d6670
https://github.com/llvm/llvm-project/commit/3de88fe40fd0dc5f52ba0bc7ebbaf16e938d6670
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
A llvm/include/llvm/Frontend/HLSL/CBuffer.h
A llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
A llvm/lib/Target/DirectX/DXILCBufferAccess.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
A llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
Log Message:
-----------
[DirectX] Implement the DXILCBufferAccess pass (#134571)
This introduces a pass that walks accesses to globals in cbuffers and
replaces them with accesses via the cbuffer handle itself. The logic to
interpret the cbuffer metadata is kept in `lib/Frontend/HLSL` so that it
can be reused by other consumers of that metadata.
Fixes #124630.
Commit: 24d48d6a181d4fb89a71cae9d40dc7838184b8ca
https://github.com/llvm/llvm-project/commit/24d48d6a181d4fb89a71cae9d40dc7838184b8ca
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M bolt/runtime/hugify.cpp
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/AST/Type.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CodeGen/builtins-nvptx.c
R clang/test/CodeGenCXX/local-class-instantiation.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
M compiler-rt/lib/asan/asan_report.cpp
A compiler-rt/test/asan/TestCases/asan_lsan_deadlock.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang/include/flang/Runtime/extensions.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/loop_nest_test.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M libc/cmake/modules/LLVMLibCTestRules.cmake
M llvm/include/llvm/Analysis/CFG.h
A llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
A llvm/include/llvm/Support/InterleavedRange.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
A llvm/lib/Target/DirectX/DXILCBufferAccess.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrVIS.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
A llvm/test/CodeGen/AArch64/pr135821.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-cast-load-i1.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
A llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
A llvm/test/CodeGen/Mips/vararg.ll
A llvm/test/CodeGen/NVPTX/convert-sm100a.ll
A llvm/test/CodeGen/RISCV/xqcilia.ll
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
M llvm/test/CodeGen/SPARC/float-constants.ll
A llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/InterleavedRangeTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/inttypes/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/epoll/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/f6364f053b27...24d48d6a181d
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