[all-commits] [llvm/llvm-project] 0439a4: [RISCV] Add new CondCode COND_CV_BEQIMM/COND_CV_BN...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
      https://github.com/llvm/llvm-project/commit/0439a4eca78fa1e3aa45b49ff349c3da4fb02f48
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-04-16 (Wed, 16 Apr 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td

  Log Message:
  -----------
  [RISCV] Add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM for CV immediate branch (#135771)

If there is another branch instruction also with immediate operand, but
it is used to specify which bit to be tested is set or clear. We only
check whether operand2 is immediate or not here. There are no way to
distinguish between them.

So add new CondCode COND_CV_BEQIMM/COND_CV_BNEIMM that we can know what
kinds of immediate branch instruction are matched in Select_* Pseudo.



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