[all-commits] [llvm/llvm-project] fedd79: [mlir][vector] Tighten the semantics of vector.{lo...

[Andrzej Warzyński via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fedd79bdcd8363456ec87796694ae0f37d28a98f
      https://github.com/llvm/llvm-project/commit/fedd79bdcd8363456ec87796694ae0f37d28a98f
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2025-04-11 (Fri, 11 Apr 2025)

  Changed paths:
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
    M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir

  Log Message:
  -----------
  [mlir][vector] Tighten the semantics of vector.{load|store} (#135151)

This change refines the verifier for `vector.load` and `vector.store` to
disallow the use of vectors with higher rank than the source or
destination memref. For example, the following is now rejected:

```mlir
  %0 = vector.load %src[%c0] : memref<?xi8>, vector<16x16xi8>
  vector.store %vec, %dest[%c0] : memref<?xi8>, vector<16x16xi8>
```

This pattern was previously used in SME end-to-end tests and "happened"
to work by implicitly assuming row-major memory layout. However, there
is no guarantee that such an assumption will always hold, and we should
avoid relying on it unless it can be enforced deterministically.

Notably, production ArmSME lowering pipelines do not rely on this
behavior. Instead, the expected usage (illustrated here with scalable
vector syntax) would be:

```mlir
  %0 = vector.load %src[%c0, %c0] : memref<?x?xi8>, vector<[16]x[16]xi8>
```

This PR updates the verifier accordingly and adjusts all affected tests.
These tests are either removed (if no longer relevant) or updated to use
memrefs with appropriately matching rank.



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