[all-commits] [llvm/llvm-project] 80267f: Support z17 processor name and scheduler descripti...

Ulrich Weigand via All-commits all-commits at lists.llvm.org
Thu Apr 10 15:21:19 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 80267f81482486977b3bdecf3855fc6a3096f912
      https://github.com/llvm/llvm-project/commit/80267f81482486977b3bdecf3855fc6a3096f912
  Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
  Date:   2025-04-11 (Fri, 11 Apr 2025)

  Changed paths:
    M clang/lib/Basic/Targets/SystemZ.cpp
    M clang/test/CodeGen/SystemZ/builtins-systemz-bitop.c
    M clang/test/CodeGen/SystemZ/builtins-systemz-vector5-error.c
    M clang/test/CodeGen/SystemZ/builtins-systemz-vector5.c
    M clang/test/CodeGen/SystemZ/builtins-systemz-zvector5-error.c
    M clang/test/CodeGen/SystemZ/builtins-systemz-zvector5.c
    M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
    M clang/test/CodeGen/SystemZ/systemz-abi.c
    M clang/test/Driver/systemz-march.c
    M clang/test/Misc/target-invalid-cpu-note/systemz.c
    M clang/test/Preprocessor/predefined-arch-macros.c
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZInstrVector.td
    M llvm/lib/Target/SystemZ/SystemZProcessors.td
    M llvm/lib/Target/SystemZ/SystemZSchedule.td
    M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
    A llvm/lib/Target/SystemZ/SystemZScheduleZ17.td
    M llvm/lib/TargetParser/Host.cpp
    M llvm/test/Analysis/CostModel/SystemZ/divrem-reg.ll
    M llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
    M llvm/test/Analysis/CostModel/SystemZ/int-arith.ll
    M llvm/test/CodeGen/SystemZ/args-12.ll
    M llvm/test/CodeGen/SystemZ/args-13.ll
    M llvm/test/CodeGen/SystemZ/bitop-intrinsics.ll
    M llvm/test/CodeGen/SystemZ/int-abs-03.ll
    M llvm/test/CodeGen/SystemZ/int-add-19.ll
    M llvm/test/CodeGen/SystemZ/int-cmp-64.ll
    M llvm/test/CodeGen/SystemZ/int-conv-15.ll
    M llvm/test/CodeGen/SystemZ/int-div-08.ll
    M llvm/test/CodeGen/SystemZ/int-max-02.ll
    M llvm/test/CodeGen/SystemZ/int-min-02.ll
    M llvm/test/CodeGen/SystemZ/int-mul-14.ll
    M llvm/test/CodeGen/SystemZ/int-mul-15.ll
    M llvm/test/CodeGen/SystemZ/int-mul-16.ll
    M llvm/test/CodeGen/SystemZ/int-neg-04.ll
    M llvm/test/CodeGen/SystemZ/int-sub-12.ll
    M llvm/test/CodeGen/SystemZ/llxa-01.ll
    M llvm/test/CodeGen/SystemZ/llxa-02.ll
    M llvm/test/CodeGen/SystemZ/llxa-03.ll
    M llvm/test/CodeGen/SystemZ/llxa-04.ll
    M llvm/test/CodeGen/SystemZ/llxa-05.ll
    M llvm/test/CodeGen/SystemZ/lxa-01.ll
    M llvm/test/CodeGen/SystemZ/lxa-02.ll
    M llvm/test/CodeGen/SystemZ/lxa-03.ll
    M llvm/test/CodeGen/SystemZ/lxa-04.ll
    M llvm/test/CodeGen/SystemZ/lxa-05.ll
    M llvm/test/CodeGen/SystemZ/scalar-ctlz-03.ll
    M llvm/test/CodeGen/SystemZ/scalar-ctlz-04.ll
    M llvm/test/CodeGen/SystemZ/scalar-cttz-03.ll
    M llvm/test/CodeGen/SystemZ/scalar-cttz-04.ll
    M llvm/test/CodeGen/SystemZ/vec-cmp-09.ll
    M llvm/test/CodeGen/SystemZ/vec-div-03.ll
    M llvm/test/CodeGen/SystemZ/vec-eval.ll
    M llvm/test/CodeGen/SystemZ/vec-intrinsics-05.ll
    M llvm/test/CodeGen/SystemZ/vec-mul-06.ll
    M llvm/test/CodeGen/SystemZ/vec-mul-08.ll
    M llvm/test/CodeGen/SystemZ/vec-mul-10.ll
    M llvm/test/CodeGen/SystemZ/vec-mul-12.ll
    M llvm/test/CodeGen/SystemZ/vec-mul-14.ll
    M llvm/test/CodeGen/SystemZ/vec-unpack-02.ll
    M llvm/test/CodeGen/SystemZ/vec-unpack-04.ll
    R llvm/test/MC/Disassembler/SystemZ/insns-arch15.txt
    A llvm/test/MC/Disassembler/SystemZ/insns-z17.txt
    R llvm/test/MC/SystemZ/insn-bad-arch15.s
    A llvm/test/MC/SystemZ/insn-bad-z17.s
    R llvm/test/MC/SystemZ/insn-good-arch15.s
    A llvm/test/MC/SystemZ/insn-good-z17.s
    M llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
    M llvm/unittests/TargetParser/Host.cpp

  Log Message:
  -----------
  Support z17 processor name and scheduler description (#135254)

The recently announced IBM z17 processor implements the architecture
already supported as "arch15" in LLVM. This patch adds support for "z17"
as an alternate architecture name for arch15.

This patch also add the scheduler description for the z17 processor,
provided by Jonas Paulsson.



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