[all-commits] [llvm/llvm-project] 464035: Revert "[AMDGPU] SIFixSgprCopies should not proces...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Thu Apr 10 15:13:39 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/slpsynchronize-cost-of-gatherbuildvector-nodes-with-codegen
Home: https://github.com/llvm/llvm-project
Commit: 464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae
https://github.com/llvm/llvm-project/commit/464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.mir
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)"
This reverts commit 0563569978fee1e780a560494c89869074933f58.
Breaks tests, see comments on https://github.com/llvm/llvm-project/pull/134153
Commit: 3954d258a5d20c418718bb2f655665e02e6a7475
https://github.com/llvm/llvm-project/commit/3954d258a5d20c418718bb2f655665e02e6a7475
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/class.derived/class.derived.general/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p6.cpp
M clang/test/SemaCXX/undefined-partial-specialization.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang] Improved canonicalization for template specialization types (#135119)
This changes the TemplateArgument representation to hold a flag
indicating whether a template argument of expression type is supposed to
be canonical or not.
This gets one step closer to solving
https://github.com/llvm/llvm-project/issues/92292
This still doesn't try to unique as-written TSTs. While this would
increase the amount of memory savings and make code dealing with the AST
more well-behaved, profiling template argument lists is still too
expensive for this to be worthwhile, at least for now. Without this
uniquing, this patch stands neutral in terms of performance impact.
This also fixes the context creation of TSTs, so that they don't in some
cases get incorrectly flagged as sugar over their own canonical form.
This is captured in the test expectation change of some AST dumps.
This fixes some places which were unnecessarily canonicalizing these
TSTs.
Commit: 39562de51007e9d6a2ce444475a7b78fba9fafcb
https://github.com/llvm/llvm-project/commit/39562de51007e9d6a2ce444475a7b78fba9fafcb
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
Log Message:
-----------
[ValueTracking] Handle assume(trunc x to i1) in ComputeKnownBits (#118406)
proof: https://alive2.llvm.org/ce/z/zAspzb
Commit: a4e6a771a68660de312aeaaceed0c7d41a680912
https://github.com/llvm/llvm-project/commit/a4e6a771a68660de312aeaaceed0c7d41a680912
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.py
Log Message:
-----------
libcxx: In gdb test detect execute_mi with feature check instead of version check.
The existing version check can lead to test failures on some distribution
packages of gdb where not all components of the version number are
integers, such as Fedora where gdb.VERSION can be something like
"15.2-4.fc41". Fix it by replacing the version check with a feature check.
Reviewers: philnik777
Reviewed By: philnik777
Pull Request: https://github.com/llvm/llvm-project/pull/132291
Commit: f53eb88d2589590960b56a3cc54c5da97cc41842
https://github.com/llvm/llvm-project/commit/f53eb88d2589590960b56a3cc54c5da97cc41842
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
ELF: Remove lock from MTE global relocation handling code.
This lock is unnecessary because we can add the relocations to
shards and let them be sorted later.
Reviewers: smithp35, fmayer, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/135123
Commit: cd56666d7b6fa0b3214c226b2ae8a473537a009e
https://github.com/llvm/llvm-project/commit/cd56666d7b6fa0b3214c226b2ae8a473537a009e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/io-stmt.h
Log Message:
-----------
[flang][runtime] Fix CUDA flang-rt build breakage (#135220)
I used "std::nullopt" instead of the correct "Fortran::common::nullopt"
in a recent patch, and you can get away with that only for CPU builds.
Fix.
Commit: 2927050dd4f9df5ec85c6ecb0ac1450a8695b242
https://github.com/llvm/llvm-project/commit/2927050dd4f9df5ec85c6ecb0ac1450a8695b242
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M bolt/include/bolt/Passes/PAuthGadgetScanner.h
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
Log Message:
-----------
[BOLT] Gadget scanner: refine class names and debug output (NFC) (#135073)
Scanning functions without CFG information as well as the detection of
authentication oracles requires introducing more classes related to
register state analysis. To make the future code easier to understand,
rename several classes beforehand.
To detect authentication oracles, one has to query the properties of
*output* operands of authentication instructions *after* the instruction
is executed - this requires adding another analysis that iterates over
the instructions in reverse order, and a corresponding state class.
As the main difference of the existing `State` class is that it stores
the properties of source register operands of the instructions before
the instruction's execution, rename it to `SrcState` and
`PacRetAnalysis` to `SrcSafetyAnalysis`.
Apply minor adjustments to the debug output along the way.
Commit: 9102ccd2f7025dff6b858b813d089bec152365ba
https://github.com/llvm/llvm-project/commit/9102ccd2f7025dff6b858b813d089bec152365ba
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[CXX Safe Buffer] Update the documentation for unsafe_buffer_usage attribute (#135087)
Update the documentation for the unsafe_buffer_usage attribute to
capture the new behavior introduced by
https://github.com/llvm/llvm-project/pull/125671
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 6493345c5ab96f60ab5ee38272fb6635f2083318
https://github.com/llvm/llvm-project/commit/6493345c5ab96f60ab5ee38272fb6635f2083318
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lldb/tools/driver/CMakeLists.txt
M lldb/tools/driver/Driver.cpp
Log Message:
-----------
[lldb] Handle signals in a separate thread in the driver (#134956)
Handle signals in a separate thread in the driver so that we can stop
worrying about signal safety of functions in libLLDB that may get called
from a signal handler.
Commit: 6ca9a30c26641ac5f836cf794bed01ff61972f37
https://github.com/llvm/llvm-project/commit/6ca9a30c26641ac5f836cf794bed01ff61972f37
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Lower/ConvertCall.cpp
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
Log Message:
-----------
[flang][cuda] Update stream operand type for cuf.kernel_launch op (#135222)
Commit: 337a4d5526618c7c16f20967f7bd10d1cf27c6c4
https://github.com/llvm/llvm-project/commit/337a4d5526618c7c16f20967f7bd10d1cf27c6c4
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[NVPTX] Use sink registers instead of temp registers where possible. (#134957)
PTX 7.1 introduces the concept of a "sink" register, `_`, which is a
register to which writes are ignored.
This patch makes us use sink registers where possible, instead of using
explicit temp registers.
This results in cleaner assembly, and also works around a problem we
encountered in some private workloads.
(Unfortunately the tablegen is not particularly clean. But then again,
it's tablegen...)
Commit: 755016a3a82eb1850d88b47d636088fb76e5f091
https://github.com/llvm/llvm-project/commit/755016a3a82eb1850d88b47d636088fb76e5f091
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/terminator.h
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/terminator.cpp
M flang/include/flang/Common/enum-class.h
M flang/include/flang/Runtime/complex.h
Log Message:
-----------
[flang-rt] Fixed warnings and miscompilations in CUDA build. (#134470)
* DescribeIEEESignaledExceptions() is unused on the device - warning.
* StopStatementText() could return while marked noreturn - warning.
* Including cuda/std/complex only in the device compilation
may cause nvcc to try to register variables in `cuda` namespace,
while they are not defined in the host compilation - error.
I decided to include cuda/std/complex always under RT_USE_LIBCUDACXX.
Commit: 589e1c73d0fa2692cf997a7a9c2286996ad2fec7
https://github.com/llvm/llvm-project/commit/589e1c73d0fa2692cf997a7a9c2286996ad2fec7
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CodeGenHLSL/BasicFeatures/frem_modulo.hlsl
A clang/test/SemaHLSL/Operators/frem_modulo-errors.hlsl
Log Message:
-----------
[HLSL] Add support for modulo of floating point scalar and vectors (#135125)
fixes #135122
SemaExpr.cpp - Make all doubles fail. Add sema support for float scalars
and vectors when language mode is HLSL.
CGExprScalar.cpp - Allow emit frem when language mode is HLSL.
Commit: 8bea91f677be4a05b1256a8052ab84dcd7ccb050
https://github.com/llvm/llvm-project/commit/8bea91f677be4a05b1256a8052ab84dcd7ccb050
Author: Leonard Grey <lgrey at chromium.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
A lld/test/MachO/archive-no-index.ll
A lld/test/MachO/archive-no-index.s
R lld/test/MachO/invalid/archive-no-index.s
Log Message:
-----------
[lld-macho] Support archives without index (#132942)
This is a ~port of https://reviews.llvm.org/D117284. Like in that
change, archives without indices are treated as a collection of lazy
object files (as in `--start-lib/--end-lib`)
Porting the ELF follow-up to convert *all* archives to the lazy object
code path (https://reviews.llvm.org/D119074) is a natural next step, but
we would need to ensure the assertions about memory use hold for Mach-O.
NB: without an index, we can't do the part of the `-ObjC` scan where we
check for Objective-C symbols directly. We *can* still check for
`__obcj` sections so I wonder how much of a problem this actually is,
since I'm not sure how the "symbols but no sections" case can appear in
the wild.
Commit: c893f1d18da6547027648f44592f61c08570d80f
https://github.com/llvm/llvm-project/commit/c893f1d18da6547027648f44592f61c08570d80f
Author: Tim Clephas <tim.clephas at nobleo.nl>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/lib/Format/Format.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/clang-format-diff.py
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
Treat ipynb as json (#135137)
Fixes #110727
Commit: 22c3dac454954a83efbfe147dd8d3dff6df39143
https://github.com/llvm/llvm-project/commit/22c3dac454954a83efbfe147dd8d3dff6df39143
Author: Pranav Kant <prka at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Fix for #134956 (#135233)
Commit: ccdbd3b78d19ba53d1c32fd506c72529cf6a7c17
https://github.com/llvm/llvm-project/commit/ccdbd3b78d19ba53d1c32fd506c72529cf6a7c17
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
Log Message:
-----------
[mlir][tosa] Rename int_div to intdiv (#135080)
This patch renames Tosa Operator int_div to intdiv to align with 1.0
spec
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: ca5346313782f53658ed383e802f6e45aaeacd42
https://github.com/llvm/llvm-project/commit/ca5346313782f53658ed383e802f6e45aaeacd42
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-launch.fir
Log Message:
-----------
[flang][cuda] Propagate stream information to gpu.launch_func op (#135227)
Use the information from `cuf.kernel_launch` to `gpu.launch_func`
Commit: 9c31155ead6e68450b8c2de38f5bec8f5c5db810
https://github.com/llvm/llvm-project/commit/9c31155ead6e68450b8c2de38f5bec8f5c5db810
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterBankEmitter.cpp
Log Message:
-----------
TableGen: Optimize super-register class computation (#134865)
Inferring super-register classes naively requires checking every
register class against every other register class and sub-register
index.
Each of those checks is itself a non-trivial operation on register sets.
Culling as many (RC, RC, SubIdx) triples as possible is important for
the running time of TableGen for architectures with complex sub-register
relations.
Use transitivity to cull many (RC, RC, SubIdx) triples. This
unfortunately requires us to complete the transitive closure of
super-register classes explicitly, but it still cuts down the running
time on AMDGPU substantially -- in some upcoming work in the
backend by more than half (in very rough measurements).
This changes the names of some of the inferred register classes, since
the order in which they are inferred changes. The names of the inferred
register classes become shorter, which reduces the size of the generated
files.
Replacing some uses of SmallPtrSet by DenseSet shaves off a few more
percent; there are hundreds of register classes in AMDGPU.
Tweaking the topological signature check to skip reigsters without
super-registers further helps skip register classes that have "pseudo"
registers in them whose sub- and super-register structure is trivial.
Commit: d07a2164e7c7812b96b0f04a39af5483660bac71
https://github.com/llvm/llvm-project/commit/d07a2164e7c7812b96b0f04a39af5483660bac71
Author: Drew Lewis <cannada at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M libc/src/__support/FPUtil/aarch64/sqrt.h
M libc/src/__support/FPUtil/arm/sqrt.h
M libc/src/__support/FPUtil/riscv/sqrt.h
M libc/src/__support/FPUtil/x86_64/sqrt.h
Log Message:
-----------
Add generic sqrt root headers to libc sqrt specializations (#135237)
This header is needed to provide the declaration for the sqrt template.
You can build without these in the CMake build, but not having this
include in the architecture specific headers makes them not self
contained.
Commit: d7cb24e10d7c5468b91fa7297a1f4c97a663618a
https://github.com/llvm/llvm-project/commit/d7cb24e10d7c5468b91fa7297a1f4c97a663618a
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
Log Message:
-----------
[MLIR][NVVM] Run clang-tidy (#135006)
Commit: 72436b37bf4203ee43395c65cc179dc573f79251
https://github.com/llvm/llvm-project/commit/72436b37bf4203ee43395c65cc179dc573f79251
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/known-phi-br.ll
Log Message:
-----------
[InstCombine] add more test for #134712 (NFC)
Commit: dcb90780817461ba30ced78338b2270fd3307873
https://github.com/llvm/llvm-project/commit/dcb90780817461ba30ced78338b2270fd3307873
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Index/single-file-parse-include-macro.c
Log Message:
-----------
[clang][index] Skip over `#include UNDEF_IDENT` in single-file-parse mode (#135218)
In the 'single-file-parse' mode, seeing `#include UNDEFINED_IDENTIFIER`
should not be treated as an error. The identifier might be defined in a
header that we decided to skip, resulting in a nonsensical diagnostic
from the user point of view.
Commit: 74c2b41feb72698ea79b6bdc2dc566d0a25a68b0
https://github.com/llvm/llvm-project/commit/74c2b41feb72698ea79b6bdc2dc566d0a25a68b0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
Log Message:
-----------
[OpenACC][CIR] Implement 'device_type' clause lowering for 'init'/'sh… (#135102)
…utdown'
This patch emits the lowering for 'device_type' on an 'init' or
'shutdown'. This one is fairly unique, as these directives have it as an
attribute, rather than as a component of the individual operands, like
the rest of the constructs.
So this patch implements the lowering as an attribute.
In order to do tis, a few refactorings had to happen: First, the
'emitOpenACCOp' functions needed to pick up th edirective kind/location
so that the NYI diagnostic could be reasonable.
Second, and most impactful, the `applyAttributes` function ends up
needing to encode some of the appertainment rules, thanks to the way the
OpenACC-MLIR operands get their attributes attached. Since they each use
a special function (rather than something that can be legalized at
runtime), the forms of 'setDefaultAttr' is only valid for some ops. SO
this patch uses some `if constexpr` and a small type-trait to help
legalize these.
Commit: a1bca4ba3714bffac5dc27d286b5bd4fcdcc40ab
https://github.com/llvm/llvm-project/commit/a1bca4ba3714bffac5dc27d286b5bd4fcdcc40ab
Author: Pranav Kant <prka at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/test/Driver/openacc-no-cir.c
Log Message:
-----------
[clang] Make tests write to /dev/null if output is not needed (#135242)
We execute tests in read only environment which leads to test failure
when tests try to write to the current directory. Either they should
write to a temporary directory or not write if output is not needed.
Fallback from #134717
Commit: 53ae2bdceb124fa87ff4d2bcdc842e388e817fde
https://github.com/llvm/llvm-project/commit/53ae2bdceb124fa87ff4d2bcdc842e388e817fde
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
Log Message:
-----------
[mlir][NVVM] Remove commented out code (#135144)
This addresses a comment on #135051.
Commit: 9188288581f73a10bff9ee1500146dff7901e94c
https://github.com/llvm/llvm-project/commit/9188288581f73a10bff9ee1500146dff7901e94c
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/test/Target/LLVMIR/Import/data-layout.ll
Log Message:
-----------
[mlir][DataLayout] Keep consistent input/output order (#135185)
- Use 'MapVector' instead of 'DenseMap' to keep a consistent order when
importing/printing entries to prevent run-by-run differences.
Commit: 966667f5419d6cdd8d02fdf9ad2e39c0a2f94fe1
https://github.com/llvm/llvm-project/commit/966667f5419d6cdd8d02fdf9ad2e39c0a2f94fe1
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
[NFC][HLSL] Refactor DXILResourceTest for upcoming PR (#134952)
Local changes were getting pretty large and complex so this is an NFC
refactor PR to simplify the upcoming changes
Commit: e762baffd9f115106f861a236c56093c85dfbc93
https://github.com/llvm/llvm-project/commit/e762baffd9f115106f861a236c56093c85dfbc93
Author: David Green <david.green at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Move SLId/SRId patterns into instruction definitions. NFC
The v1i64 patterns were next to the vector variants, not the SIMDScalar
instructions tht define them. In moving them closer they cal also be
incorporated into the definitions themselves. SIMDScalarRShiftDTied is
altered to remove the redundant i64 variants.
Commit: 61d04f1aac96f671a3975e04dac02d270b86ac4d
https://github.com/llvm/llvm-project/commit/61d04f1aac96f671a3975e04dac02d270b86ac4d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Extract preliminary checks from buildTree_rec, NFC
Moved check from buildTree_rec function to a separate
isLegalToVectorizeScalars function.
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/134132
Commit: 12e6c978f8e5bbf414f9b3817b953f3a264bdc45
https://github.com/llvm/llvm-project/commit/12e6c978f8e5bbf414f9b3817b953f3a264bdc45
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M bolt/include/bolt/Passes/PAuthGadgetScanner.h
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
M clang-tools-extra/clangd/AST.cpp
M clang/docs/ClangFormat.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CXX/class.derived/class.derived.general/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p6.cpp
A clang/test/CodeGenHLSL/BasicFeatures/frem_modulo.hlsl
M clang/test/Driver/openacc-no-cir.c
A clang/test/Index/single-file-parse-include-macro.c
M clang/test/SemaCXX/undefined-partial-specialization.cpp
A clang/test/SemaHLSL/Operators/frem_modulo-errors.hlsl
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/clang-format-diff.py
M clang/tools/clang-format/git-clang-format
M clang/unittests/AST/TypePrinterTest.cpp
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/terminator.h
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/terminator.cpp
M flang/include/flang/Common/enum-class.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Runtime/complex.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M libc/src/__support/FPUtil/aarch64/sqrt.h
M libc/src/__support/FPUtil/arm/sqrt.h
M libc/src/__support/FPUtil/riscv/sqrt.h
M libc/src/__support/FPUtil/x86_64/sqrt.h
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.py
M lld/ELF/Relocations.cpp
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
A lld/test/MachO/archive-no-index.ll
A lld/test/MachO/archive-no-index.s
R lld/test/MachO/invalid/archive-no-index.s
M lldb/tools/driver/CMakeLists.txt
M lldb/tools/driver/Driver.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.mir
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/known-phi-br.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/unittests/Analysis/DXILResourceTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterBankEmitter.cpp
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Target/LLVMIR/Import/data-layout.ll
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
Fix formatting
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/a776618e6209...12e6c978f8e5
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