[all-commits] [llvm/llvm-project] 0283bb: [Clang][CodeGen][UBSan] Add more precise attribute...
Peter Collingbourne via All-commits
all-commits at lists.llvm.org
Thu Apr 10 10:38:19 PDT 2025
Branch: refs/heads/users/pcc/spr/libcxx-in-gdb-test-detect-execute_mi-with-feature-check-instead-of-version-check
Home: https://github.com/llvm/llvm-project
Commit: 0283bb3afcc5dc521f6b2e7d541a830a9546ed80
https://github.com/llvm/llvm-project/commit/0283bb3afcc5dc521f6b2e7d541a830a9546ed80
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
A clang/test/CodeGen/ubsan-attr.cpp
Log Message:
-----------
[Clang][CodeGen][UBSan] Add more precise attributes to recoverable ubsan handlers (#130990)
This patch adds `memory(argmem: read, inaccessiblemem: readwrite)
mustprogress` to **recoverable** ubsan handlers in order to unblock some
memory/loop optimizations. It provides an average of 3% performance
improvement on llvm-test-suite (except for 49 test failures due to ubsan
diagnostics).
Closes https://github.com/llvm/llvm-project/issues/130093.
Commit: 7f7f3d91a2d5c354a5e7b7c6f7d8d71ec6ad1f4d
https://github.com/llvm/llvm-project/commit/7f7f3d91a2d5c354a5e7b7c6f7d8d71ec6ad1f4d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-04-09 (Wed, 09 Apr 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
Log Message:
-----------
Revert "Replace bool operator== for VersionType in sanitizer_mac.h" (#135127)
Reverts llvm/llvm-project#135068 because it breaks building compiler-rt
on Darwin.
https://green.lab.llvm.org/job/clang-stage1-RA/
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/as-lldb-cmake/
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake/
Commit: 2828328611089481d6ebd2e148791d9729117a8a
https://github.com/llvm/llvm-project/commit/2828328611089481d6ebd2e148791d9729117a8a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/tools/llvm-reduce/llvm-reduce.cpp
Log Message:
-----------
llvm-reduce: Link to command guide in help like bugpoint does (#134810)
Commit: 98ea512f720ec954a6f096dbb39534f06affa196
https://github.com/llvm/llvm-project/commit/98ea512f720ec954a6f096dbb39534f06affa196
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/test/AST/ByteCode/libcxx/minmax.cpp
Log Message:
-----------
[clang][bytecode] Clear inactive union fields when copying (#134982)
When copying unions, we need to only copy the active field of the source
union, which we were already doing. However, we also need to zero out
the (now) inactive fields, so we don't end up with dangling pointers in
those inactive fields.
Commit: 5587932e20ff90ba8a28f3c9089e8b12e42b09b5
https://github.com/llvm/llvm-project/commit/5587932e20ff90ba8a28f3c9089e8b12e42b09b5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/tools/llvm-reduce/remove-bb-switch-default.ll
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
Log Message:
-----------
llvm-reduce: Use simpleSimplifyCFG in block reduction (#135028)
Commit: 02f923f8e4329995f2f0c512fa53f5e37e631933
https://github.com/llvm/llvm-project/commit/02f923f8e4329995f2f0c512fa53f5e37e631933
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
A clang/test/AST/ByteCode/pointer-to-fnptr.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Classify function pointers as PT_Ptr (#135026)
The Pointer class already has the capability to be a function pointer,
but we still classifed function pointers as PT_FnPtr/FunctionPointer.
This means when converting from a Pointer to a FunctionPointer, we lost
the information of what the original Pointer pointed to.
Commit: 27ca4837eec1734d23cc628fcaddf03b94afc845
https://github.com/llvm/llvm-project/commit/27ca4837eec1734d23cc628fcaddf03b94afc845
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
[EquivalenceClasses] Introduce erase member function (#134660)
Introduce 'erase(const ElemTy &V)' member function to allow the deletion
of a certain value from EquivClasses. This is essential for certain
scenarios that require modifying the contents of EquivClasses.
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: 843fb7be380c0907b3b222cd5e429a4d38c97b54
https://github.com/llvm/llvm-project/commit/843fb7be380c0907b3b222cd5e429a4d38c97b54
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/tools/llvm-reduce/operands-to-args.ll
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
Log Message:
-----------
llvm-reduce: Fix overly conservative operands-to-args user restriction (#133854)
I assume this was a leftover from typed pointers. It's easier to replace
the non-callee uses, they are just replacable pointer values.
Commit: 2257f5143148210fa968205730543f49427d0cc6
https://github.com/llvm/llvm-project/commit/2257f5143148210fa968205730543f49427d0cc6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-counted-by.c
R clang/test/CodeGen/ubsan-attr.cpp
Log Message:
-----------
Revert "[Clang][CodeGen][UBSan] Add more precise attributes to recoverable ubsan handlers" (#135130)
Reverts llvm/llvm-project#130990
Breaks buildbot https://lab.llvm.org/buildbot/#/builders/186/builds/8072
Commit: f819f46284f2a79790038e1f6649172789734ae8
https://github.com/llvm/llvm-project/commit/f819f46284f2a79790038e1f6649172789734ae8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M llvm/include/llvm/IR/Attributes.h
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/access-attributes-prop.ll
Log Message:
-----------
Reapply "Inline: Propagate callsite nofpclass attribute" (#135018)
This reverts commit 3f38cd07d820248fd2043efb1341fabaac2d84a6.
Fix case where inner callsite has nofpclass but callsite does not.
Commit: 3fd0d22d74027c00bd2365ea1691dc530bb9709a
https://github.com/llvm/llvm-project/commit/3fd0d22d74027c00bd2365ea1691dc530bb9709a
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-09 (Wed, 09 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/arm64-diags.s
M llvm/test/MC/MachO/AArch64/darwin-ARM64-reloc.s
Log Message:
-----------
AArch64AsmParser: Restore Lsym at page-offset support
https://github.com/llvm/llvm-project/pull/134202 removed support for
`sym at page-offset` in instruction operands. This change is generally
reasonable since subtracting an offset from a symbol typically doesn’t
make sense for Mach-O due to its .subsections_via_symbols mechanism, which treats
them as separate atoms.
However, BoringSSL relies on a temporary symbol with a negative offset,
which can be meaningful when the symbol and the referenced location are
within the same atom.
```
../../third_party/boringssl/src/gen/bcm/p256-armv8-asm-apple.S:1160:25: error: unexpected token in argument list
adrp x23,Lone_mont at PAGE-64
```
It's worth noting that expressions involving @ can be complex and
brittle in MCParser, and much of the Mach-O @ offsets remains
under-tested.
* Allow default argument for parsePrimaryExpr. The argument, used by the niche llvm-ml,
should not require other targets to adapt.
Commit: 807cc3791fabd47bd24d57a8e4ab7df9117b3ede
https://github.com/llvm/llvm-project/commit/807cc3791fabd47bd24d57a8e4ab7df9117b3ede
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
Log Message:
-----------
[DAGCombiner] Fold subtraction if above threshold to `umin` (#134235)
Folds patterns such as:
unsigned foo(unsigned x, unsigned y) {
return x >= y ? x - y : x;
}
Before, on RISC-V:
sltu a2, a0, a1
addi a2, a2, -1
and a1, a1, a2
subw a0, a0, a1
Or, with Zicond:
sltu a2, a0, a1
czero.nez a1, a1, a2
subw a0, a0, a1
After, with Zbb:
subw a1, a0, a1
minu a0, a0, a1
Only applies to unsigned comparisons.
If `x >= y` then `x - y` is less than or equal `x`.
Otherwise, `x - y` wraps and is greater than `x`.
Commit: 7818e5ab6725c1590ff5c4a483a76f08b8697cb7
https://github.com/llvm/llvm-project/commit/7818e5ab6725c1590ff5c4a483a76f08b8697cb7
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
Log Message:
-----------
[LoongArch] lower vector shuffle to shift if possible (#132866)
Commit: b122956390a6877536927c2b073a0b99f8b9704f
https://github.com/llvm/llvm-project/commit/b122956390a6877536927c2b073a0b99f8b9704f
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
A llvm/test/CodeGen/AArch64/aarch64-swp-ws-live-intervals-1.mir
Log Message:
-----------
[llvm][CodeGen] update live intervals for ModuloScheduleExpanderMVE (#132677)
ModuloScheduleExpanderMVE and ModuloScheduleExpander are used sequentially in
certain use cases. It is necessary to update live intervals for ModuloScheduleExpanderMVE;
otherwise, crashes may occur.
Commit: adfc577895811b5df3935be3b26aec52929afebd
https://github.com/llvm/llvm-project/commit/adfc577895811b5df3935be3b26aec52929afebd
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-memcpy-align-metadata.mlir
Log Message:
-----------
[OpenMP][CodeExtractor]Add align metadata to load instructions (#131131)
Moving code to another function can lead to missed optimization
opportunities, because function passes operate on smaller chunks of
code, and they cannot figure out all details.
One example of missed optimization opportunities after code extraction
is information about pointer alignment. The instruction combine pass
adds information about pointer alignment to LLVM intrinsic memcpy calls
if it can deduce it from the code or if align metadata is added. If this
information is not present, then further optimization passes can
generate inefficient code.
If we add align metadata to extracted pointers, then the instruction
combine pass can add the align attribute to the LLVM intrinsic memcpy
call and unblock further optimization.
Scope of changes:
1. Analyze MLIR map operations. Add information about the alignment of
objects that are passed by reference to OpenMP GPU kernels.
2. Propagate alignment information to the outlined by `CodeExtractor`
helper functions.
Commit: 923da2b843c7ddf9c7d39ba9629ad7945a96ea5c
https://github.com/llvm/llvm-project/commit/923da2b843c7ddf9c7d39ba9629ad7945a96ea5c
Author: Wenju He <wenju.he at intel.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Add 'cl' to enable OpenCL kernel file formatting (#134529)
There are many .cl files in llvm repo. It would be great that
clang-format can support it.
Commit: 85742f764270c701d2245615c590702c5110b030
https://github.com/llvm/llvm-project/commit/85742f764270c701d2245615c590702c5110b030
Author: Matthias Springer <me at m-sp.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/docs/Dialects/LLVM.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
Log Message:
-----------
[mlir][LLVM] Delete `getFixedVectorType` and `getScalableVectorType` (#135051)
The LLVM dialect no longer has its own vector types. It uses
`mlir::VectorType` everywhere. Remove
`LLVM::getFixedVectorType/getScalableVectorType` and use
`VectorType::get` instead. This commit addresses a
[comment](https://github.com/llvm/llvm-project/pull/133286#discussion_r2022192500)
on the PR that deleted the LLVM vector types.
Commit: f030f6f3c5ad44dca5c9f66c24e168a716fa1ece
https://github.com/llvm/llvm-project/commit/f030f6f3c5ad44dca5c9f66c24e168a716fa1ece
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb][FormatEntity][NFCI] Refactor FunctionNameWithArgs into helper functions and use LLVM style (#135031)
I've always found this hard to read. Some upcoming changes make similar
computations, so I thought it's a good time to factor out this logic
into re-usable helpers and clean it up using LLVM's preferred
early-return style.
Commit: 344a491dad1ec117ea0f97eb09c56fe5edb51fe6
https://github.com/llvm/llvm-project/commit/344a491dad1ec117ea0f97eb09c56fe5edb51fe6
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp64_to_bf16.ll
Log Message:
-----------
[CodeGen] Simplify expandRoundInexactToOdd (#134988)
FP_ROUND and FP_EXTEND the input value before FABSing it. This avoids
some bit twiddling to copy the sign bit from the input to the result. It
does introduce one extra FABS, but that is folded into another
instruction for free on AMDGPU, which is the only target currently
affected by this change.
Commit: a625bc60e2987502d2dd1b3372fa1b9cf3b2f2cf
https://github.com/llvm/llvm-project/commit/a625bc60e2987502d2dd1b3372fa1b9cf3b2f2cf
Author: Nathan Gauër <brioche at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/private.hlsl
M clang/test/CodeGenHLSL/GlobalDestructors.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
A clang/test/CodeGenHLSL/out-of-line-static.hlsl
A clang/test/CodeGenHLSL/static-variable.hlsl
M clang/test/SemaTemplate/address_space-dependent.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[HLSL][SPIR-V] Add hlsl_private address space for SPIR-V (#133464)
This is an alternative to
https://github.com/llvm/llvm-project/pull/122103
In SPIR-V, private global variables have the Private storage class. This
PR adds a new address space which allows frontend to emit variable with
this storage class when targeting this backend.
This is covered in this proposal: llvm/wg-hlsl at 4c9e11a
This PR will cause addrspacecast to show up in several cases, like class
member functions or assignment. Those will have to be handled in the
backend later on, particularly to fixup pointer storage classes in some
functions.
Before this change, global variable were emitted with the 'Function'
storage class, which was wrong.
Commit: 135a7874dc2af6e2eb439db837eda273bdc54a63
https://github.com/llvm/llvm-project/commit/135a7874dc2af6e2eb439db837eda273bdc54a63
Author: Romaric Jodin <rjodin at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M libclc/clspv/lib/math/fma.cl
Log Message:
-----------
libclc: clspv: fma: remove fp16 implementation (#135002)
clspv is already handling generation of fp16. This implementation is
preventing clspv from making the best choice to use an emulation on top
of fp32-fma, or the native fp16-fma, depending on the command-line
arguments.
Commit: 7d32d72f10445657f598cbdf1bb5f3040373daf5
https://github.com/llvm/llvm-project/commit/7d32d72f10445657f598cbdf1bb5f3040373daf5
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M libclc/clspv/lib/math/fma.cl
Log Message:
-----------
[libclc][NFC] Remove blank line at end of file
Commit: 5543d9ded7330b21c1d52cdeafadc4b95a495ccc
https://github.com/llvm/llvm-project/commit/5543d9ded7330b21c1d52cdeafadc4b95a495ccc
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
[RegAlloc][NFC] Use `std::move` to avoid copy (#134533)
Commit: 785e7f06ddb1ba36aa679d23436726dcf61f8afb
https://github.com/llvm/llvm-project/commit/785e7f06ddb1ba36aa679d23436726dcf61f8afb
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/cmake/modules/LLVMConfig.cmake.in
Log Message:
-----------
Remember LLVM_ENABLE_LIBCXX setting in installed configuration (#134990)
The buidbot
[flang-aarch64-libcxx](https://lab.llvm.org/buildbot/#/builders/89) is
currently failing with an ABI issue. The suspected reason is that
LLVMSupport.a is built using libc++, but the unittests are using the
default C++ standard library, libstdc++ in this case. This predefined
`llvm_gtest` target uses the LLVMSupport from `find_package(LLVM)`,
which finds the libc++-built LLVMSupport.
To fix, store the `LLVM_ENABLE_LIBCXX` setting in the LLVMConfig.cmake
such that everything that links to LLVM libraries use the same standard
library. In this case discussed in
https://github.com/llvm/llvm-zorg/pull/387 it was the flang-rt
unittests, but other runtimes with GTest unittests should have the same
issue (e.g. offload), and any external project that uses
`find_package(LLVM)`.
Commit: d9cfd905248a7ef74826576978348600a372af5f
https://github.com/llvm/llvm-project/commit/d9cfd905248a7ef74826576978348600a372af5f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
Log Message:
-----------
[ci] Improve wording in CI test reports
We weren't saying where to click, make it clear you click on a
test name.
Commit: d34437e9e17be59a5b9da1937fec21886779885b
https://github.com/llvm/llvm-project/commit/d34437e9e17be59a5b9da1937fec21886779885b
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
Log Message:
-----------
[RISCV] Recognize a zipeven/zipodd requiring larger SEW (#134923)
This is a follow up to f8ee58a3c, and improves code generation for the
XRivosVizip extension.
If we have a slide pair which could be a zipeven or zipodd if the
shuffle was widened, widen the shuffle and then mask the zipeven or
zipodd.
This is basically working around an order of matching issue; we match
the slide pair variants before trying widening. I considered whether we
should just widen slide pairs without any consideration of the zip
idioms, but the resulting codegen changes look mostly like churn, and
have no clear evidence of profitability.
Commit: cdb9c6190ff066756ce4eb898eea747c5076ad33
https://github.com/llvm/llvm-project/commit/cdb9c6190ff066756ce4eb898eea747c5076ad33
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/unittests/Symbol/UnwindPlanTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
Log Message:
-----------
[lldb] Support negative function offsets in UnwindPlans (#134662)
These are needed for functions whose entry point is not their lowest
address.
Commit: e3350a62635777ee983d86b6f6c9be4b07f48fc8
https://github.com/llvm/llvm-project/commit/e3350a62635777ee983d86b6f6c9be4b07f48fc8
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
Log Message:
-----------
[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#130133)
Reland #129895 with a fix to avoid trying to combine bpermute of
bitcast.
Commit: 2fe123a1195e16e065f913ba2bba8582370a8707
https://github.com/llvm/llvm-project/commit/2fe123a1195e16e065f913ba2bba8582370a8707
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/cmake/modules/LLVMConfig.cmake.in
Log Message:
-----------
Revert "Remember LLVM_ENABLE_LIBCXX setting in installed configuration (#134990)"
This reverts commit 785e7f06ddb1ba36aa679d23436726dcf61f8afb.
It did not solve the problem with flang-aarch64-libcxx and caused
another failure with openmp-offload-amdgpu-runtime-2.
Commit: 716b02d8c575afde7af1af13df145019659abca2
https://github.com/llvm/llvm-project/commit/716b02d8c575afde7af1af13df145019659abca2
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
A llvm/test/Transforms/MemCpyOpt/memcpy-tbaa.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
Log Message:
-----------
[LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537)
Optimization of alloca instructions may lead to invalid alias tags.
Incorrect alias tags can result in incorrect optimization outcomes for
Fortran source code compiled by Flang with flags: `-O3 -mmlir
-local-alloc-tbaa -flto`.
This commit removes alias tags when memcpy optimization replaces two
arrays with one array, thus ensuring correct compilation of Fortran
source code using flags: `-O3 -mmlir -local-alloc-tbaa -flto`.
This commit is also a proposal to fix the reported issue:
https://github.com/llvm/llvm-project/issues/133984
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 20507a9e95a08069863e9910a688a38370d58952
https://github.com/llvm/llvm-project/commit/20507a9e95a08069863e9910a688a38370d58952
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/selectiondag-order.ll
M llvm/test/CodeGen/X86/selectiondag-order.ll
A llvm/test/Transforms/CodeGenPrepare/X86/cast-debuginfo-salvage.ll
Log Message:
-----------
[Verifier][CGP] Allow integer argument to dbg_declare (#134803)
Relaxes the newly added verifier rule to also allow an integer argument
to dbg_declare, which is interpreted as a pointer. Adjust CGP to deal with
it gracefully.
Fixes https://github.com/llvm/llvm-project/issues/134523.
Alternative to https://github.com/llvm/llvm-project/pull/134601.
Commit: 64b5e8f2b732defc35831d5765175647d763264d
https://github.com/llvm/llvm-project/commit/64b5e8f2b732defc35831d5765175647d763264d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
Log Message:
-----------
[X86] masked_gather_scatter.ll - clean up check prefixes
Share X86/X64 common prefixes as much as possible to reduce duplication
Commit: d02a704ec952f01ab258e8c4cbb3c01c8f768e15
https://github.com/llvm/llvm-project/commit/d02a704ec952f01ab258e8c4cbb3c01c8f768e15
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/revec-getExtractWithExtendCost.ll
Log Message:
-----------
[SLP][REVEC] Make getExtractWithExtendCost support FixedVectorType as Dst. (#134822)
Commit: c7745b0babb0151d9fe9cdc4fc180b0b53821e98
https://github.com/llvm/llvm-project/commit/c7745b0babb0151d9fe9cdc4fc180b0b53821e98
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-st1.ll
Log Message:
-----------
[AArch64][test] Regenerate arm64-st1.ll using update_llc_test_checks.py (NFC) (#134919)
This is a fairly large test file which can be annoying to manually
update. Using --filter-out gets pretty close to the original checks.
Commit: dcb2ae126de1ce64a9164a3e63f328ae1859ea46
https://github.com/llvm/llvm-project/commit/dcb2ae126de1ce64a9164a3e63f328ae1859ea46
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/support/BUILD.gn
Log Message:
-----------
[gn] port e10f67a8270c774
Commit: 6d98d45c9c1867d4006f93e04bc1380b36e34f18
https://github.com/llvm/llvm-project/commit/6d98d45c9c1867d4006f93e04bc1380b36e34f18
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
Log Message:
-----------
reland [clang-doc][NFC] refactor out file helpers (#135164)
Split from https://github.com/llvm/llvm-project/pull/133161
refactor the code to extract file helpers used in HTML generators for
use in other generators for clang-doc
This patch fixes the error where compiling with
-DLLVM_LINK_LLVM_DYLIB=ON broke the buildbot
Commit: 71f629fc2a93e41577c09bdd782b2ba524ed5fea
https://github.com/llvm/llvm-project/commit/71f629fc2a93e41577c09bdd782b2ba524ed5fea
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
Log Message:
-----------
Initialize member variable; NFC (#135167)
This was found via a Coverity static analysis pass. There's no
indication this was being used incorrectly in practice, but there are
public interfaces which require `BR` to be non-null and valid, and `BR`
was not being initialized by the constructor.
This adds an in-class initializer for `BR` and some asserts, to be safe.
Commit: 5c8ba28c751bf0e7cb5c3ac9d223acba4cefc739
https://github.com/llvm/llvm-project/commit/5c8ba28c751bf0e7cb5c3ac9d223acba4cefc739
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaInit.cpp
M clang/test/C/C11/n1285.c
A clang/test/C/C11/n1285_1.c
M clang/test/CodeGen/xcore-abi.c
M clang/test/CodeGenObjC/property-array-type.m
M clang/www/c_status.html
Log Message:
-----------
[C11] Implement WG14 N1285 (temporary lifetimes) (#133472)
This feature largely models the same behavior as in C++11. It is
technically a breaking change between C99 and C11, so the paper is not
being backported to older language modes.
One difference between C++ and C is that things which are rvalues in C
are often lvalues in C++ (such as the result of a ternary operator or a
comma operator).
Fixes #96486
Commit: 6defc8ee66caef0191015a6943f1694ee7410459
https://github.com/llvm/llvm-project/commit/6defc8ee66caef0191015a6943f1694ee7410459
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
Log Message:
-----------
Initialize member variable; NFC
This was found via a Coverity static analysis pass. There's no
indication this was being used incorrectly in practice, but there are
public interfaces which require `BR` to be non-null and valid, and `BR`
was not being initialized by the constructor.
This adds an in-class initializer for `BR` and some asserts, to be safe.
Commit: 9ff27d5fc2d57a676a0d0a47684409c640f38c7f
https://github.com/llvm/llvm-project/commit/9ff27d5fc2d57a676a0d0a47684409c640f38c7f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/CodeGen/X86/avgfloors-scalar.ll
M llvm/test/CodeGen/X86/avgflooru-scalar.ll
Log Message:
-----------
[X86] add additional avgfloor 'add(shift(x,1),shift(y,1),and(x,y,1))' patterns
Add mixture of pattern combos to match against the SDPatternMatch::m_Reassociatable* matchers
Commit: 5a1b4ec6f4b773f191e98183ae4628785729daa1
https://github.com/llvm/llvm-project/commit/5a1b4ec6f4b773f191e98183ae4628785729daa1
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/test/C/C11/n1285_1.c
Log Message:
-----------
Fix broken bots
https://lab.llvm.org/buildbot/#/builders/190/builds/18038
This adds a triple and regenerates the test results.
Commit: ed858220276dd11f6c2d7a5d3e357c211f9c6190
https://github.com/llvm/llvm-project/commit/ed858220276dd11f6c2d7a5d3e357c211f9c6190
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/unittests/Format/FormatTestJS.cpp
M clang/unittests/Format/FormatTestJava.cpp
Log Message:
-----------
[clang-format] Handle C++ keywords in other languages better (#132941)
There is some code to make sure that C++ keywords that are identifiers
in the other languages are not treated as keywords. Right now, the kind
is set to identifier, and the identifier info is cleared. The latter is
probably so that the code for identifying C++ structures does not
recognize those structures by mistake when formatting a language that
does not have those structures. But we did not find an instance where
the language can have the sequence of tokens, the code tries to parse
the structure as if it is C++ using the identifier info instead of the
token kind, but without checking for the language setting. However,
there are places where the code checks whether the identifier info field
is null or not. They are places where an identifier and a keyword are
treated the same way. For example, the name of a function in
JavaScript. This patch removes the lines that clear the identifier
info. This way, a C++ keyword gets treated in the same way as an
identifier in those places.
JavaScript
New
```JavaScript
async function
union(
myparamnameiswaytooloooong) {
}
```
Old
```JavaScript
async function
union(
myparamnameiswaytooloooong) {
}
```
Java
New
```Java
enum union { ABC, CDE }
```
Old
```Java
enum
union { ABC, CDE }
```
This reverts commit 97dcbdef6089175c45e14fcbcf5c88b10233a79a.
Commit: f7617f7f909102080f1a0cee46f8ca75ec8d14ff
https://github.com/llvm/llvm-project/commit/f7617f7f909102080f1a0cee46f8ca75ec8d14ff
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Recognize TableGen paste operator on separate line (#133722)
Formatting this piece of code made the program crash.
```
class TypedVecListRegOperand<RegisterClass Reg, int lanes, string eltsize>
: RegisterOperand<Reg, "printTypedVectorList<" # lanes # ", '"
# eltsize # "'>">;
```
The line starting with the `#` was treated as a separate preprocessor
directive line. Then the code dereferenced a null pointer when it tried
to continue parsing the first line that did not end in a semicolon.
Now the 2 problems are fixed.
Commit: 2b3aa56fd742775c5b05c3053778832aa76c0feb
https://github.com/llvm/llvm-project/commit/2b3aa56fd742775c5b05c3053778832aa76c0feb
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/gh134265.cpp
Log Message:
-----------
[MS][clang] Error about ambiguous operator delete[] only when required (#135041)
And issue was reported in
https://github.com/llvm/llvm-project/pull/133950#issuecomment-2787510484
. Since we don't always emit vector deleting dtors, only error out about
ambiguous operator delete[] when it will be required for vector deleting
dtor emission.
Commit: 4244a91be268111dd133fa4863504c4840e5361c
https://github.com/llvm/llvm-project/commit/4244a91be268111dd133fa4863504c4840e5361c
Author: Steven Perron <stevenperron at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
Log Message:
-----------
[SPIRV][NFC] Refactor pointer creation in GlobalRegistery (#134429)
This PR adds new interfaces to create pointer type, and adds
some requirements to the old interfaces. This is the first step in
https://github.com/llvm/llvm-project/issues/134119.
Commit: b0428870dae980af84e50dfa3ee6ed2165998678
https://github.com/llvm/llvm-project/commit/b0428870dae980af84e50dfa3ee6ed2165998678
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
Log Message:
-----------
[AMDGPU] Rename TH_STORE_RT_WB to TH_STORE_WB (#135171)
So it matches the documentation
Fixes: SWDEV-526726
Commit: 5978bb2936d9a71d8e6891c640a36be760b569d3
https://github.com/llvm/llvm-project/commit/5978bb2936d9a71d8e6891c640a36be760b569d3
Author: u4f3 <ricoafoat at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/DeadArgumentElimination.h
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/test/Transforms/DeadArgElim/musttail-caller.ll
A llvm/test/Transforms/DeadArgElim/musttail-verifier.ll
Log Message:
-----------
[DeadArgElim] fix verifier failure when changing musttail's function signature (#127366)
This commit is for #107569 and #126817.
Stop changing musttail's caller and callee's function signature when
calling convention is not swifttailcc nor tailcc. Verifier makes sure
musttail's caller and callee shares exactly the same signature, see
commit 9ff2eb1 and #54964.
Otherwise just make sure the return type is the same and then process
musttail like usual calls.
close #107569, #126817
Commit: f989db5745b88cd72f2af7f67ff96071f5059922
https://github.com/llvm/llvm-project/commit/f989db5745b88cd72f2af7f67ff96071f5059922
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[NFC] Use cast instead of dyn_cast for Src and Dst vec types in VecCombine folding (#134432)
SrcVecTy and DstVecTy are used without a null check, and originate from
a dyn_cast. This patch adjusts this to use a fixed cast, since it is not
checked for null before use otherwise, but is semantically guaranteed
from previous checks.
Commit: 15428e0d786939a5c7629a9978947c8a9112ce96
https://github.com/llvm/llvm-project/commit/15428e0d786939a5c7629a9978947c8a9112ce96
Author: David Stuttard <david.stuttard at amd.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
Log Message:
-----------
[AMDGPU] Add support for point sample accel out of order returns (#127991)
Add target feature for point sample acceleration and enable it for
relevant
targets.
Also add support to insert waitcnts where required when point sample
accel may
have occurred. This has implications for out of order returns, which is
why
extra waitcnts are required.
Add a VMEM_NOSAMPLER bit in the register masks to determine when
waitcnt is required.
Commit: 4b267bb7c2f1f84e10d3d47d17e0a19de6559de2
https://github.com/llvm/llvm-project/commit/4b267bb7c2f1f84e10d3d47d17e0a19de6559de2
Author: Richard Howell <rmaz at users.noreply.github.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M lld/MachO/InputFiles.cpp
A lld/test/MachO/tapi-rpath.s
Log Message:
-----------
[lld] load rpaths from tbd files (#134925)
TBD files can contain rpaths, add support for setting them in DylibFile
during construction.
Commit: 85614e160ba569d719452ec80b842a0edc5ab930
https://github.com/llvm/llvm-project/commit/85614e160ba569d719452ec80b842a0edc5ab930
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/call.cpp
A clang/test/CIR/IR/call.cir
Log Message:
-----------
[CIR] Upstream initial function call support (#134673)
This patch upstreams initial support for making function calls in CIR.
Function arguments and return values are not included to keep the patch
small for review.
Related to #132487
Commit: a693f23ef2fc4022383d986a365da325f3d42ade
https://github.com/llvm/llvm-project/commit/a693f23ef2fc4022383d986a365da325f3d42ade
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/revec-load-compress.ll
Log Message:
-----------
[SLP][REVEC] Fix CompressVectorize does not expand mask when REVEC is enabled. (#135174)
Commit: 8820f4e52b1b4ae59603b9307ded4ffc0f27c112
https://github.com/llvm/llvm-project/commit/8820f4e52b1b4ae59603b9307ded4ffc0f27c112
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vsetcc_fp.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Regenerate CHECK lines for arm64-vsetcc_fp.ll and fp16-v4-instructions.ll.
Commit: 2bbe8e825e53f3878c344adc7b5440c1040b097e
https://github.com/llvm/llvm-project/commit/2bbe8e825e53f3878c344adc7b5440c1040b097e
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add more level_check tests for tensor_dim and tensor_size (#135062)
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: b17bd73e620b0040b04e368ebe4d963add4bbaf1
https://github.com/llvm/llvm-project/commit/b17bd73e620b0040b04e368ebe4d963add4bbaf1
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add more negative tests for rank0 tensors, negate, and sub (#135061)
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 396e2ef3b7f43d59074738699b7c748a30e30376
https://github.com/llvm/llvm-project/commit/396e2ef3b7f43d59074738699b7c748a30e30376
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect identity match for less-defined splat
Commit: 3097ab0fe88809ca0cba754079766a56ec111df1
https://github.com/llvm/llvm-project/commit/3097ab0fe88809ca0cba754079766a56ec111df1
Author: Thomas BIZET <thomas.bizet at foss.st.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
A llvm/test/MC/ARM/directive-arch-armv8.1-m.s
A llvm/test/MC/ARM/directive-arch-armv8.1m.s
Log Message:
-----------
[ARM][MC] Add support for Armv8.1-M Mainline to '.arch' asm directive (#135184)
Armv8.1-M Mainline architecture is supported by Clang's driver & LLVM's
ARM backend, but MC would report an 'Unknown Arch: armv8.1-m.main' error
when processing '.arch armv8.1-m.main' assembler directives.
Commit: 378ac572accc6d14ed36136f261951f8607a9169
https://github.com/llvm/llvm-project/commit/378ac572accc6d14ed36136f261951f8607a9169
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
A llvm/test/CodeGen/PowerPC/poison-legalization.ll
A llvm/test/CodeGen/RISCV/poison-legalization.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/pr119158.ll
Log Message:
-----------
Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (#135056)
A new ISD::POISON SDNode is introduced to represent the poison value in
the IR, replacing the previous use of ISD::UNDEF
Commit: 959b8aaeacfd13717b7e2cf51ecceea27fcac9a8
https://github.com/llvm/llvm-project/commit/959b8aaeacfd13717b7e2cf51ecceea27fcac9a8
Author: Alan Li <me at alanli.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
Log Message:
-----------
[MLIR][NFC] Expose `computeProduct` function. (#135192)
Make it non-static, as its functionality is quite generic.
Commit: 4ea57b3481c07fd8e19315752dfd0a03e1d7bd12
https://github.com/llvm/llvm-project/commit/4ea57b3481c07fd8e19315752dfd0a03e1d7bd12
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
Log Message:
-----------
[SLP]Fix detection of matching splat vector
Need to check, that the mask of the potentially matching splat node is
not less defined than the requested mask to avoid poison propagation and
incorrect code.
Fixes #135113
Commit: 83f831d46f46e9f68bec9b7a6592f678c8ba61ab
https://github.com/llvm/llvm-project/commit/83f831d46f46e9f68bec9b7a6592f678c8ba61ab
Author: Thurston Dang <thurston at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
Fix-forward -Wcovered-switch-default error in #134429
Remove the default case to avoid buildbot error (https://lab.llvm.org/buildbot/#/builders/66/builds/12382/steps/8/logs/stdio):
```
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp:85:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
85 | default:
| ^
```
(also https://llvm.org/docs/CodingStandards.html#don-t-use-default-labels-in-fully-covered-switches-over-enumerations)
Commit: 01a2922f0d35ac7e2062426b5e5dc5349485796a
https://github.com/llvm/llvm-project/commit/01a2922f0d35ac7e2062426b5e5dc5349485796a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/19.rst
Log Message:
-----------
[libc++][doc] Removes LLVM 19 Release Notes. (#134894)
There will be no more LLVM-19 releases so we will not backport patches
for this release. This makes these Release Notes obsolete.
Commit: aaaa2a325bd1abb8c87e0171384fd2c42da5e38a
https://github.com/llvm/llvm-project/commit/aaaa2a325bd1abb8c87e0171384fd2c42da5e38a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
Log Message:
-----------
[SLP]Support vectorization of previously vectorized scalars in split nodes
Patch removes the restriction for the revectorization of the previously
vectorized scalars in split nodes, and moves the cost profitability
check to avoid regressions.
Reviewers: hiraditya, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/134286
Commit: edf21314c98a4fe05d48f83dfab2b201ed8bfe9c
https://github.com/llvm/llvm-project/commit/edf21314c98a4fe05d48f83dfab2b201ed8bfe9c
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
A llvm/test/CodeGen/AArch64/bti-linkage.ll
M llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
Log Message:
-----------
[AArch64][v8.5A] Omit BTI for non-addr-taken static fns in ELF (#135043)
This follows up commit 7af2b51e761f499, which removed the BTI at the
start of functions with internal linkage (provided they weren't
indirectly called inside the translation unit) for Linux targets.
Now we leave out the BTI for any ELF target, including bare-metal,
because the AAELF64 document in the Arm ABI has been updated to make the
same guarantee as SYSVABI64: if the linker wants to insert an indirect
branch at link time (e.g. as part of a long branch thunk) it's
responsible for making a BTI-equipped landing pad.
That was too difficult to test in the existing codegen test
`patchable-function-entry-bti.ll`, because so much of LLVM's detailed
asm output changes for non-ELF targets. So I've simplified that back to
how it was before 7af2b51e761f499 (except that now it expects no BTI in
the disputed function), and made a new test checking specifically the
difference in BTI between the formats.
Commit: 3c6c5c764ad4ccd6d5339cebf7ea1b19310b1176
https://github.com/llvm/llvm-project/commit/3c6c5c764ad4ccd6d5339cebf7ea1b19310b1176
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
Fix MSVC "not all control paths return a value" warning. NFCI.
Commit: 0563569978fee1e780a560494c89869074933f58
https://github.com/llvm/llvm-project/commit/0563569978fee1e780a560494c89869074933f58
Author: alex-t <alex-t at users.noreply.github.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
A llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.ll
A llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.mir
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)
PHI operands and results must belong to the same register class.
If a PHI node produces an SGPR, but one of its operands is a VGPR, we
insert a VGPR-to-SGPR copy in the operand’s source block. The PHI
operand is then updated to use the destination register of the inserted
copy.
These inserted copies are processed immediately when they are created.
Therefore, we should avoid reprocessing them when handling their parent
block later.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: f2ff298867d7733122e32eead5a8c524b09dfdb1
https://github.com/llvm/llvm-project/commit/f2ff298867d7733122e32eead5a8c524b09dfdb1
Author: Fangrui Song <i at maskray.me>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/MC/TargetRegistry.cpp
Log Message:
-----------
[MC] Remove deprecated createAsmStreamer/createMCObjectStreamer with 3 trailing bool
They were deprecated around 867faeec054abb4c035673189c1169fef45f54c8
(June 2024)
Commit: 2f41fa387d6734c637d02cbcf985c7b312b1e23b
https://github.com/llvm/llvm-project/commit/2f41fa387d6734c637d02cbcf985c7b312b1e23b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libcxx/cmake/caches/AMDGPU.cmake
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/src/Mapping.cpp
A offload/test/api/amdgpu_code_object.c
Log Message:
-----------
[AMDGPU] Fix code object version not being set to 'none' (#135036)
Summary:
Previously, we removed the special handling for the code object version
global. I erroneously thought that this meant we cold get rid of this
weird `-Xclang` option. However, this also emits an LLVM IR module flag,
which will then cause linking issues.
Commit: 750d009bb22015be4b8b6278fb24dbda90c7b485
https://github.com/llvm/llvm-project/commit/750d009bb22015be4b8b6278fb24dbda90c7b485
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/shift-i512.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add concatenation handling for BITCAST nodes (#133913)
These nodes are effectively free, so we should only concatenate if the
inner nodes will concatenate together.
This also exposed a regression in canonicalizeShuffleWithOp that failed
to realize it could potentially merge shuffles with a CONCAT_VECTORS
node.
Commit: 18fe0124e7abbaba64db5793503cc86cb52965d8
https://github.com/llvm/llvm-project/commit/18fe0124e7abbaba64db5793503cc86cb52965d8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/connection.cpp
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/unit.cpp
M flang/include/flang/Common/uint128.h
Log Message:
-----------
[flang][runtime] Formatted input optimizations (#134715)
Make some minor tweaks (inlining, caching) to the formatting input path
to improve integer input in a SPEC code. (None of the I/O library has
been tuned yet for performance, and there are some easy optimizations
for common cases.) Input integer values are now calculated with native
C/C++ 128-bit integers.
A benchmark that only reads about 5M lines of three integer values each
speeds up from over 8 seconds to under 3 in my environment with these
changeds.
If this works out, the code here can be used to optimize the formatted
input paths for real and character data, too.
Fixes https://github.com/llvm/llvm-project/issues/134026.
Commit: cf8c02f71d43b93241eb5d8262a829047afcbfb7
https://github.com/llvm/llvm-project/commit/cf8c02f71d43b93241eb5d8262a829047afcbfb7
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M flang/lib/Parser/parsing.cpp
A flang/test/Preprocessing/bug134986.F90
Log Message:
-----------
[flang] Don't insert spaces in -E output after line continuation (#135063)
See test case. When Fortran line continuation has been used, don't
insert spaces in -E formatted output to put things into the right
column, as this can break up a token.
Fixes https://github.com/llvm/llvm-project/issues/134986.
Commit: 61a72890774354aeed188d45aa161ff6bbddc581
https://github.com/llvm/llvm-project/commit/61a72890774354aeed188d45aa161ff6bbddc581
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/test/Bitcode/calling-conventions.3.2.ll
Log Message:
-----------
[NFC] Remove trailing whitespaces in `llvm/test/Bitcode/calling-conventions.3.2.ll`
Commit: 464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae
https://github.com/llvm/llvm-project/commit/464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae
Author: Nico Weber <thakis at chromium.org>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.ll
R llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.mir
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)"
This reverts commit 0563569978fee1e780a560494c89869074933f58.
Breaks tests, see comments on https://github.com/llvm/llvm-project/pull/134153
Commit: 3954d258a5d20c418718bb2f655665e02e6a7475
https://github.com/llvm/llvm-project/commit/3954d258a5d20c418718bb2f655665e02e6a7475
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/class.derived/class.derived.general/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p6.cpp
M clang/test/SemaCXX/undefined-partial-specialization.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang] Improved canonicalization for template specialization types (#135119)
This changes the TemplateArgument representation to hold a flag
indicating whether a template argument of expression type is supposed to
be canonical or not.
This gets one step closer to solving
https://github.com/llvm/llvm-project/issues/92292
This still doesn't try to unique as-written TSTs. While this would
increase the amount of memory savings and make code dealing with the AST
more well-behaved, profiling template argument lists is still too
expensive for this to be worthwhile, at least for now. Without this
uniquing, this patch stands neutral in terms of performance impact.
This also fixes the context creation of TSTs, so that they don't in some
cases get incorrectly flagged as sugar over their own canonical form.
This is captured in the test expectation change of some AST dumps.
This fixes some places which were unnecessarily canonicalizing these
TSTs.
Commit: 39562de51007e9d6a2ce444475a7b78fba9fafcb
https://github.com/llvm/llvm-project/commit/39562de51007e9d6a2ce444475a7b78fba9fafcb
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
Log Message:
-----------
[ValueTracking] Handle assume(trunc x to i1) in ComputeKnownBits (#118406)
proof: https://alive2.llvm.org/ce/z/zAspzb
Commit: 5c54ebbdcbf19747417a10566fe4380b7ed20ca0
https://github.com/llvm/llvm-project/commit/5c54ebbdcbf19747417a10566fe4380b7ed20ca0
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clangd/AST.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
A clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
A clang/test/AST/ByteCode/libcxx/minmax.cpp
A clang/test/AST/ByteCode/pointer-to-fnptr.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/private.hlsl
M clang/test/C/C11/n1285.c
A clang/test/C/C11/n1285_1.c
A clang/test/CIR/CodeGen/call.cpp
A clang/test/CIR/IR/call.cir
M clang/test/CXX/class.derived/class.derived.general/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p6.cpp
M clang/test/CodeGen/xcore-abi.c
M clang/test/CodeGenHLSL/GlobalDestructors.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
A clang/test/CodeGenHLSL/out-of-line-static.hlsl
A clang/test/CodeGenHLSL/static-variable.hlsl
M clang/test/CodeGenObjC/property-array-type.m
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/SemaCXX/gh134265.cpp
M clang/test/SemaCXX/undefined-partial-specialization.cpp
M clang/test/SemaTemplate/address_space-dependent.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/clang-format/git-clang-format
M clang/unittests/AST/ByteCode/toAPValue.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/Format/FormatTestJS.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/www/c_status.html
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/connection.cpp
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/unit.cpp
M flang/include/flang/Common/uint128.h
M flang/lib/Parser/parsing.cpp
A flang/test/Preprocessing/bug134986.F90
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libclc/clspv/lib/math/fma.cl
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/19.rst
M lld/MachO/InputFiles.cpp
A lld/test/MachO/tapi-rpath.s
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/unittests/Symbol/UnwindPlanTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Transforms/IPO/DeadArgumentElimination.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/TargetRegistry.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Bitcode/calling-conventions.3.2.ll
A llvm/test/CodeGen/AArch64/aarch64-swp-ws-live-intervals-1.mir
M llvm/test/CodeGen/AArch64/arm64-st1.ll
M llvm/test/CodeGen/AArch64/arm64-vsetcc_fp.ll
A llvm/test/CodeGen/AArch64/bti-linkage.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-fpac.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign.ll
A llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
M llvm/test/CodeGen/AArch64/selectiondag-order.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp64_to_bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
A llvm/test/CodeGen/PowerPC/poison-legalization.ll
A llvm/test/CodeGen/RISCV/poison-legalization.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/X86/avgfloors-scalar.ll
M llvm/test/CodeGen/X86/avgflooru-scalar.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/pr119158.ll
M llvm/test/CodeGen/X86/selectiondag-order.ll
M llvm/test/CodeGen/X86/shift-i512.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/MC/AArch64/arm64-diags.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_err.s
A llvm/test/MC/ARM/directive-arch-armv8.1-m.s
A llvm/test/MC/ARM/directive-arch-armv8.1m.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
M llvm/test/MC/MachO/AArch64/darwin-ARM64-reloc.s
A llvm/test/Transforms/CodeGenPrepare/X86/cast-debuginfo-salvage.ll
M llvm/test/Transforms/DeadArgElim/musttail-caller.ll
A llvm/test/Transforms/DeadArgElim/musttail-verifier.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
A llvm/test/Transforms/MemCpyOpt/memcpy-tbaa.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
A llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-getExtractWithExtendCost.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-load-compress.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/tools/llvm-reduce/operands-to-args.ll
M llvm/test/tools/llvm-reduce/remove-bb-switch-default.ll
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/support/BUILD.gn
M mlir/docs/Dialects/LLVM.md
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
A mlir/test/Target/LLVMIR/omptarget-memcpy-align-metadata.mlir
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/src/Mapping.cpp
A offload/test/api/amdgpu_code_object.c
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Commit: 3872db8e4bcb8cb7d5e22663dadfd1725125d989
https://github.com/llvm/llvm-project/commit/3872db8e4bcb8cb7d5e22663dadfd1725125d989
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clangd/AST.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
A clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
A clang/test/AST/ByteCode/libcxx/minmax.cpp
A clang/test/AST/ByteCode/pointer-to-fnptr.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/private.hlsl
M clang/test/C/C11/n1285.c
A clang/test/C/C11/n1285_1.c
A clang/test/CIR/CodeGen/call.cpp
A clang/test/CIR/IR/call.cir
M clang/test/CXX/class.derived/class.derived.general/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p6.cpp
M clang/test/CodeGen/xcore-abi.c
M clang/test/CodeGenHLSL/GlobalDestructors.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
A clang/test/CodeGenHLSL/out-of-line-static.hlsl
A clang/test/CodeGenHLSL/static-variable.hlsl
M clang/test/CodeGenObjC/property-array-type.m
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/SemaCXX/gh134265.cpp
M clang/test/SemaCXX/undefined-partial-specialization.cpp
M clang/test/SemaTemplate/address_space-dependent.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/clang-format/git-clang-format
M clang/unittests/AST/ByteCode/toAPValue.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/Format/FormatTestJS.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/www/c_status.html
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/connection.cpp
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/unit.cpp
M flang/include/flang/Common/uint128.h
M flang/lib/Parser/parsing.cpp
A flang/test/Preprocessing/bug134986.F90
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libclc/clspv/lib/math/fma.cl
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/docs/ReleaseNotes.rst
R libcxx/docs/ReleaseNotes/19.rst
M lld/MachO/InputFiles.cpp
A lld/test/MachO/tapi-rpath.s
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/unittests/Symbol/UnwindPlanTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Transforms/IPO/DeadArgumentElimination.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/TargetRegistry.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Bitcode/calling-conventions.3.2.ll
A llvm/test/CodeGen/AArch64/aarch64-swp-ws-live-intervals-1.mir
M llvm/test/CodeGen/AArch64/arm64-st1.ll
M llvm/test/CodeGen/AArch64/arm64-vsetcc_fp.ll
A llvm/test/CodeGen/AArch64/bti-linkage.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-fpac.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign.ll
A llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
M llvm/test/CodeGen/AArch64/selectiondag-order.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp64_to_bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-bit-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
A llvm/test/CodeGen/PowerPC/poison-legalization.ll
A llvm/test/CodeGen/RISCV/poison-legalization.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/X86/avgfloors-scalar.ll
M llvm/test/CodeGen/X86/avgflooru-scalar.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/pr119158.ll
M llvm/test/CodeGen/X86/selectiondag-order.ll
M llvm/test/CodeGen/X86/shift-i512.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/MC/AArch64/arm64-diags.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_err.s
A llvm/test/MC/ARM/directive-arch-armv8.1-m.s
A llvm/test/MC/ARM/directive-arch-armv8.1m.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
M llvm/test/MC/MachO/AArch64/darwin-ARM64-reloc.s
A llvm/test/Transforms/CodeGenPrepare/X86/cast-debuginfo-salvage.ll
M llvm/test/Transforms/DeadArgElim/musttail-caller.ll
A llvm/test/Transforms/DeadArgElim/musttail-verifier.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
A llvm/test/Transforms/MemCpyOpt/memcpy-tbaa.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
A llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-getExtractWithExtendCost.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-load-compress.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/tools/llvm-reduce/operands-to-args.ll
M llvm/test/tools/llvm-reduce/remove-bb-switch-default.ll
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/support/BUILD.gn
M mlir/docs/Dialects/LLVM.md
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
A mlir/test/Target/LLVMIR/omptarget-memcpy-align-metadata.mlir
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/src/Mapping.cpp
A offload/test/api/amdgpu_code_object.c
Log Message:
-----------
Rebase
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/7dc5c635aebc...3872db8e4bcb
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