[all-commits] [llvm/llvm-project] 0c2a6f: [mlir][x86vector] Simplify intrinsic generation (#...

[Adam Siemieniuk via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0c2a6f2d62ec66065e88f70e7b863cbcb43b3307
      https://github.com/llvm/llvm-project/commit/0c2a6f2d62ec66065e88f70e7b863cbcb43b3307
  Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
  Date:   2025-04-09 (Wed, 09 Apr 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
    M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
    M mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
    A mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
    M mlir/include/mlir/Target/LLVMIR/Dialect/All.h
    R mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
    M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
    M mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
    M mlir/lib/Target/LLVMIR/CMakeLists.txt
    M mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
    R mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
    R mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
    M mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
    M mlir/test/Target/LLVMIR/x86vector.mlir
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][x86vector] Simplify intrinsic generation (#133692)

Replaces separate x86vector named intrinsic operations with direct calls
to LLVM intrinsic functions.
    
This rework reduces the number of named ops leaving only high-level MLIR
equivalents of whole intrinsic classes e.g., variants of AVX512 dot on
BF16 inputs. Dialect conversion applies LLVM intrinsic name mangling
further simplifying lowering logic.
    
The separate conversion step translating x86vector intrinsics into LLVM
IR is also eliminated. Instead, this step is now performed by the
existing llvm dialect infrastructure.

RFC:
https://discourse.llvm.org/t/rfc-simplify-x86-intrinsic-generation/85581



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