[all-commits] [llvm/llvm-project] ae5306: [RISCV] Add symbol parsing support for the Xqcibi ...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ae5306f30e17719d7589b7941bd107ce58a04228
      https://github.com/llvm/llvm-project/commit/ae5306f30e17719d7589b7941bd107ce58a04228
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-04-04 (Fri, 04 Apr 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    A llvm/test/MC/RISCV/xqcibi-relocations.s

  Log Message:
  -----------
  [RISCV] Add symbol parsing support for the Xqcibi branch immediate instructions (#134233)

This patch adds support for parsing symbols in the Xqcibi branch
immediate instructions. While the 32 bit branch instructions use the
same instruction format and relocation as the existing branch
instructions in RISCV, the 48 bit ones use the `InstFormatQC_EB`
instruction format and the `R_RISCV_QC_E_BRANCH` relocation that is
defined in `BinaryFormat/ELFRelocs/RISCV_nonstandard.def.`

Vendor relocation support will be added in a later patch.



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