[all-commits] [llvm/llvm-project] bf0af2: [WIP][AMDGPU] Improve the handling of `inreg` argu...

[Shilei Tian via All-commits]

  Branch: refs/heads/users/shiltian/inreg-vgpr-improvement
  Home:   https://github.com/llvm/llvm-project
  Commit: bf0af2599672a03a67f39532fd30709058286120
      https://github.com/llvm/llvm-project/commit/bf0af2599672a03a67f39532fd30709058286120
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-04-03 (Thu, 03 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    A llvm/test/CodeGen/AMDGPU/inreg-vgpr-spill.ll

  Log Message:
  -----------
  [WIP][AMDGPU] Improve the handling of `inreg` arguments

When SGPRs available for `inreg` argument passing run out, the compiler silently
falls back to using whole VGPRs to pass those arguments. Ideally, instead of
using whole VGPRs, we should pack `inreg` arguments into individual lanes of
VGPRs.

This PR introduces `InregVGPRSpiller`, which handles this packing. It uses
`v_writelane` at the call site to place `inreg` arguments into specific VGPR
lanes, and then extracts them in the callee using `v_readlane`.

Fixes #130443 and #129071.



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