[all-commits] [llvm/llvm-project] 499827: Reland [RISCV] Add Xqci Insn Formats (#134134)

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 499827318971a7d540a2b928f43d782e63762a47
      https://github.com/llvm/llvm-project/commit/499827318971a7d540a2b928f43d782e63762a47
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-04-02 (Wed, 02 Apr 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    A llvm/test/MC/RISCV/insn_xqci-invalid.s
    A llvm/test/MC/RISCV/insn_xqci.s
    M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s

  Log Message:
  -----------
  Reland [RISCV] Add Xqci Insn Formats (#134134)

This adds the following instruction formats from the Xqci Spec:
- QC.EAI
- QC.EI
- QC.EB
- QC.EJ
- QC.ES

The update to the THead test is because the largest number of operands
for a valid instruction has been bumped by this change.

This reverts commit 68fb7a5a1d203dde7badf67031bdd9eb650eef5d. This
relands commit 0cfabd37df9940346f3bf8a4d74c19e1f48a00e9.



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