[all-commits] [llvm/llvm-project] fb0e7b: [AMDGPU][True16][CodeGen] Implement sgpr folding i...

Brox Chen via All-commits all-commits at lists.llvm.org
Wed Apr 2 13:08:48 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fb0e7b5f161118a24eeef39b05882f6950be43c0
      https://github.com/llvm/llvm-project/commit/fb0e7b5f161118a24eeef39b05882f6950be43c0
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-04-02 (Wed, 02 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/bswap.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fp-classify.ll
    M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
    M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
    M llvm/test/CodeGen/AMDGPU/imm16.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    A llvm/test/CodeGen/AMDGPU/true16-fold.mir
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] Implement sgpr folding in true16 (#128929)

We haven't implemented 16 bit SGPRs. Currently allow 32-bit SGPRs to be
folded into True16 bit instructions taking 16 bit values. Also use
sgpr_32 when Imm is copied to spgr_lo16 so it could be further folded.
This improves generated code quality.



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