[all-commits] [llvm/llvm-project] e61ad7: [LV] Compute register usage for interleaving on VP...

Sam Tebbs via All-commits all-commits at lists.llvm.org
Wed Apr 2 07:42:19 PDT 2025 

  Branch: refs/heads/users/SamTebbs33/reg-pressure
  Home:   https://github.com/llvm/llvm-project
  Commit: e61ad769cbf0173256e99c38354ecb72ab903275
      https://github.com/llvm/llvm-project/commit/e61ad769cbf0173256e99c38354ecb72ab903275
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/i1-reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/LoongArch/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/X86/i1-reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
    M llvm/test/Transforms/LoopVectorize/X86/reg-usage.ll

  Log Message:
  -----------
  [LV] Compute register usage for interleaving on VPlan.

Add a version of calculateRegisterUsage that works estimates register
usage for a VPlan. This mostly just ports the existing code, with some
updates to figure out what recipes will generate vectors vs scalars.

There are number of changes in the computed register usages, but they
should be more accurate w.r.t. to the generated vector code.

There are the following changes:

 * Scalar usage increases in most cases by 1, as we always create a
   scalar canonical IV, which is alive across the loop and is not
   considered by the legacy implementation

 * Output is ordered by insertion, now scalar registers are added first
   due the canonical IV phi.

 * Using the VPlan, we now also more precisely know if an induction will
   be vectorized or scalarized.


  Commit: fdadc194b4d0002622160f3be37f1137a56a0db8
      https://github.com/llvm/llvm-project/commit/fdadc194b4d0002622160f3be37f1137a56a0db8
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

  Log Message:
  -----------
  !fixup update after rebasing


  Commit: cb23083d68bf70c7ff6cda8831bd0c95809a55a5
      https://github.com/llvm/llvm-project/commit/cb23083d68bf70c7ff6cda8831bd0c95809a55a5
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  !fixup address latest comments, thanks!


  Commit: eac6a32cdd4da0c349372b16bad7df5fadf7a62e
      https://github.com/llvm/llvm-project/commit/eac6a32cdd4da0c349372b16bad7df5fadf7a62e
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
    M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reduces-vf.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
    M llvm/test/Transforms/LoopVectorize/X86/reg-usage.ll
    M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll

  Log Message:
  -----------
  [LoopVectorizer] Prune VFs based on plan register pressure

Based on fhahn's work at https://github.com/llvm/llvm-project/pull/126437 .

This PR moves the register usage checking to after the plans are
created, so that any recipes that optimise register usage (such as
partial reductions) can be properly costed and not have their VF pruned
unnecessarily.

It involves changing some tests, notably removing one from
mve-known-tripcount.ll due to it not being vectorisable thanks to high
register pressure. tail-folding-reduces-vf.ll was modified to reduce its
register pressure but still test what was intended.


  Commit: 170f6f257acefa7ad24f880a419dae2f10b6a3e7
      https://github.com/llvm/llvm-project/commit/170f6f257acefa7ad24f880a419dae2f10b6a3e7
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  Format


  Commit: a9c9a52bdcd71ce3fe00976360a7e2e51f208700
      https://github.com/llvm/llvm-project/commit/a9c9a52bdcd71ce3fe00976360a7e2e51f208700
  Author: Sam Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
    M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll

  Log Message:
  -----------
  Ignore in-loop reductions


  Commit: cecc626cd9e8fa2e06628865cec58f8ea50028a0
      https://github.com/llvm/llvm-project/commit/cecc626cd9e8fa2e06628865cec58f8ea50028a0
  Author: Sam Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  Simpify in-loop checking


  Commit: 02ebbec52a294754b15947ad1ab306a9f202bbb5
      https://github.com/llvm/llvm-project/commit/02ebbec52a294754b15947ad1ab306a9f202bbb5
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll

  Log Message:
  -----------
  Re-add tripcount test


  Commit: deadd9169b120d61b74303e2346a90582d66c68e
      https://github.com/llvm/llvm-project/commit/deadd9169b120d61b74303e2346a90582d66c68e
  Author: Sam Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll

  Log Message:
  -----------
  Revert scalable-call.ll changes


  Commit: 7881f91c11bfee39c190ef39d4a47fabcd85c3c4
      https://github.com/llvm/llvm-project/commit/7881f91c11bfee39c190ef39d4a47fabcd85c3c4
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  Set MaxVF without loop if MaxVectorElementCount <= MaxVectorElementCountMaxBW


  Commit: bf9951c1c9132cdf8796a8b0bc57dee146be9912
      https://github.com/llvm/llvm-project/commit/bf9951c1c9132cdf8796a8b0bc57dee146be9912
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  Move calculateRegisterUsage out of cost model


  Commit: 57ffaeadcc230ed2857f49a00c3d2db6a9c374e0
      https://github.com/llvm/llvm-project/commit/57ffaeadcc230ed2857f49a00c3d2db6a9c374e0
  Author: Samuel Tebbs <samuel.tebbs at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll

  Log Message:
  -----------
  Separate out scaled reduction changes


Compare: https://github.com/llvm/llvm-project/compare/5f81501485b6...57ffaeadcc23

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