[all-commits] [llvm/llvm-project] dd1d41: [AMDGPU][True16][CodeGen] fix moveToVALU with prop...

[Brox Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dd1d41f833c9b28d8a940ba5a0b85b0d47e44e43
      https://github.com/llvm/llvm-project/commit/dd1d41f833c9b28d8a940ba5a0b85b0d47e44e43
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/select.f16.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] fix moveToVALU with proper subreg access in true16 (#132089)

There are V2S copies between vpgr16 and spgr32 in true16 mode. This is
caused by vgpr16 and sgpr32 both selectable by 16bit src in ISel.

When a V2S copy and its useMI are lowered to VALU,  this patch check
1. If the generated new VALU is used by a true16 inst. Add subreg access
if necessary.
2. Legalize the V2S copy by replacing it to subreg_to_reg

an example MIR looks like:
```
%2:sgpr_32 = COPY %1:vgpr_16
%3:sgpr_32 = S_OR_B32 %2:sgpr_32, ...
%4:vgpr_16 = V_ADD_F16_t16 %3:sgpr_32, ...
```
currently lowered to
```
%2:vgpr_32 = COPY %1:vgpr_16
%3:vgpr_32 = V_OR_B32 %2:vgpr_32, ...
%4:vgpr_16 = V_ADD_F16_t16 %3:vgpr_32, ...
```
after this patch
```
%2:vgpr_32 = SUBREG_TO_REG 0, %1:vgpr_16, lo16
%3:vgpr_32 = V_OR_B32 %2:vgpr_32, ...
%4:vgpr_16 = V_ADD_F16_t16 %3.lo16:vgpr_32, ...
```



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