[all-commits] [llvm/llvm-project] e47d3a: [LLD][AArch64] Increase alignment of AArch64AbsLon...

[Peter Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e47d3a30881794c99a6de3aa9adc806bf3dc79f6
      https://github.com/llvm/llvm-project/commit/e47d3a30881794c99a6de3aa9adc806bf3dc79f6
  Author: Peter Smith <peter.smith at arm.com>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M lld/ELF/SyntheticSections.cpp
    M lld/ELF/Thunks.cpp
    M lld/test/ELF/aarch64-call26-thunk.s
    M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
    M lld/test/ELF/aarch64-jump26-thunk.s
    M lld/test/ELF/aarch64-range-thunk-extension-plt32.s
    A lld/test/ELF/aarch64-thunk-align.s
    M lld/test/ELF/aarch64-thunk-bti-multipass.s
    M lld/test/ELF/aarch64-thunk-bti.s

  Log Message:
  -----------
  [LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (#133738)

This permits an AArch64AbsLongThunk to be used in an environment where
unaligned accesses are disabled.

The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned
accesses are disabled this address must be 8-byte aligned.

The vast majority of AArch64 systems will have unaligned accesses
enabled in userspace. However, after a reset, before the MMU has been
enabled, all memory accesses are to "device" memory, which requires
aligned accesses. In systems with multi-stage boot loaders a thunk may
be required to a later stage before the MMU has been enabled.

As we only want to increase the alignment when the ldr is used we delay
the increase in thunk alignment until we know we are going to write an
ldr. We also need to account for the ThunkSection alignment increase
when this happens.

In some of the test updates, particularly those with shared CHECK lines
with position independent thunks it was easier to ensure that the thunks
started at an 8-byte aligned address in all cases.



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