[all-commits] [llvm/llvm-project] ea68b2: [RISCV] Prevent disassembling RVC hint instruction...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ea68b228816dfbe27f3e1ba1149116587758d56c
      https://github.com/llvm/llvm-project/commit/ea68b228816dfbe27f3e1ba1149116587758d56c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-03-31 (Mon, 31 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/test/MC/RISCV/rve-invalid.s

  Log Message:
  -----------
  [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (#133805)

We can't ignore the return value form the GPR decode function, as it
contains the RVE check.



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