[all-commits] [llvm/llvm-project] e9a3ea: [SystemZ, DebugInfo] Instrument SystemZ backend pa...

Dominik Steenken via All-commits all-commits at lists.llvm.org
Mon Mar 31 10:30:27 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e9a3ea2218b754a96be4f44240c3f8ee9cbd26c9
      https://github.com/llvm/llvm-project/commit/e9a3ea2218b754a96be4f44240c3f8ee9cbd26c9
  Author: Dominik Steenken <dost at de.ibm.com>
  Date:   2025-03-31 (Mon, 31 Mar 2025)

  Changed paths:
    M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
    M llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
    M llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
    M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
    A llvm/test/CodeGen/SystemZ/Large/debug-instrref-brct.py
    A llvm/test/CodeGen/SystemZ/debug-instrref-copyphysregs.mir
    A llvm/test/CodeGen/SystemZ/debug-instrref-elimcompare.mir
    A llvm/test/CodeGen/SystemZ/debug-instrref-postrewrite.mir

  Log Message:
  -----------
  [SystemZ, DebugInfo] Instrument SystemZ backend passes for Instr-Ref DebugInfo (#133061)

This PR instruments the optimization passes in the SystemZ backend with
calls to `MachineFunction::substituteDebugValuesForInst` where
instruction substitutions are made to instructions that may compute
tracked values.

Tests are also added for each of the substitutions that were inserted.
Details on the individual passes follow.

### systemz-copy-physregs
When a copy targets an access register, we redirect the copy via an
auxiliary register. This leads to the final result being written by a
newly inserted SAR instruction, rather than the original MI, so we need
to update the debug value tracking to account for this.

### systemz-long-branch
This pass relaxes relative branch instructions based on the actual
locations of blocks. Only one of the branch instructions qualifies for
debug value tracking: BRCT, i.e. branch-relative-on-count, which
subtracts 1 from a register and branches if the result is not zero. This
is relaxed into an add-immediate and a conditional branch, so any
`debug-instr-number` present must move to the add-immediate instruction.

### systemz-post-rewrite
This pass replaces `LOCRMux` and `SELRMux` pseudoinstructions with
either the real versions of those instructions, or with branching
programs that implement the intent of the Pseudo. In all these cases,
any `debug-instr-number` attached to the pseudo needs to be reallocated
to the appropriate instruction in the result, either LOCR, SELR, or a
COPY.

### systemz-elim-compare
Similar to systemz-long-branch, for this pass, only few substitutions
are necessary, since it mainly deals with conditional branch
instructions. The only exceptiona are again branch-relative-on-count, as
it modifies a counter as part of the instruction, as well as any of the
load instructions that are affected.



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