[all-commits] [llvm/llvm-project] f7a034: [AMDGPU] (x or y) xor -1 -> x nor y (#130264)

[Ana Mihajlovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f7a034d400860501a26e3429e1c6a9f310f07f76
      https://github.com/llvm/llvm-project/commit/f7a034d400860501a26e3429e1c6a9f310f07f76
  Author: Ana Mihajlovic <Ana.Mihajlovic at amd.com>
  Date:   2025-03-28 (Fri, 28 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    A llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll

  Log Message:
  -----------
  [AMDGPU] (x or y) xor -1 -> x nor y (#130264)

Added pattern so s_nor is selected for ((i1 x or i1 y) xor -1) instead
of s_or and s_xor . This patch is for i1 divergent. The ballot in the
test is added for the retrieval of lanemask. The control flow is needed
because the combiner can't pass through phi instructions.



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