[all-commits] [llvm/llvm-project] 23bf98: [lldb][docs][NFC] Fix some doxygen comments (#132910)
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Thu Mar 27 09:24:33 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/slpsupport-revectorization-of-the-previously-vectorized-scalars
Home: https://github.com/llvm/llvm-project
Commit: 23bf98e4b5b763534ec568c792989e83de580b04
https://github.com/llvm/llvm-project/commit/23bf98e4b5b763534ec568c792989e83de580b04
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Interpreter/CommandInterpreter.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.h
Log Message:
-----------
[lldb][docs][NFC] Fix some doxygen comments (#132910)
These weren't rendering properly (mostly mis-use the syntax for
commenting member variables).
Commit: 70aeb89094e8109cd072b7cbfbf05060c05e139a
https://github.com/llvm/llvm-project/commit/70aeb89094e8109cd072b7cbfbf05060c05e139a
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
Log Message:
-----------
Calculate KnownBits from Metadata correctly for vector loads (#128908)
Calculate KnownBits correctly from metadata for vector loads.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 1bb755fdcd61695c748d925ee756fc3cba4f15ae
https://github.com/llvm/llvm-project/commit/1bb755fdcd61695c748d925ee756fc3cba4f15ae
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
Log Message:
-----------
[lldb][Instrumentation] GetPreferredAsanModule should be no-op on non-Darwin platforms (#132911)
The regex we use to find the compiler-rt library is already
Darwin-specific, so no need to run this on non-Darwin platforms.
Commit: 9fb792496687df1136d78e828cffe4f7f04a7043
https://github.com/llvm/llvm-project/commit/9fb792496687df1136d78e828cffe4f7f04a7043
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libc/src/time/time_utils.cpp
Log Message:
-----------
[libc][time] Fix -Wshorten-64-to-32 warning (#132947)
This breaks builds of libc with top of tree clang under -Werror.
Commit: cc08826b537c2e73013554cdaaf8ab06f2c0eb5e
https://github.com/llvm/llvm-project/commit/cc08826b537c2e73013554cdaaf8ab06f2c0eb5e
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf_err.s
Log Message:
-----------
[NFC][AMDGPU] Move buffer_load lds test from gfx11_asm_mubuf.s to gfx11_asm_mubuf_err.s (#132938)
The test checked that the lds flag for buffer_load instructions was not
supported. These should be moved to the _err counterpart of the tests.
Commit: 214fb43cb671d89d0e2da6dde348c6ffc360d7f0
https://github.com/llvm/llvm-project/commit/214fb43cb671d89d0e2da6dde348c6ffc360d7f0
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
Log Message:
-----------
MCExpr: simplify evaluateAsRelocatableImpl after https://reviews.llvm.org/D156505
Commit: f4bb9b53ad09739ae120df66a317c9b89ddcaff0
https://github.com/llvm/llvm-project/commit/f4bb9b53ad09739ae120df66a317c9b89ddcaff0
Author: Julien Villette <julien.villette at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-mca.rst
M llvm/include/llvm/MC/MCSchedule.h
M llvm/lib/MC/MCSchedule.cpp
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s
M llvm/tools/llvm-mca/Views/InstructionInfoView.cpp
M llvm/tools/llvm-mca/Views/InstructionInfoView.h
M llvm/tools/llvm-mca/llvm-mca.cpp
Log Message:
-----------
[MCA] Extend -instruction-tables option with verbosity levels (#130574)
Option becomes: -instruction-tables=`<level>`
The choice of `<level>` controls number of printed information.
`<level>` may be `none` (default), `normal`, `full`.
Note: If the option is used without `<label>`, default is `normal`
(legacy).
When `<level>` is `full`, additional information are:
- `<Bypass Latency>`: Latency when a bypass is implemented between
operands
in pipelines (see SchedReadAdvance).
- `<LLVM Opcode Name>`: mnemonic plus operands identifier.
- `<Resources units>`: Used resources associated with LLVM Opcode.
- `<instruction comment>`: reports comment if any from source assembly.
Level `full` can be used to better check scheduling info when TableGen
is modified.
LLVM Opcode name help to find right instruction regexp to fix TableGen
Scheduling Info.
-instruction-tables=full option is validated on
AArch64/Neoverse/V1-sve-instructions.s
Follow up of MR #126703
---------
Co-authored-by: Julien Villette <julien.villette at sipearl.com>
Commit: bed4c581c2a73a437f13e278c0d654c01efb58a1
https://github.com/llvm/llvm-project/commit/bed4c581c2a73a437f13e278c0d654c01efb58a1
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/fp-contract.ll
Log Message:
-----------
[NVPTX] Check 'contract' fast-math flag in addition to global options (#131372)
Commit: 5f58f3dda8b17f664a85d4e5e3c808edde41ff46
https://github.com/llvm/llvm-project/commit/5f58f3dda8b17f664a85d4e5e3c808edde41ff46
Author: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
Log Message:
-----------
[mlir][tosa] Avoid overflow in reduction folders (#132786)
Avoid operations that can overflow in constant folders for
`tosa.reduce_max` and `tosa.reduce_min`
Includes tests to avoid regressions
Signed-off-by: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Commit: 8fb802e995868f19f40ff7a14df6f38b248af3ce
https://github.com/llvm/llvm-project/commit/8fb802e995868f19f40ff7a14df6f38b248af3ce
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Improve code in collectInstsToScalarize (NFC) (#130643)
Commit: 0919ab3cb64668d771540c83fe439da8796b9ada
https://github.com/llvm/llvm-project/commit/0919ab3cb64668d771540c83fe439da8796b9ada
Author: Pranav Kant <prka at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-convert-v4f64.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/complex-int-to-fp.ll
M llvm/test/CodeGen/AArch64/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fprcvt-cvtf.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AArch64/vector-fcvt.ll
Log Message:
-----------
[AArch64] Don't try to vectorize fixed point to fp narrowing conversion (#130665)
GCC, correctly, doesn't vectorize in this case. Absence of direct
instructions to convert larger fixed point to lower floating point
precision inadvertently causes rounding leading to subtle differences
across ISAs.
https://godbolt.org/z/ssEchMWrE
Co-authored by: @echristo
Commit: 870463519bab45acf8590d41d9f2a161c37f26d5
https://github.com/llvm/llvm-project/commit/870463519bab45acf8590d41d9f2a161c37f26d5
Author: jimingham <jingham at apple.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/Makefile
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/TestNestedBreakpointCommands.py
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/main.c
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/make_bkpt_cmds.py
Log Message:
-----------
Fix the managing of the session dictionary when you have nested wrappers (#132846)
Since the inner wrapper call might have removed one of the entries from
the global dict that the outer wrapper ALSO was going to delete, make
sure that we check that the key is still in the global dict before
trying to act on it.
Commit: 7b3885d47b294940c34f01e82b084fe104e93dba
https://github.com/llvm/llvm-project/commit/7b3885d47b294940c34f01e82b084fe104e93dba
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for GL Fract (#132921)
Commit: 92e0560347196c5341ed0292878e2b4f8dba414f
https://github.com/llvm/llvm-project/commit/92e0560347196c5341ed0292878e2b4f8dba414f
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/exceptions.cpp
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/test/Lower/Intrinsics/ieee_compare.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/nearest.f90
Log Message:
-----------
[flang] ieee_denorm (#132307)
Add support for the nonstandard ieee_denorm exception for real kinds 3,
4, 8 on x86 processors.
Commit: 6ddc07163d6c781622384eb83c7220d3051243a6
https://github.com/llvm/llvm-project/commit/6ddc07163d6c781622384eb83c7220d3051243a6
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
Disable some tests on bazel (#132951)
These tests failed at Google after #130757. Disable them in bazel for the time being.
Commit: 2c8e26081fc5a023471622ddc98638431c66ac6f
https://github.com/llvm/llvm-project/commit/2c8e26081fc5a023471622ddc98638431c66ac6f
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/command.cpp
M flang/docs/Intrinsics.md
M flang/include/flang/Common/windows-include.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Command.h
M flang/include/flang/Runtime/command.h
M flang/include/flang/Runtime/extensions.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
A flang/test/Lower/Intrinsics/hostnm-func.f90
A flang/test/Lower/Intrinsics/hostnm-sub.f90
A flang/test/Semantics/hostnm.f90
Log Message:
-----------
[flang] Add HOSTNM runtime and lowering intrinsics implementation (#131910)
Implement GNU extension intrinsic HOSTNM, both function and subroutine
forms. Add HOSTNM documentation to `flang/docs/Intrinsics.md`. Add
lowering and semantic unit tests.
(This change is modeled after GETCWD implementation.)
Commit: 25938389c023e7122a03cd4d3536187542046c65
https://github.com/llvm/llvm-project/commit/25938389c023e7122a03cd4d3536187542046c65
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
Log Message:
-----------
[AMDGPU] Autogen checks for agpr-csr.ll (#132959)
Needed for a RegisterCoalescer patch
Commit: 357306572d4734a75e649284b4808299d0aba9c8
https://github.com/llvm/llvm-project/commit/357306572d4734a75e649284b4808299d0aba9c8
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/utility
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/std/utilities/utility/utility.monostate.relpos/relops.pass.cpp
A libcxx/test/std/utilities/utility/utility.monostate/monostate.pass.cpp
Log Message:
-----------
[libcxx] Put `std::monostate` in `<utility>` (#128373)
Fixes: #127874
Commit: 74c2c049d12cf9c2aa1ce8bcf16048f4a084dd90
https://github.com/llvm/llvm-project/commit/74c2c049d12cf9c2aa1ce8bcf16048f4a084dd90
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Target/LLVMIR/Import/alias.ll
Log Message:
-----------
[MLIR][LLVM] Add weak_odr to allowed linkage for alias (#132840)
I missed this when originally introduced the feature (note the verifier
message already contains it), this fixes a small bug.
Commit: 53fa28940e0a3ef183e04dd8bc8566d64bbfd101
https://github.com/llvm/llvm-project/commit/53fa28940e0a3ef183e04dd8bc8566d64bbfd101
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Lex/ModuleMap.cpp
Log Message:
-----------
[clang] Remove unused member variable from ModuleMap
This became unused when module map parsing moved to ModuleMapFile.cpp.
Commit: 2f8d6998451dd8c4095fb60f087eca36974f5d74
https://github.com/llvm/llvm-project/commit/2f8d6998451dd8c4095fb60f087eca36974f5d74
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
Log Message:
-----------
[AMDGPU][SelectionDAG] Use COPY instead of S_MOV_B32 to assign values to M0 (#132957)
This is consistent with what's done on GISel. This allows the register
coalescer to remove the redundant intermediate `s_mov_b32` instructions
by using `m0` directly as the result register.
Commit: dfb6c761f75581f4230d1e9ec6a569686f0bf11c
https://github.com/llvm/llvm-project/commit/dfb6c761f75581f4230d1e9ec6a569686f0bf11c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ASTContext.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
Log Message:
-----------
[clang] ASTContex: fix getCommonSugaredType for array types (#132559)
This corrects the behaviour for getCommonSugaredType with regards to
array top level qualifiers: remove differing top level qualifiers, as
they must be redundant with element qualifiers.
Fixes https://github.com/llvm/llvm-project/issues/97005
Commit: 51dad714e82e3e15c339aade8be605ed09bbabab
https://github.com/llvm/llvm-project/commit/51dad714e82e3e15c339aade8be605ed09bbabab
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
M llvm/test/Transforms/GlobalOpt/dead-store-status.ll
M llvm/test/Transforms/GlobalOpt/pr54572.ll
Log Message:
-----------
[GlobalOpt] Handle operators separately when removing GV users (#84694)
Refactor globalopt by eliminating redundant code. Fix
https://github.com/llvm/llvm-project/issues/64680.
Commit: e16e93a4c7d9a0154d9e136f164a88eaa9e3768b
https://github.com/llvm/llvm-project/commit/e16e93a4c7d9a0154d9e136f164a88eaa9e3768b
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
M llvm/test/Transforms/GlobalOpt/dead-store-status.ll
M llvm/test/Transforms/GlobalOpt/pr54572.ll
Log Message:
-----------
Revert "[GlobalOpt] Handle operators separately when removing GV users" (#132971)
Reverts llvm/llvm-project#84694 . Review was incomplete.
Commit: fc5b4d4a9d807bce07f5ce719e877707381f52c4
https://github.com/llvm/llvm-project/commit/fc5b4d4a9d807bce07f5ce719e877707381f52c4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Rename __construct_one_at_end to __emplace_back_assume_capacity (#132276)
This makes it clear that the end of the vector is updated when calling
the function.
Commit: 9243f99d17c0165800fd1f2f92c5c975cf702414
https://github.com/llvm/llvm-project/commit/9243f99d17c0165800fd1f2f92c5c975cf702414
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libc/src/__support/CPP/atomic.h
M libc/test/src/__support/CPP/atomic_test.cpp
Log Message:
-----------
[libc] Add support for C++20 'atomic_ref' type (#132302)
Summary:
C++20 introduced an atomic reference type, which more easily wraps
around the standard way of dealing with atomics. Instead of a dedicated
type, it allows you to treat an existing allocation as atomic.
This has no users yet, but I'm hoping to use it when I start finalizing
my GPU allocation interface, as it will need to handle atomic values
in-place that can't be done with placement new. Hopefully this is small
enough that we can just keep it in-tree until it's needed, but I'll
accept holding it here until it has a user.
I added one extension to allow implicit conversion and CTAD.
Commit: b0668d859b237f6991f416b688cedb7389354fd8
https://github.com/llvm/llvm-project/commit/b0668d859b237f6991f416b688cedb7389354fd8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/sort.h
M libcxx/include/__algorithm/stable_sort.h
M libcxx/include/__functional/reference_wrapper.h
M libcxx/include/__type_traits/desugars_to.h
A libcxx/test/libcxx/type_traits/desugars_to.compile.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/refwrap/desugars_to.compile.pass.cpp
Log Message:
-----------
[libc++] Make sure that __desugars_to isn't tripped up by reference_wrapper, const and ref qualifiers (#132092)
Previously, const and ref qualification on an operation would cause
__desugars_to to report false, which would lead to unnecessary
pessimizations. The same holds for reference_wrapper.
In practice, const and ref qualifications on the operation itself are
not relevant to determining whether an operation desugars to something
else or not, so can be ignored.
We are not stripping volatile qualifiers from operations in this patch
because we feel that this requires additional discussion.
Fixes #129312
Commit: 3bcbb472586fddf66c58011e57e08550d59ea8e5
https://github.com/llvm/llvm-project/commit/3bcbb472586fddf66c58011e57e08550d59ea8e5
Author: Alex Hoppen <ahoppen at apple.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/refactor/Rename.h
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
[clangd] Use `SymbolName` to represent Objective-C selectors (#82061)
This is a cleaner design than using identifier and an optional `Selector`. It also allows rename of Objective-C method names if no declaration is at hand and thus no `Selector` instance can be formed. For example, when finding the ranges to rename based on an index that’s not clangd’s built-in index.
Commit: f7f5aa217a81f2ec036fee765124bd2057531d86
https://github.com/llvm/llvm-project/commit/f7f5aa217a81f2ec036fee765124bd2057531d86
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
[Clang][AMDGPU] Use size_t to compare with npos (#132868)
Fix error
llvm\clang\tools\amdgpu-arch\AMDGPUArchByHIP.cpp(102,29): error: result
of comparison of constant 18446744073709551615 with expression of type
'unsigned int' is always false
[-Werror,-Wtautological-constant-out-of-range-compare]
102 | StringRef VerStr = (Pos == StringRef::npos) ? S : S.substr(Pos +
1);
Commit: b6b40e9ac980518d7270b4ac880496b91efc8ca5
https://github.com/llvm/llvm-project/commit/b6b40e9ac980518d7270b4ac880496b91efc8ca5
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/PAuthGadgetScanner.h
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
M bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
Log Message:
-----------
[BOLT] Gadget scanner: reformulate the state for data-flow analysis (#131898)
In preparation for implementing support for detection of non-protected
call instructions, refine the definition of state which is computed for
each register by data-flow analysis.
Explicitly marking the registers which are known to be trusted at
function entry is crucial for finding non-protected calls. In addition,
it fixes less-common false negatives for pac-ret, such as `ret x1` in
`f_nonx30_ret_non_auted` test case.
Commit: 011a95c5367e55820e134d99446a176d21e32dc8
https://github.com/llvm/llvm-project/commit/011a95c5367e55820e134d99446a176d21e32dc8
Author: Julien Villette <julien.villette at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s
Log Message:
-----------
[MCA] Update of RISCV/SiFive7/instruction-tables-tests.s (#132972)
Fixing MR #130574 after merge in main branch.
Throughput has been updated in between.
Co-authored-by: Julien Villette <julien.villette at sipearl.com>
Commit: 613a077b05b8352a48695be295037306f5fca151
https://github.com/llvm/llvm-project/commit/613a077b05b8352a48695be295037306f5fca151
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
R flang-rt/cmake/clang_gcc_root.cpp
M flang-rt/cmake/quadmath_wrapper.h.in
M flang-rt/lib/quadmath/CMakeLists.txt
M flang/cmake/modules/FlangCommon.cmake
A flang/cmake/quadmath_wrapper.h.in
M flang/lib/Evaluate/CMakeLists.txt
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
Log Message:
-----------
[flang] Generate quadmath_wrapper.h for Flang Evaluate. (#132817)
When building Flang with Clang, we need to do the same quadmath.h
wrapping as we do for flang-rt. I extracted the CMake code
into FlangCommon.cmake, and cleaned up the arguments passing
to execute_process (note that `-###` was treated as `-` in the original
code, because `#` starts a comment). I believe the Clang command
does not require the input source file, so I removed it as well.
Commit: 7a370748c0928b9ccfe26127e54eb3c1a1827d75
https://github.com/llvm/llvm-project/commit/7a370748c0928b9ccfe26127e54eb3c1a1827d75
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/unittests/StdLibTests.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
M clang-tools-extra/modularize/ModularizeUtilities.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/unittests/Analysis/MacroExpansionContextTest.cpp
M clang/unittests/Basic/SourceManagerTest.cpp
M clang/unittests/Lex/HeaderSearchTest.cpp
M clang/unittests/Lex/LexerTest.cpp
M clang/unittests/Lex/ModuleDeclStateTest.cpp
M clang/unittests/Lex/PPCallbacksTest.cpp
M clang/unittests/Lex/PPConditionalDirectiveRecordTest.cpp
M clang/unittests/Lex/PPDependencyDirectivesTest.cpp
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
Log Message:
-----------
[clang][lex] Store non-owning options ref in `HeaderSearch` (#132780)
This makes it so that `CompilerInvocation` can be the only entity that
manages ownership of `HeaderSearchOptions`, making it possible to
implement copy-on-write semantics.
Commit: bdbad3e4320509f632ae8b511d563136343d87d7
https://github.com/llvm/llvm-project/commit/bdbad3e4320509f632ae8b511d563136343d87d7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
Log Message:
-----------
[lldb] Fix build after #132780
Commit: 57f2e76e3010e7b089ebc5dd96aef5966f13b6c5
https://github.com/llvm/llvm-project/commit/57f2e76e3010e7b089ebc5dd96aef5966f13b6c5
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang-tools-extra/modularize/ModuleAssistant.cpp
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
Log Message:
-----------
[clang] Consistently use "load" to refer to populating clang::ModuleMap (#132970)
Now that we have ModuleMapFile.cpp which parses module maps, it's
confusing what ModuleMap::parseModuleMapFile actually does. HeaderSearch
already called this loading a module map, so consistently use that term
in ModuleMap too.
An upcoming patch will allow just parsing a module map without loading
the modules from it.
Commit: 4067581aea299692d37866183b0a535f561892ad
https://github.com/llvm/llvm-project/commit/4067581aea299692d37866183b0a535f561892ad
Author: marius doerner <marius.doerner1 at icloud.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
Log Message:
-----------
[clang] Placement new error when modifying consts (#132460)
Raise an error when placement new is used to modify a const-qualified
variable in a constexpr function.
Fixes #131432
Commit: aacc4e9a38ad93482e6c19a53eefec8406ee1b40
https://github.com/llvm/llvm-project/commit/aacc4e9a38ad93482e6c19a53eefec8406ee1b40
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang-tools-extra/modularize/ModularizeUtilities.cpp
Log Message:
-----------
[modularize] Fix the build
This patch fixes:
clang-tools-extra/modularize/ModularizeUtilities.cpp:293:15: error:
no member named 'parseModuleMapFile' in 'clang::ModuleMap'; did you
mean 'loadModuleMapFile'?
Commit: 535b28444f8e1284583c3771eaf64e1e27bbcb28
https://github.com/llvm/llvm-project/commit/535b28444f8e1284583c3771eaf64e1e27bbcb28
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
A llvm/test/tools/llvm-symbolizer/use-debug-info-line-info.s
Log Message:
-----------
[Symbolize] Always use filename:line from debug info when debug info for the given address is available. (#128619)
To reland https://github.com/llvm/llvm-project/pull/124846, we need to
make symbolizer consistent with the case when line number is 0. Always
using filename and line from debug info even if the line number is 0
sounds like the reasonable path to go.
Commit: 9aecbdf8ed787a8edd1b7f97a1c7fbf6e9d12515
https://github.com/llvm/llvm-project/commit/9aecbdf8ed787a8edd1b7f97a1c7fbf6e9d12515
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][DepScan] Allow ModuleDep to be const (#132968)
This type can be exposed from C APIs, where instantiations of this type
are not expected to mutate after creation. To support this, mark the
lazy computation of build arguments mutable, as that is not intended to
otherwise mutate the state of these objects.
This was reviewed separately by @jansvoboda11
Commit: e7e242e7ad6901e5f4c85d6e5ee4455d6be29b50
https://github.com/llvm/llvm-project/commit/e7e242e7ad6901e5f4c85d6e5ee4455d6be29b50
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/exception.ll
Log Message:
-----------
[MLIR][LLVM] Fix debug value/declare import in face of landing pads (#132871)
Debug value/declare operations imported before landing pad operations at
the bb start break invoke op verification:
```
error: first operation in unwind destination should be a llvm.landingpad operation
```
This this issue by making the placement slightly more smart.
Commit: fd3a6b6005aa591a53fc01e4ed130af369e0c366
https://github.com/llvm/llvm-project/commit/fd3a6b6005aa591a53fc01e4ed130af369e0c366
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
A llvm/test/Analysis/CostModel/NVPTX/inline-asm.ll
A llvm/test/Analysis/CostModel/NVPTX/lit.local.cfg
A llvm/test/CodeGen/NVPTX/nvptx-aa-inline-asm.ll
Log Message:
-----------
[NVPTX] Improve modeling of inline PTX (#130675)
Improve the modeling of the memory effects and instruction cost of
inline assembly.
- MemoryEffects: The CUDA spec states that inline assembly is not
assumed to have any side-effects or read or write to memory. An inline
assembly may be treated as NoModRef unless it is explictly marked as
having side effects or has an explicit memory clobber.
https://docs.nvidia.com/cuda/inline-ptx-assembly/index.html#incorrect-optimization
> Normally any memory that is written to will be specified as an out
operand, but if there is a hidden read or write on user memory (for
example, indirect access of a memory location via an operand), or if you
want to stop any memory optimizations around the asm() statement
performed during generation of PTX, you can add a “memory” clobbers
specification after a 3rd colon.
- InstructionCost: This change implements very rough string parsing
system to count the number of instructions in an inline-asm. There are
corner cases it will not handle well, but in general this is an
improvement over the current cost of the number of arguments plus one.
Commit: a074831cd978659a6025c528c0ca75b8cf46940f
https://github.com/llvm/llvm-project/commit/a074831cd978659a6025c528c0ca75b8cf46940f
Author: Pete Chou <petechou at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
A llvm/test/TableGen/RegisterInfoEmitter-inherit-properties.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Inherit properties from the nearest allocatable superclass. (#127018)
Previously isAlocatable was updated to allow inheritance from any
superclass for a generated register class, but other properties are
still inherited from its nearest superclass. This could cause
a generated regclass inherit undesired properties, e.g., tsflags, from
an unallocatable superclass due to the topological inheritance order.
This change updates to inherit properties from the nearest allocatable
superclass if possible and includes a test to demonstrate a potential
incorrect inheritance of tsflags.
Commit: 577631f0a52884384786bf899951e3094ad7f69c
https://github.com/llvm/llvm-project/commit/577631f0a52884384786bf899951e3094ad7f69c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
Reapply "[VPlan] Add transformation to narrow interleave groups. (#106441)"
This reverts commit ff3e2ba9eb94217f3ad3525dc18b0c7b684e0abf.
The recommmitted version limits to transform to cases where no
interleaving is taking place, to avoid a mis-compile when interleaving.
Original commit message:
This patch adds a new narrowInterleaveGroups transfrom, which tries
convert a plan with interleave groups with VF elements to a plan that
instead replaces the interleave groups with wide loads and stores
processing VF elements.
This effectively is a very simple form of loop-aware SLP, where we
use interleave groups to identify candidates.
This initial version is quite restricted and hopefully serves as a
starting point for how to best model those kinds of transforms.
Depends on https://github.com/llvm/llvm-project/pull/106431.
Fixes https://github.com/llvm/llvm-project/issues/82936.
PR: https://github.com/llvm/llvm-project/pull/106441
Commit: 2f3c93743fc21686158c9ba51da8f25da9a02f9d
https://github.com/llvm/llvm-project/commit/2f3c93743fc21686158c9ba51da8f25da9a02f9d
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/Lowering/binop-bool.cir
A clang/test/CIR/Lowering/binop-fp.cir
A clang/test/CIR/Lowering/binop-overflow.cir
A clang/test/CIR/Lowering/binop-signed-int.cir
A clang/test/CIR/Lowering/binop-unsigned-int.cir
Log Message:
-----------
[CIR] Add binary operators (#132420)
This patch adds upstreams support for BinOp including lvalue
assignments. Note that this does not include ternary ops,
BinOpOverflowOp, pointer arithmetic, ShiftOp and SelectOp which are
required for logical binary operators.
---------
Co-authored-by: Morris Hafner <mhafner at nvidia.com>
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 960615954e4cb3150ae4a479fa7f9d0d17035eea
https://github.com/llvm/llvm-project/commit/960615954e4cb3150ae4a479fa7f9d0d17035eea
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
M clang/test/SemaCXX/member-pointer.cpp
Log Message:
-----------
[clang] fix crash with ADL for member pointers with dependent class (#132977)
Commit: f0b752e921702e5a44327ac5906e50777cd0b29d
https://github.com/llvm/llvm-project/commit/f0b752e921702e5a44327ac5906e50777cd0b29d
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Stop creatng "public" library targets in libc_function. (#132995)
All downstream users are migrated, so we no longer need to produce
"public"/"release" cc_library target for each libc_function macro
invocation. Instead, we only create internal target (for testing), and
some filegroups, which will be picked up by the libc_release_library
invocation.
This allows us to get rid of "weak" argument to libc_function - this
decision is also postponed to libc_release_library configuration.
Fixes #130327.
Commit: df011313cf14a2a0735ed3c56b70c5a145b23213
https://github.com/llvm/llvm-project/commit/df011313cf14a2a0735ed3c56b70c5a145b23213
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
R clang/test/CIR/Lowering/binop-overflow.cir
Log Message:
-----------
[CIR] Remove failing binop test (#133001)
When CIR binop support was commited, it accidentally included a test for
functionality that was removed during the review process
(cir.binop.overflow). This test, of course, fails.
This change removes the failing test. It will be re-added when the
corresponding op is added.
Commit: 542797317ae4e98c8aa9030368d851fc72070f95
https://github.com/llvm/llvm-project/commit/542797317ae4e98c8aa9030368d851fc72070f95
Author: Florian Mayer <fmayer at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
Log Message:
-----------
[NFC] [clang] rename InlinedTrapFuncMap to InlinedSubprogramMap (#132993)
Commit: cec4f423e95710c1f76bbd90ecd1b193b49f8d4b
https://github.com/llvm/llvm-project/commit/cec4f423e95710c1f76bbd90ecd1b193b49f8d4b
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-symbolizer/use-debug-info-line-info.s
Log Message:
-----------
Fix test breakage on https://github.com/llvm/llvm-project/pull/128619/
Commit: 03817f0ec03e594618707466c08608221c840861
https://github.com/llvm/llvm-project/commit/03817f0ec03e594618707466c08608221c840861
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_posix_libcdep.cpp
Log Message:
-----------
[NFC][sanitizer] Clang-format sanitizer_symbolizer_posix_libcdep.cpp (#133011)
Commit: e87921304b392e5247347522aec1c123936d91f1
https://github.com/llvm/llvm-project/commit/e87921304b392e5247347522aec1c123936d91f1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[Vectorize] Avoid repeated hash lookups (NFC) (#132661)
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: e5641f6584c37e1860222c274bb910e9b2257976
https://github.com/llvm/llvm-project/commit/e5641f6584c37e1860222c274bb910e9b2257976
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
Log Message:
-----------
[AMDGPU] Autogen checks for mfma-loop.ll (#133004)
Needed for a RegisterCoalescing patch
Commit: b022f676fc8269d80d48dafb0ee06ec2ecbb1feb
https://github.com/llvm/llvm-project/commit/b022f676fc8269d80d48dafb0ee06ec2ecbb1feb
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M flang/cmake/modules/FlangCommon.cmake
Log Message:
-----------
[flang] Include needed CMake files. (#133012)
`FlangCommon.cmake` uses some CMake macros without including
the corresponding modules. This change makes it self-sufficient.
Commit: 2da4ce8624b382cb6c51feac9bd96c22bb054356
https://github.com/llvm/llvm-project/commit/2da4ce8624b382cb6c51feac9bd96c22bb054356
Author: Emilio Cota <ecg at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/MLIRContext.h
M mlir/lib/IR/AttributeDetail.h
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Pass/PassCrashRecovery.cpp
R mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope-with-crash-reproduction.mlir
R mlir/test/IR/test-builtin-distinct-attrs-with-crash-reproduction.mlir
Log Message:
-----------
Revert "[mlir] Fix DistinctAttributeUniquer deleting attribute storage when crash reproduction is enabled" (#133000)
Reverts llvm/llvm-project#128566. See as well the discussion in
llvm/llvm-project#132935.
Commit: e04d739522f9df450c88bb1ec17cbd39c0babf8f
https://github.com/llvm/llvm-project/commit/e04d739522f9df450c88bb1ec17cbd39c0babf8f
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-symbolizer/use-debug-info-line-info.s
Log Message:
-----------
Fix test breakage on https://github.com/llvm/llvm-project/pull/128619/ (2)
Commit: bff94d774cda03e43aff1cdf6e4945136bbab3d7
https://github.com/llvm/llvm-project/commit/bff94d774cda03e43aff1cdf6e4945136bbab3d7
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/test/CIR/CodeGen/loop.cpp
A clang/test/CIR/Transforms/hoist-allocas.cir
M clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Emit allocas into the proper lexical scope (#132468)
Alloca operations were being emitted into the entry block of the current
function unconditionally, even if the variable they represented was
declared in a different scope. This change upstreams the code for
handling
insertion of the alloca into the proper lexcial scope. It also adds a
CIR-to-CIR transformation to hoist allocas to the function entry block,
which is necessary to produce the expected LLVM IR during lowering.
Commit: d75a40a9c1817ca047dec9cf0e1c0f1fec948e06
https://github.com/llvm/llvm-project/commit/d75a40a9c1817ca047dec9cf0e1c0f1fec948e06
Author: Midhunesh <midhunesh.p at ibm.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_posix_libcdep.cpp
M compiler-rt/test/CMakeLists.txt
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
A compiler-rt/test/sanitizer_common/TestCases/disable_symbolizer_path_search.cpp
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Log Message:
-----------
Add cmake option to enable/disable searching PATH for symbolizer (#129012)
Introduced a cmake option that is disabled by default that suppresses
searching via the PATH variable for a symbolizer. The option will be
enabled for downstream builds where the user will need to specify the
symbolizer path more explicitly, e.g., by using ASAN_SYMBOLIZER_PATH.
Commit: c995db3e3456b422f44f3ad690072bd6359520e3
https://github.com/llvm/llvm-project/commit/c995db3e3456b422f44f3ad690072bd6359520e3
Author: Michael Jones <michaelrj at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libc/src/math/generic/coshf16.cpp
M libc/src/math/generic/sinhf16.cpp
Log Message:
-----------
[libc] Add exceptional values for sinhf16/coshf16 (#133002)
The rounding of the result when using an FMA instruction for hyperbolic
sin/cos on float16 was off by 1 bit for a few cases. This patch adds
extra exceptional cases to handle these.
Commit: 134cb8877e0da3da5c9652c55196f7a1380fb207
https://github.com/llvm/llvm-project/commit/134cb8877e0da3da5c9652c55196f7a1380fb207
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
Log Message:
-----------
[scudo] Use a tryLock in secondary release to OS (#132827)
In the caching part of the secondary path, when about to try to release
memory to the OS, we always wait while acquiring the lock. However, if
multiple threads are attempting this at the same time, all other threads
will likely do nothing when the release call is made. Change the
algorithm to skip the release if there is another release in process.
Also, pull the lock outside the releaseOlderThan function. This is so
that in the store path, we use the tryLock and skip if another thread is
releasing. But in the path where a forced release call is being made,
that call will wait for release to complete which guarantees that all
entries are released when requested.
Commit: af267993a7e102e710d4c29a5253738038e1d2a4
https://github.com/llvm/llvm-project/commit/af267993a7e102e710d4c29a5253738038e1d2a4
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/include/__tuple/tuple_size.h
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_incomplete.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_incomplete.verify.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_structured_bindings.pass.cpp
Log Message:
-----------
[libc++] Re-implement LWG2770 again * 2 (#132598)
1013fe3c0cfd7582e94ef2d4bfd79da7ea1a1289 used to implement LWG2770, but
cb0d4df97490ec2d2b1cdf7574d26b1bc4063599 made LWG2770 unimplemented
again because of CWG2386.
This patch re-implements LWG2770, while keeping the libc++-specific
implementation strategy (which is controversial as noted in LWG4040).
Drive-by:
- Make the test coverage for the controversial part noted in LWG4040
libc++-only.
- Add the previously missed entry for LWG2770 to the documentation.
Commit: 584b24cd6de5fd8bcfefa0b4a57ddbbf58c14af1
https://github.com/llvm/llvm-project/commit/584b24cd6de5fd8bcfefa0b4a57ddbbf58c14af1
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Log Message:
-----------
[NFC][StaticAnalyzer] Rename `NotNullConstraint` & `NotNullBufferConstraint` (#131374)
`NotNullConstraint` is used to check both null and non-null of a pointer.
So the name, which was created originally for just checking non-nullness, becomes less suitable.
The same reason applies to `NotNullBufferConstraint`. This commit renames them.
In addition, messages of the assertions in `describe` and ` describeArgumentValue`
are updated to indicate that these two functions can be called on any constraint
though they were partially implemented for `NotNullConstraint` & `NotNullBufferConstraint`.
Commit: f89129af8adfda5d9071210b771787e36ae8cd96
https://github.com/llvm/llvm-project/commit/f89129af8adfda5d9071210b771787e36ae8cd96
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
A llvm/test/Bitcode/array-bitstride.ll
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/DebugTypeODRUniquingTest.cpp
Log Message:
-----------
Add bit stride to DICompositeType (#131680)
In Ada, an array can be packed and the elements can take less space than
their natural object size. For example, for this type:
type Packed_Array is array (4 .. 8) of Boolean;
pragma pack (Packed_Array);
... each element of the array occupies a single bit, even though the
"natural" size for a Boolean in memory is a byte.
In DWARF, this is represented by putting a DW_AT_bit_stride onto the
array type itself.
This patch adds a bit stride to DICompositeType so that gnat-llvm can
emit DWARF for these sorts of arrays.
Commit: 3fbd0ec7e37d596099e8cdccdb2e390a2fef29c7
https://github.com/llvm/llvm-project/commit/3fbd0ec7e37d596099e8cdccdb2e390a2fef29c7
Author: Peng Xie <helianthus547 at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
A libcxx/test/std/utilities/utility/mem.res/mem.res.monotonic.buffer/mem.res.monotonic.buffer.mem/release_reset_initial_status.pass.cpp
Log Message:
-----------
[libc++] Update the status for LWG3120 (#116772)
The current implementation already have an __initial_descriptor which
saves the initial state. When release() is called, we will reset the
__initial_descriptor.__cur_ pointer.
This patch also updates the status of LWG3120.
Closes #104274
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: f6417f17ba236753250756cbde0d6f045dab47ba
https://github.com/llvm/llvm-project/commit/f6417f17ba236753250756cbde0d6f045dab47ba
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A clang/test/CodeGen/RISCV/issue-129995.cpp
R clang/test/CodeGen/RISCV/pr129995.cc
Log Message:
-----------
[clang][RISCV] Fix RUN line and rename test name for pr129995 (#132676)
ninja check-clang can not detect .cc suffix, so the typo is not
detected.
Commit: 1c8075c6129ae4e61e0d24ea981f61a8128d4d70
https://github.com/llvm/llvm-project/commit/1c8075c6129ae4e61e0d24ea981f61a8128d4d70
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/test/BUILD.gn
Log Message:
-----------
gn build: Port 0d2c55cb9682
Commit: 7a5ce551246affabd081c45b00cad1eda7c10fff
https://github.com/llvm/llvm-project/commit/7a5ce551246affabd081c45b00cad1eda7c10fff
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/VISIT.h
M libc/include/search.yaml
Log Message:
-----------
[libc] Add `VISIT` enum for `search.h` (#132746)
This patch introduces the `VISIT` enum for tree search. Existing tests
ensure the correct generation of headers.
Commit: 40815be30a04c4646d74cf6a70bfa4596846f5a5
https://github.com/llvm/llvm-project/commit/40815be30a04c4646d74cf6a70bfa4596846f5a5
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for st.bulk Op (#131727)
This change adds the `st.bulk` NVVM Op for the `st.bulk` instruction
introduced in ptx8.6 for sm_100.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-st-bulk
Commit: aae37a29688a3f0f9908c8e119c620e9242a3e0b
https://github.com/llvm/llvm-project/commit/aae37a29688a3f0f9908c8e119c620e9242a3e0b
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/MC/LoongArch/Macros/aliases-br.s
Log Message:
-----------
[LoongArch] Allow recognition of `b{lt,gt,le,ge}z` in disassembly (#132620)
This behavior is implemented for GNU Binutils since 2.41, and benefits
the readability of the disassembly output. Do the same for LLVM by
removing the zero weight from the alias definitions respectively.
Commit: 41250541e7253839367ab1219845b19118794d81
https://github.com/llvm/llvm-project/commit/41250541e7253839367ab1219845b19118794d81
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cdb.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_index.py
M clang/bindings/python/tests/cindex/test_location.py
M clang/bindings/python/tests/cindex/test_translation_unit.py
M clang/bindings/python/tests/cindex/test_type.py
Log Message:
-----------
[libclang/python] Change all global variables to CAPS (#132930)
Commit: 69274839c3e78c66173b611ec060d58609653e0f
https://github.com/llvm/llvm-project/commit/69274839c3e78c66173b611ec060d58609653e0f
Author: Amy Huang <akhuang at google.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M libc/src/__support/FPUtil/dyadic_float.h
Log Message:
-----------
Change check for "shift > Type::BITS" to avoid offset greater than total bits. (#133016)
nexttowardf16_test is resulting in calling shift and for some reason not
meeting the invariant where offset is less than bits. Change the if
statement to directly check if shift - 1 meets the conditions.
Commit: 1752d5292c1472cdfecbf3bfeea5040d09cfaa28
https://github.com/llvm/llvm-project/commit/1752d5292c1472cdfecbf3bfeea5040d09cfaa28
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Make RequiredExtensions for intrinsics scalable to more than 32 extensions. NFC (#132895)
We have more than 32 extensions in our downstream and had to change this
type from uint32_t to uint64_t.
To simplify our downstream and make the code more flexible, I propose to
make it an array of uint32_t that we can size based on the number of
extensions. I really wanted to use std::bitset, but we have to print the
bits to a .inc file which can't easily be done with std::bitset.
Commit: ece72e2731350d9840c6446db9276b04d593cc23
https://github.com/llvm/llvm-project/commit/ece72e2731350d9840c6446db9276b04d593cc23
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/test/CodeGen/X86/win32-eh.ll
Log Message:
-----------
[MC,COFF] .safeseh: avoid changeSection (#132624)
The directive temporarily switches to the .sxdata section to emit data,
and then calls `insert`, which makes `CurFrag` out of sync of the
current section. Call push/switch/pop instead.
Related to #132464
Commit: 80d5185bd4288c12e9d5aa0fe2e00f2f4e6397d7
https://github.com/llvm/llvm-project/commit/80d5185bd4288c12e9d5aa0fe2e00f2f4e6397d7
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M compiler-rt/lib/profile/InstrProfilingFile.c
Log Message:
-----------
[PGO][Offload] Don't define GPU entrypoint on Darwin (#132966)
This PR partially reverts 83e180c and instead opts to not define the GPU entry
point on Darwin platforms. Marking `__llvm_write_custom_profile` as used
was causing issues on embedded platforms.
Commit: a8588d8b2a1b82e4a03e130ad63a5018cda62432
https://github.com/llvm/llvm-project/commit/a8588d8b2a1b82e4a03e130ad63a5018cda62432
Author: Mészáros Gergely <maetveis at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
Log Message:
-----------
[CodeGen][NFC] Run SROA on complex range tests (#131925)
... to make them shorter and easier to read. This removes ~2000 lines of
cruft.
Commit: 1940d7816a6025d606983af7493c762461287ee8
https://github.com/llvm/llvm-project/commit/1940d7816a6025d606983af7493c762461287ee8
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/asan/TestCases/Posix/setproctitle.c
Log Message:
-----------
[compiler-rt][sanitizer] setproctitle interception for NetBSD/FreeBSD. (#131648)
Commit: 529feec2bcd8cf9dfef9f4b8edf03bdcf4fd1b42
https://github.com/llvm/llvm-project/commit/529feec2bcd8cf9dfef9f4b8edf03bdcf4fd1b42
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vandn.ll
Log Message:
-----------
[RISCV][test] Add fixed vectors tests for hasAndNot
Commit: ab5de9af4c00cecf166be51f3e93df2762692788
https://github.com/llvm/llvm-project/commit/ab5de9af4c00cecf166be51f3e93df2762692788
Author: Ningning Shi(史宁宁) <shiningning at iscas.ac.cn>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[NFC][X86][ISel] Remove the unused assert (#133029)
The condition of assert is always true, so just remove it.
OptForMinSize means hasMinSize(), which is
hasFnAttribute(Attribute::MinSize).
hasOptSize() is hasFnAttribute(Attribute::OptimizeForSize) ||
hasMinSize().
So, '!hasMinSize() || hasFnAttribute(Attribute::OptimizeForSize) ||
hasMinSize()' is awalys true.
---------------------------------
llvm/include/llvm/IR/Function.h
```
/// Optimize this function for minimum size (-Oz).
bool hasMinSize() const { return hasFnAttribute(Attribute::MinSize); }
/// Optimize this function for size (-Os) or minimum size (-Oz).
bool hasOptSize() const {
return hasFnAttribute(Attribute::OptimizeForSize) || hasMinSize();
}
```
Commit: 0bc2c5b2a4ca49011db27f7e8632d5d5ebc0ef5d
https://github.com/llvm/llvm-project/commit/0bc2c5b2a4ca49011db27f7e8632d5d5ebc0ef5d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
Reapply "[clang][bytecode] Implement __builtin_{wcscmp,wcsncmp} (#132… (#132963)
…723)"
This reverts commit 1e2ad6793ac205607e7c809283cf69e1cc36a69a.
Fix the previous commit on big-endian hosts by _not_ falling through to
the `uint8_t` code path.
Commit: e2202b944b56039498f2445a1c4ff984a6a303ee
https://github.com/llvm/llvm-project/commit/e2202b944b56039498f2445a1c4ff984a6a303ee
Author: David Green <david.green at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/cast.ll
M llvm/test/Analysis/CostModel/AArch64/no-sve-no-neon.ll
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
Log Message:
-----------
[AArch64] Update costs for scalarizing i64->f32 int_to_fp. (#132366)
After #130665 these operations are scalarized to avoid
double-rounding. This updates the cost model to match.
In the future we might be able to use SVE instructions to help, but for
the moment the costs should be higher. Costsize and Latency costs are
not yet expected to be accurate. The vector insert/extract will use the
cost of VectorInsertExtractBaseCost (2 by default).
Commit: 3b2b918813125a7baeb3258648eb7a679a0a9699
https://github.com/llvm/llvm-project/commit/3b2b918813125a7baeb3258648eb7a679a0a9699
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/module.modulemap
Log Message:
-----------
[libc++] Use __detected_or_t to implement __has_iterator_{category,concept}_convertible_to (#124456)
This simplifies the implementation a bit.
Commit: c41926013fd8b23c3d1eca51804a2de36c88433a
https://github.com/llvm/llvm-project/commit/c41926013fd8b23c3d1eca51804a2de36c88433a
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[Serialization] Avoid iterating Dense{Map,Set} to break determinism
in ASTWriter
It is bad to iterate Dense{Map,Set} in ASTWriter. Since the order in
Dense{Map, Set} is not stable. It may cause the produced BMI differ
even if we run the compiler twice without modifying any other thing.
Commit: 322b2fe61e03119ce9ef0ab5481238c011bdf2b9
https://github.com/llvm/llvm-project/commit/322b2fe61e03119ce9ef0ab5481238c011bdf2b9
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/fixed-address-notes.c
M clang/test/Analysis/misc-ps.m
M clang/test/Analysis/pr22954.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[clang][analyzer] Move 'alpha.core.FixedAddressDereference' out of alpha (#132404)
Commit: a2e5932e8b5cc887ecf5c03a6a3281a04d4214d5
https://github.com/llvm/llvm-project/commit/a2e5932e8b5cc887ecf5c03a6a3281a04d4214d5
Author: Martin Storsjö <martin at martin.st>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
R llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
R llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
Revert "[SLP] Make getSameOpcode support interchangeable instructions. (#132887)"
This reverts commit 6e66cfeeaec6f09a4454400e45d690457ecdd3de.
This change causes crashes on compiling some inputs, see
https://github.com/llvm/llvm-project/pull/127450#issuecomment-2752833710
and
https://github.com/llvm/llvm-project/pull/127450#issuecomment-2753375326
for details.
Commit: 73f487d31eeaebff085b12396b16432c4fed78a2
https://github.com/llvm/llvm-project/commit/73f487d31eeaebff085b12396b16432c4fed78a2
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][TosaToLinalg] Fix bugs in PointwiseConverter (#132526)
Commit: cd3798d7ef098c65377feabbd7713b73fd47728b
https://github.com/llvm/llvm-project/commit/cd3798d7ef098c65377feabbd7713b73fd47728b
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-detection.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/TargetParser/AArch64FeatPriorities.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Add feature CSSC and detect on linux platform. (#132727)
Also removes priority bits for unused features predres and ls64.
Added to ACLE with https://github.com/ARM-software/acle/pull/390
Commit: 894b27a74611acffcc24fe03c59be2a2af36ea7f
https://github.com/llvm/llvm-project/commit/894b27a74611acffcc24fe03c59be2a2af36ea7f
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
Log Message:
-----------
[mlir][MemRefToLLVM] Fix crash with unconvertable memory space (#132323)
This PR adds handling when the `memref.alloca` with unconvertable memory
space to prevent a crash. Fixes #131439.
Commit: 29ca03f19a1faf26f30641cb90be29103500883b
https://github.com/llvm/llvm-project/commit/29ca03f19a1faf26f30641cb90be29103500883b
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/docs/LoopTerminology.rst
Log Message:
-----------
[Docs] Fix link in LoopTerminology (NFC) (#131138)
The link should refer to the section of 'phi' Instruction in the
LangRef, but it referred to the subsection of 'fcmp' Instruction.
Replace it with appropriate one.
Commit: a9a83387979a6c6dc0f508fe0b26c8d8fa7f5361
https://github.com/llvm/llvm-project/commit/a9a83387979a6c6dc0f508fe0b26c8d8fa7f5361
Author: Discookie <viktor.cseh at ericsson.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Reland [clang][dataflow] Fix unsupported types always being equal (#131575)
Relands #129502.
Previously when the framework encountered unsupported values (such as
enum classes), they were always treated as equal when comparing with
`==`, regardless of their actual values being different.
Now the two sides are only equal if there's a Value assigned to them.
Added handling for the special case of `nullptr == nullptr`, to preserve
the behavior of untyped `nullptr` having no value.
Commit: 96925fa84c1e9cf4ffb68a7171a4b39d4677702a
https://github.com/llvm/llvm-project/commit/96925fa84c1e9cf4ffb68a7171a4b39d4677702a
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
Log Message:
-----------
[RISCV] Add vector hasAndNot to enable optimizations (#132438)
Enables transforms that emit the VANDN instruction.
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 1a7402d3d831940fc04cc0fb5731239744ce5435
https://github.com/llvm/llvm-project/commit/1a7402d3d831940fc04cc0fb5731239744ce5435
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[NFC][Driver][HIP] Fix mixing `amdgcnspirv` and `gfxXXX` via `--offload-arch` (#133024)
Due to `amdgcnspirv` piggybacking on the HIPAMDToolchain, it loses its
immediately apparent SPIR-Vness, which makes the Driver want to go all
the way to Assembly emmission. This was problematic as we were trying to
`llvm-link` SPIR-V, before trying to translate it. This patch ensures
that we do the right thing and stop at bitcode emission if we are mixing
`amdgcnspirv` and concrete targets.
Commit: 420c056f853d9d5475fc98407ea99b67a11841eb
https://github.com/llvm/llvm-project/commit/420c056f853d9d5475fc98407ea99b67a11841eb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[VPlan] Add ComputeFindLastIVResult opcode (NFC). (#132689)
This moves the logic for computing the FindLastIV reduction result to
its own opcode. A follow-up patch will update the new opcode to also
take the start value, to fix
https://github.com/llvm/llvm-project/issues/126836.
PR: https://github.com/llvm/llvm-project/pull/132689
Commit: a308d421aa96f51e5f7f86f26291a91f6198fbfa
https://github.com/llvm/llvm-project/commit/a308d421aa96f51e5f7f86f26291a91f6198fbfa
Author: Ash Dobrescu <ash.dobrescu at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M bolt/test/indirect-goto-relocs.test
Log Message:
-----------
Remove -no-pie case from indirect-goto-relocs.test (#133067)
This test was added in PR:
https://github.com/llvm/llvm-project/pull/120267. The -no-pie case in
the above mentioned test needs to be removed as subsequent changes have
caused it to fail.
Commit: 38ad0df38c91d8b6655664f205810fb5a7a86b4b
https://github.com/llvm/llvm-project/commit/38ad0df38c91d8b6655664f205810fb5a7a86b4b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] combineEXTRACT_SUBVECTOR - extract from a larger subvector insertion (#132950)
Fold EXTRACT_SUBVECTOR(INSERT_SUBVECTOR(SRC,SUB,C1),C2) ->
INSERT_SUBVECTOR(EXTRACT_SUBVECTOR(SRC,C2),SUB,C1-C2)
This extends the existing fold which required the extract/insert
subvector indices to match - now it will always extract as long as the
original inserted subvector is entirely contained within the extraction.
Helps avoid unnecessary use of 512-bit vectors, and improves the chance
of concatenation folds.
Commit: 6ff3906936e036cb2a4c07baa61b3939fd57e846
https://github.com/llvm/llvm-project/commit/6ff3906936e036cb2a4c07baa61b3939fd57e846
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
Log Message:
-----------
[clang][bytecode] Print more info in Block::dump() (#133062)
Commit: cb7b10c66ef8a62f22a77a1480bba382863fcc90
https://github.com/llvm/llvm-project/commit/cb7b10c66ef8a62f22a77a1480bba382863fcc90
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
A clang/test/AST/ByteCode/codegen-mutable-read.cpp
Log Message:
-----------
[clang][bytecode] Fail on mutable reads from revisited variables (#133064)
When revisiting a variable, we do that by simply calling visitDecl() for
it, which means it will end up with the same EvalID as the rest of the
evaluation - but this way we end up allowing reads from mutable
variables. Disallow that.
Commit: e5129b7e2092c54e503f60cc0ac552c765d5a144
https://github.com/llvm/llvm-project/commit/e5129b7e2092c54e503f60cc0ac552c765d5a144
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[Flang] Implicitly add clang if flang enabled (#123964)
Clang is required to compile Flang. Instead of erroring-out if Clang is
enabled, for convinience implicitly add it to `LLVM_ENABLE_PROJECTS`,
consistent with how the MLIR dependency is handled.
This is motivatated by the discussion on whether flang-rt shoud be enabled implicitly
(https://discourse.llvm.org/t/buildbot-changes-with-llvm-enable-runtimes-flang-rt/83571/2).
Since the answer was yet, clang would have been the only exception of not being
enabled implicitly. Fixed with this commit.
Commit: fed4727187e73c1b61bc65c63a66de58318379fc
https://github.com/llvm/llvm-project/commit/fed4727187e73c1b61bc65c63a66de58318379fc
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Mark maybe_unused variable (#133069)
... to avoid -Wunused-variable warnings/errors when assertions are off.
Commit: 1c9fe8c8af7e473e37e141d36837d196dd9a5256
https://github.com/llvm/llvm-project/commit/1c9fe8c8af7e473e37e141d36837d196dd9a5256
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
Log Message:
-----------
[LV] Optimise users of induction variables in early exit blocks (#130766)
This is the second of two PRs that attempts to improve the IR
generated in the exit blocks of vectorised loops with uncountable
early exits. It follows on from PR #128880. In this PR I am
improving the generated code for users of induction variables in
early exit blocks.
This required using a newly add VPInstruction called
FirstActiveLane, which calculates the index of the first active
predicate in the mask operand.
I have added a new function optimizeEarlyExitInductionUser that
is called from optimizeInductionExitUsers when handling users in
early exit blocks.
Commit: 59c5d531991ca6d3cdd7072a13331dd5b0a5b321
https://github.com/llvm/llvm-project/commit/59c5d531991ca6d3cdd7072a13331dd5b0a5b321
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M lldb/include/lldb/Expression/DWARFExpressionList.h
M lldb/source/Expression/DWARFExpressionList.cpp
Log Message:
-----------
[LLDB][NFC] Replace DWARFUnit with DWARFExpression::Delegate in DWARFExpressionList too (#133049)
This is an update for #131645.
Commit: 23882f09e40a33de95963dbe345450615489b55b
https://github.com/llvm/llvm-project/commit/23882f09e40a33de95963dbe345450615489b55b
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/test/Transforms/Coroutines/coro-materialize.ll
Log Message:
-----------
Fix test/Transforms/Coroutines/coro-materialize.ll
It was using the wrong @llvm.coro.suspend() value in %resume1.
This was found while investigating #130326
Commit: 4775e6d9099467df9363e1a3cd5950cc3d2fde05
https://github.com/llvm/llvm-project/commit/4775e6d9099467df9363e1a3cd5950cc3d2fde05
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
A llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
M llvm/test/CodeGen/X86/isel-sqrt.ll
Log Message:
-----------
[X86][GlobalISel] Added support for G_FSQRT (#132356)
Commit: 66f158d91803875de63d8f2a437ce8ecb22c4141
https://github.com/llvm/llvm-project/commit/66f158d91803875de63d8f2a437ce8ecb22c4141
Author: dianqk <dianqk at dianqk.net>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
Log Message:
-----------
[TailDuplicator] Determine if computed gotos using `blockaddress` (#132536)
Using `blockaddress` should be more reliable than determining if an
operand comes from a jump table index.
Alternative: Add the `MachineInstr::MIFlag::ComputedGoto` flag when
lowering `indirectbr`. But I don't think this approach is suitable to
backport.
Commit: 15f5a7a3ec71c624cea0cbdf02e3c5205ba81d9d
https://github.com/llvm/llvm-project/commit/15f5a7a3ec71c624cea0cbdf02e3c5205ba81d9d
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
Log Message:
-----------
[MLIR][NVGPU] Use `gpu.dynamic_shared_memory` in tests (#133051)
The `memref.subview` ops in the test case were incorrect: they extracted
out-of-bounds.
Commit: 1b07e865a1f9da64c75cc409a969b108b201fe80
https://github.com/llvm/llvm-project/commit/1b07e865a1f9da64c75cc409a969b108b201fe80
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
R llvm/test/MC/AArch64/SME2/st1b
Log Message:
-----------
[AArch64][SME][NFC]Remove wrong st1b file added to test (#132969)
By mistake the file stb1 was added. This file is not running in the
tests I believe because it has not extension.
It has the same content as st1b.s
Commit: 75f810e02566f1d73d32a08257318ffdc4223140
https://github.com/llvm/llvm-project/commit/75f810e02566f1d73d32a08257318ffdc4223140
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload] Guard HSA implicit arguments if they aren't created (#133073)
Summary:
We conditionally allocate the implicit arguments, so they possibly are
null. The flang compiler seems to hit this case, even though it
shouldn't when it's supposed to conform to the HSA code object. For now
guard this to fix the regression and cover a case in the future where
someone rolls a fully custom implementatation.
Fixes: https://github.com/llvm/llvm-project/issues/132982
Commit: 719b029c16eeb1035da522fd641dfcc4cee6be74
https://github.com/llvm/llvm-project/commit/719b029c16eeb1035da522fd641dfcc4cee6be74
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
Log Message:
-----------
[AMDGPU][NPM] Port SILateBranchLowering to NPM (#130063)
Commit: 858f9053c54e2ab2d8b3352e632d73c3b483e570
https://github.com/llvm/llvm-project/commit/858f9053c54e2ab2d8b3352e632d73c3b483e570
Author: Patryk Wychowaniec <pwychowaniec at pm.me>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AVR/branch-relaxation-long-backward.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-forward.ll
Log Message:
-----------
[AVR][NFC] Simplify branch relaxation tests (#131871)
Let's use the `.space` directive to simplify AVR's branch relaxation
tests, as noticed by @MaskRay at
https://github.com/llvm/llvm-project/pull/118015#issuecomment-2728254164.
Having `.space 4100` instead of `.space 4096` is little bit awkward, but
I'd rather avoid changing two things at once (i.e. current assertions
are fine).
Commit: 1db206d1c8d48c107a2e29a1bf6ba2768df2ef7d
https://github.com/llvm/llvm-project/commit/1db206d1c8d48c107a2e29a1bf6ba2768df2ef7d
Author: Ben Shi <2283975856 at qq.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/test/CodeGen/AVR/hardware-mul.ll
M llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
A llvm/test/CodeGen/AVR/issue-132203.ll
Log Message:
-----------
[AVR] Fix a bug in selection of ANY_EXTEND (#132398)
This is a walk around solution of
https://github.com/llvm/llvm-project/issues/132203
Commit: e376f3129ae90e20b6629f8554872990daa0b2fb
https://github.com/llvm/llvm-project/commit/e376f3129ae90e20b6629f8554872990daa0b2fb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Make RPC allocation size query constexpr
Summary:
Let this be used for a static array.
Commit: a1a74c9e80f983c01587bb86523e4e8b83e87d42
https://github.com/llvm/llvm-project/commit/a1a74c9e80f983c01587bb86523e4e8b83e87d42
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/Hexagon.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/PPC.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/CodeGen/TargetBuiltins/SystemZ.cpp
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
Log Message:
-----------
[NFC][clang] Remove superfluous header files after refactor in #132252 (#132495)
Remove superfluous header files after refactor in #132252
Commit: e78eef2b6bd8932215bc47ca7a6561dea19a33f0
https://github.com/llvm/llvm-project/commit/e78eef2b6bd8932215bc47ca7a6561dea19a33f0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86CmovConversion.cpp
Log Message:
-----------
[X86] Use hasSingleElement (NFC) (#133040)
Commit: 40d251db4a58df37e356a10d94db2263c5f60d4b
https://github.com/llvm/llvm-project/commit/40d251db4a58df37e356a10d94db2263c5f60d4b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Utils/LockstepReverseIterator.h
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/IR/Assumptions.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/tools/bugpoint/CrashDebugger.cpp
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp
Log Message:
-----------
[llvm] Use *Set::insert_range (NFC) (#133041)
We can use *Set::insert_range to collapse:
for (auto Elem : Range)
Set.insert(E);
down to:
Set.insert_range(Range);
In some cases, we can further fold that into the set declaration.
Commit: 1cc07a0865c1828792fbc7427d175c4ce753a27d
https://github.com/llvm/llvm-project/commit/1cc07a0865c1828792fbc7427d175c4ce753a27d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/lib/Analysis/Liveness.cpp
M mlir/lib/Analysis/TopologicalSortUtils.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVEnums.cpp
M mlir/lib/Dialect/SPIRV/IR/TargetAndABI.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/InliningUtils.cpp
Log Message:
-----------
[mlir] Use *Set::insert_range (NFC) (#133043)
We can use *Set::insert_range to collapse:
for (auto Elem : Range)
Set.insert(E);
down to:
Set.insert_range(Range);
In some cases, we can further fold that into the set declaration.
Commit: c3e08c8f07ded9ef0d1ad2f3fb04e98d839479b1
https://github.com/llvm/llvm-project/commit/c3e08c8f07ded9ef0d1ad2f3fb04e98d839479b1
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_compat_overloads.h
M clang/test/CodeGenHLSL/builtins/acos.hlsl
M clang/test/CodeGenHLSL/builtins/asin.hlsl
M clang/test/CodeGenHLSL/builtins/atan.hlsl
M clang/test/CodeGenHLSL/builtins/atan2.hlsl
M clang/test/CodeGenHLSL/builtins/ceil.hlsl
M clang/test/CodeGenHLSL/builtins/cos.hlsl
M clang/test/CodeGenHLSL/builtins/cosh.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
M clang/test/CodeGenHLSL/builtins/floor.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/lerp.hlsl
M clang/test/CodeGenHLSL/builtins/log.hlsl
M clang/test/CodeGenHLSL/builtins/log10.hlsl
M clang/test/CodeGenHLSL/builtins/log2.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/pow.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
M clang/test/CodeGenHLSL/builtins/sin.hlsl
M clang/test/CodeGenHLSL/builtins/sinh.hlsl
M clang/test/CodeGenHLSL/builtins/sqrt.hlsl
M clang/test/CodeGenHLSL/builtins/step.hlsl
M clang/test/CodeGenHLSL/builtins/tan.hlsl
M clang/test/CodeGenHLSL/builtins/tanh.hlsl
M clang/test/CodeGenHLSL/builtins/trunc.hlsl
Log Message:
-----------
[HLSL] Add new double overloads for math builtins (#132979)
Add double overloads which cast the double to a float and call the float
builtin.
Makes these double overloads conditional on hlsl version 202x or
earlier.
Add tests
Closes #128228
Commit: 6dd14c881cd6dbe76a73b60ab7eabf95f92271c4
https://github.com/llvm/llvm-project/commit/6dd14c881cd6dbe76a73b60ab7eabf95f92271c4
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
A llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
Log Message:
-----------
MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as first (#133068)
So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.
---------
Co-authored-by: qethu <190734095+qethu at users.noreply.github.com>
Commit: b55dd8f607dab5b122e09836022a37ef10c8c653
https://github.com/llvm/llvm-project/commit/b55dd8f607dab5b122e09836022a37ef10c8c653
Author: flovent <144676429+flovent at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/Analysis/issue-91835.cpp
A clang/test/Analysis/lambda-capture-structured-binding.cpp
Log Message:
-----------
[clang][analyzer] Correctly handle structured bindings captured by lambda (#132579)
this PR fixes #91835.
For `DeclRefExpr` in lambda's function body, it will references to
original variable declaration in AST rather than `FieldDecl` for lambda
class, so it's needed to find the corresponding `FieldDecl` and bind
`DeclRefExpr`'s value to it.
This is already implemented for variables that are not in a structured
binding structure, so I extracted that part of the code so that it can
be used in the structured binding case.
Commit: 1f291acc972c2057de2eba4554988bfdc4f33dca
https://github.com/llvm/llvm-project/commit/1f291acc972c2057de2eba4554988bfdc4f33dca
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h
Log Message:
-----------
Revert "[ExecutionEngine] Avoid repeated hash lookups (NFC)" (#133101)
Reverts llvm/llvm-project#132587
Due to causing test failures on several of Linaro's buildbots. Several
MLIR test failures and at least one test timing out.
I doubt it's the patch itself, but instead an issue it has uncovered.
Revert while we dig into that.
Commit: 99e8321953a047a2994639df3df496cab779e199
https://github.com/llvm/llvm-project/commit/99e8321953a047a2994639df3df496cab779e199
Author: Abhinav Kumar <96587705+kr-2003 at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/test/Analysis/cxx-uninitialized-object.cpp
Log Message:
-----------
[clang][analyzer] Ignore unnamed bitfields in UninitializedObjectChecker (#132427)
Fixes #132001
Co-authored-by: YLChenZ <chentongyongcz at gmail.com>
Commit: af663155e61fc4398160c1d05c54397327a10182
https://github.com/llvm/llvm-project/commit/af663155e61fc4398160c1d05c54397327a10182
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Reduce control flow complexity in foldMemoryOperandImpl [nfc]
Use a helper function so we can use early return.
Commit: c0cce437395063ed9f58b8d4138280d1008bc79b
https://github.com/llvm/llvm-project/commit/c0cce437395063ed9f58b8d4138280d1008bc79b
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/test/Driver/aarch64-mcpu-native.c
M clang/test/Driver/print-enabled-extensions/aarch64-grace.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[AArch64] Add FEAT_FPAC to Neoverse V2 (#133054)
This feature is implemented in the Neoverse V2 core, but wasn't specified
in the CPU definition.
Commit: 3f82c3d5a8e48010c56a1ce8f13fae2d8bbe490b
https://github.com/llvm/llvm-project/commit/3f82c3d5a8e48010c56a1ce8f13fae2d8bbe490b
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
Log Message:
-----------
Revert "[MLIR][NVGPU] Use `gpu.dynamic_shared_memory` in tests" (#133103)
Reverts llvm/llvm-project#133051 due to failing integration tests
Commit: 52f941adbc2815487a0582ffedf3fb8cebe9cedd
https://github.com/llvm/llvm-project/commit/52f941adbc2815487a0582ffedf3fb8cebe9cedd
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
Log Message:
-----------
[mlir][tosa] Fix '-Wreturn-type'. NFC
Commit: 236f938ef65cc9028801303bb0bd914afca37836
https://github.com/llvm/llvm-project/commit/236f938ef65cc9028801303bb0bd914afca37836
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[CodeGen] Provide a target independent default for optimizeLoadInst [NFC]
This just moves the x86 implementation into generic code since it appears
to be suitable for any target. The heart of this transform is inside
foldMemoryOperand so other targets won't actually kick in until they
implement said API. This just removes one piece to implement in the
process of enabling foldMemoryOperand.
Commit: 6ecc67fb3223fbc641560596a4811da371dc6c4b
https://github.com/llvm/llvm-project/commit/6ecc67fb3223fbc641560596a4811da371dc6c4b
Author: AnastasiyaChernikova <anastasiya.chernikova at syntacore.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/mcpu_not_set_during_cross_compilation.s
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
Log Message:
-----------
[Exegesis] CPU selection, when native arch and target mismatch (#131014)
Commit: ac8e18cdcecbef0c1e5080aec4ad655f61b1a249
https://github.com/llvm/llvm-project/commit/ac8e18cdcecbef0c1e5080aec4ad655f61b1a249
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/test/MC/AArch64/coff-relocations-diags.s
Log Message:
-----------
[AArch64] Rename VariantKind to Specifier
Follow the naming of most other backends.
> "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
> "Relocation specifier" is clear, aligns with Arm and IBM AIX's documentation, and fits the assembler's role seamlessly.
In addition, rename `AArch64MCExpr::Kind` and `getKind`, which confusingly shadow the base class `Kind` and `getKind`.
DarwinRefKind, which still uses MCSymbolRefExpr::VariantKind, is not renamed.
Pull Request: https://github.com/llvm/llvm-project/pull/132595
Commit: 649cbcc3764c554c9c9839f021d073fa9a9f0515
https://github.com/llvm/llvm-project/commit/649cbcc3764c554c9c9839f021d073fa9a9f0515
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/include/__bit_reference
M libcxx/include/bitset
Log Message:
-----------
[libc++] Remove unnecessary division and modulo operations in bitset (#121312)
The PR removes the unnecessary division and modulo operations in the
one-word specialization `__bitset<1, _Size>`. The reason is that for the
one-word specialization, we have `__pos < __bits_per_word` (as
`__bitset<1, _Size>` is an implementation detail only used by the public
`bitset`). So `__pos / __bits_per_word == 0` and `__pos / __pos %
__bits_per_word == __pos`.
Commit: 529c5b71c608c18141432e6fd0ae89242d5f309d
https://github.com/llvm/llvm-project/commit/529c5b71c608c18141432e6fd0ae89242d5f309d
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/slp-vectorize.f90
Log Message:
-----------
[flang] Add -f[no-]slp-vectorize flags (#132801)
Add -f[no-]slp-vectorize to the flang driver.
Add corresponding -fvectorize-slp to the flang frontend.
Enable -fslp-vectorize at -O2 and higher in flang to match the current
behaviour in clang.
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: e6dda9c23a1a91d1da39f43b0de735ca85961220
https://github.com/llvm/llvm-project/commit/e6dda9c23a1a91d1da39f43b0de735ca85961220
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Only create shared memory global when needed (#132999)
Commit: 7563e31127615876b02d13c3d5cf02207adfd073
https://github.com/llvm/llvm-project/commit/7563e31127615876b02d13c3d5cf02207adfd073
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/int-to-bool.cpp
M clang/test/CIR/Lowering/cast.cir
Log Message:
-----------
[CIR] Implement lowering of int-to-bool casts (#132996)
Lowering of int-to-bool casts had been left as NYI because the incubator
implemented it by lowering to cir.cmp, which hasn't been upstreamed yet,
but there is no reason this cast can't be lowered directly to LLVM's
compare operation when we're lowering directly to the LLVM dialect.
This change lowers the cast directly to an LLVM compare to zero.
Commit: 672c51c9cba82c2a316c3199b399bfcfec217f87
https://github.com/llvm/llvm-project/commit/672c51c9cba82c2a316c3199b399bfcfec217f87
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/rotate-add.ll
A llvm/test/CodeGen/ARM/rotate-add.ll
A llvm/test/CodeGen/NVPTX/rotate-add.ll
A llvm/test/CodeGen/X86/rotate-add.ll
Log Message:
-----------
[SDAG][tests] add some test cases covering an add-based rotate (#132842)
Add tests to various targets covering rotate idioms where an 'ADD' node
is used to combine the halves instead of an 'OR'. Some of these cases
will be better optimized following #125612, while others are already
well optimized or do not have a valid fold to a rotate or funnel-shift.
Commit: 03eb8258406b9684c44debc873f038a8779a8a09
https://github.com/llvm/llvm-project/commit/03eb8258406b9684c44debc873f038a8779a8a09
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M compiler-rt/test/profile/instrprof-darwin-dead-strip.c
Log Message:
-----------
[compiler-rt][Darwin][x86] Fix instrprof-darwin-dead-strip test (#132874)
ld issues a warning about section alignment on x86. Explicitly setting
the alignment fixes that.
Commit: 074af0f30f8efb237cf9afe4bfb83769fa181d86
https://github.com/llvm/llvm-project/commit/074af0f30f8efb237cf9afe4bfb83769fa181d86
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Options.td
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
A lld/test/ELF/why-live.test
Log Message:
-----------
[lld][ELF] Add --why-live flag (inspired by Mach-O) (#127112)
This prints a stack of reasons that symbols that match the given glob(s)
survived GC. It has no effect unless section GC occurs.
This implementation does not require -ffunction-sections or
-fdata-sections to produce readable results, althought it does tend to
work better (as does GC).
Details about the semantics:
- Some chain of liveness reasons is reported; it isn't specified which
chain.
- A symbol or section may be live:
- Intrisically (e.g., entry point)
- Because needed by a live symbol or section
- (Symbols only) Because part of a section live for another reason
- (Sections only) Because they contain a live symbol
- Both global and local symbols (`STB_LOCAL`) are supported.
- References to symbol + offset are considered to point to:
- If the referenced symbol is a section (`STT_SECTION`):
- If a sized symbol encloses the referenced offset, the enclosing
symbol.
- Otherwise, the section itself, generically.
- Otherwise, the referenced symbol.
Commit: 54cc4141e4e3707de88a6bb3fa8e62dccc27b66c
https://github.com/llvm/llvm-project/commit/54cc4141e4e3707de88a6bb3fa8e62dccc27b66c
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
R llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/lib/Target/SPIRV/SPIRVIRMapping.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
A llvm/test/CodeGen/SPIRV/GroupAndSubgroupInstructions.spvasm
M llvm/test/CodeGen/SPIRV/SampledImageRetType.ll
M llvm/test/CodeGen/SPIRV/atomicrmw.ll
M llvm/test/CodeGen/SPIRV/const-array-in-struct.ll
M llvm/test/CodeGen/SPIRV/const-composite.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_checked.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-composite.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-type-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/inline/type.ll
M llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
M llvm/test/CodeGen/SPIRV/literals.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-comparison.ll.bak
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/smul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/usub.with.overflow.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/pointers/array-skips-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-eq-types.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/scoped_atomicrmw.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
A llvm/test/CodeGen/SPIRV/store-bool.ll
M llvm/test/CodeGen/SPIRV/struct.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchangeExplicit_cl20.ll
M llvm/test/CodeGen/SPIRV/transcoding/BuildNDRange.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorInsertDynamic_i16.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_legacy.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_work_item_fence.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/barrier.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/work_group_barrier.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/transcoding/group_ops.ll
M llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_clustered_reduce.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_extended_types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle_relative.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Rework duplicate tracker and tracking of IR entities and types to improve compile-time performance (#130605)
This PR is to thoroughly rework duplicate tracker implementation and
tracking of IR entities and types. These are legacy parts of the project
resulting in an extremely bloated intermediate representation and
computational delays due to inefficient data flow and structure choices.
Main results of the rework:
1) Improved compile-time performance. The reference binary LLVM IR used
to measure speed gains in
https://github.com/llvm/llvm-project/pull/120415 shows ~x5 speed up also
after this PR. The timing before this PR is ~42s and after this PR it's
~7.5s. In total this PR and the previous overhaul of the module analysis
in https://github.com/llvm/llvm-project/pull/120415 results in ~x25
speed improvement.
```
$ time llc -O0 -mtriple=spirv64v1.6-unknown-unknown _group_barrier_phi.bc -o 1 --filetype=obj
real 0m7.545s
user 0m6.685s
sys 0m0.859s
```
2) Less bloated intermediate representation of internal translation
steps. Elimination of `spv_track_constant` intrinsic usage for scalar
constants, rework of `spv_assign_name`, removal of the gMIR `GET_XXX`
pseudo code and a smaller number of generated `ASSIGN_TYPE` pseudo codes
substantially decrease volume of data generated during translation.
3) Simpler code and easier maintenance. The duplicate tracker
implementation is simplified, as well as other features.
4) Numerous fixes of issues and logical flaws in different passes. The
main achievement is rework of the duplicate tracker itself that had
never guaranteed a correct caching of LLVM IR entities, rarely and
randomly returning stale/incorrect records (like, remove an instruction
from gMIR but still refer to it). Other fixes comprise consistent
generation of OpConstantNull, assigning types to newly created
registers, creation of integer/bool types, and other minor fixes.
5) Numerous fixes of LIT tests: mainly CHECK-DAG to properly reflect
SPIR-V spec guarantees, `{{$}}` at the end of constants to avoid
matching of substrings, and XFAILS for `SPV_INTEL_long_composites` test
cases, because the feature is not completed in full yet and doesn't
generate a requested by the extension sequence of instructions.
6) New test cases are added.
Commit: e8dfd70fe2490649c600b1f4cf439a89d65f2d0f
https://github.com/llvm/llvm-project/commit/e8dfd70fe2490649c600b1f4cf439a89d65f2d0f
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
Log Message:
-----------
[MLIR][NVGPU] Use `gpu.dynamic_shared_memory` in tests (#133122)
Reland #133051
Commit: 9269aaecffb7050dddbbe5d17ddd9f3ca2e577f0
https://github.com/llvm/llvm-project/commit/9269aaecffb7050dddbbe5d17ddd9f3ca2e577f0
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/test/Dialect/Tensor/mesh-spmdization.mlir
Log Message:
-----------
[mlir][mesh] fixes for 0d tensors (#132948)
In some cases 0d tensors have no sharding. This PR provides a few minor
fixes to account for such cases.
Commit: 4cabee35b76b01760be89fa3943464ed92fb9666
https://github.com/llvm/llvm-project/commit/4cabee35b76b01760be89fa3943464ed92fb9666
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/test/Driver/slp-vectorize.f90
Log Message:
-----------
[flang] Fix slp-vectorize.f90 test (#133128)
The test was missing "-o /dev/null" and inadvertently generating a .ll
file in the test directory.
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: 96d1baedefc3581b53bc4389bb171760bec6f191
https://github.com/llvm/llvm-project/commit/96d1baedefc3581b53bc4389bb171760bec6f191
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang-rt/README.md
M flang/CMakeLists.txt
R flang/cmake/modules/AddFlangOffloadRuntime.cmake
M flang/examples/CMakeLists.txt
R flang/examples/ExternalHelloWorld/CMakeLists.txt
R flang/runtime/CMakeLists.txt
R flang/runtime/CUDA/CMakeLists.txt
R flang/runtime/Float128Math/CMakeLists.txt
M flang/test/CMakeLists.txt
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/f18/CMakeLists.txt
M flang/unittests/CMakeLists.txt
M flang/unittests/Evaluate/CMakeLists.txt
R flang/unittests/Runtime/CMakeLists.txt
R flang/unittests/Runtime/CUDA/CMakeLists.txt
M llvm/CMakeLists.txt
Log Message:
-----------
[Flang] Remove FLANG_INCLUDE_RUNTIME (#124126)
Remove the FLANG_INCLUDE_RUNTIME option which was replaced by
LLVM_ENABLE_RUNTIMES=flang-rt.
The FLANG_INCLUDE_RUNTIME option was added in #122336 which disables the
non-runtimes build instructions for the Flang runtime so they do not
conflict with the LLVM_ENABLE_RUNTIMES=flang-rt option added in #110217.
In order to not maintain multiple build instructions for the same thing,
this PR completely removes the old build instructions (effectively
forcing FLANG_INCLUDE_RUNTIME=OFF).
As per discussion in
https://discourse.llvm.org/t/buildbot-changes-with-llvm-enable-runtimes-flang-rt/83571/2
we now implicitly add LLVM_ENABLE_RUNTIMES=flang-rt whenever Flang is
compiled in a bootstrapping (non-standalone) build. Because it is
possible to build Flang-RT separately, this behavior can be disabled
using `-DFLANG_ENABLE_FLANG_RT=OFF`. Also see the discussion an
implicitly adding runtimes/projects in #123964.
Commit: 3e59b00eb596c9d4aa5e1511babf62082996ca8d
https://github.com/llvm/llvm-project/commit/3e59b00eb596c9d4aa5e1511babf62082996ca8d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/utils/ci/BOT_OWNERS.txt
Log Message:
-----------
[libc++] Add GitHub usernames for Linaro managed bots (#133120)
This isn't the whole team, but enough that one of us will see it and
make sure the right person sees it.
Noted explicitly that Picolibc is also our responsiblity as it's not
always clear that that is tested on Arm.
Commit: 0106e5ad91d7b7d9045e82f2eb7319ab0f74d27a
https://github.com/llvm/llvm-project/commit/0106e5ad91d7b7d9045e82f2eb7319ab0f74d27a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libc/startup/gpu/CMakeLists.txt
Log Message:
-----------
[libc] Temporarily disable LTO flags for AMDGPU crt1.o
Summary:
Some recent changes seem to have introduced a bug that breaks this. Turn
it off while I triage it.
Commit: 545ea0dd378912d588550a79728cc98cd4dbaa24
https://github.com/llvm/llvm-project/commit/545ea0dd378912d588550a79728cc98cd4dbaa24
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
Log Message:
-----------
[mlir][mesh] fixes for 0d tensors (#132948)
Accounting for cases where 0d tensors have no sharding (like scalars).
Commit: 27539c3f903be26c487703943d3c27d45d4542b2
https://github.com/llvm/llvm-project/commit/27539c3f903be26c487703943d3c27d45d4542b2
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang-rt/README.md
M flang/CMakeLists.txt
A flang/cmake/modules/AddFlangOffloadRuntime.cmake
M flang/examples/CMakeLists.txt
A flang/examples/ExternalHelloWorld/CMakeLists.txt
A flang/runtime/CMakeLists.txt
A flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/Float128Math/CMakeLists.txt
M flang/test/CMakeLists.txt
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/f18/CMakeLists.txt
M flang/unittests/CMakeLists.txt
M flang/unittests/Evaluate/CMakeLists.txt
A flang/unittests/Runtime/CMakeLists.txt
A flang/unittests/Runtime/CUDA/CMakeLists.txt
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "[Flang] Remove FLANG_INCLUDE_RUNTIME (#124126)"
The production buildbot master apparently has not yet been restarted
since https://github.com/llvm/llvm-zorg/pull/393 landed.
This reverts commit 96d1baedefc3581b53bc4389bb171760bec6f191.
Commit: 6a371c7744c276c872fec4947f1642789e5b24ec
https://github.com/llvm/llvm-project/commit/6a371c7744c276c872fec4947f1642789e5b24ec
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/option-exact-inlineasm.ll
A llvm/test/MC/RISCV/option-exact.s
M llvm/test/MC/RISCV/option-invalid.s
Log Message:
-----------
[RISCV] Support .option {no}exact (#122483)
This implements [the `.option exact` and `.option noexact`
proposal](https://github.com/riscv-non-isa/riscv-asm-manual/pull/122)
for RISC-V.
`.option exact` turns off:
- Compression
- Branch Relaxation
- Linker Relaxation
`.option noexact` turns these back on, and is also the default, matching
the current behaviour.
Commit: a80aad28123101539134c277c6904905016754ca
https://github.com/llvm/llvm-project/commit/a80aad28123101539134c277c6904905016754ca
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Support/YAMLTraits.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/Generic/MIRStripDebug/no-metadata-present.mir
M llvm/test/CodeGen/MIR/AArch64/empty-MF.mir
M llvm/test/tools/obj2yaml/Minidump/basic.yaml
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
[YAML] fix output incorrect format for block scalar string (#132897)
After outputting block scalar string, the indent will be wrong.
This patch fixes Padding after block scalar string to ensure the correct
format of yaml.
The new added ut will fail in main.
```diff
@@ -3,4 +3,4 @@
Just a block
scalar doc
-scalar: a
+ scalar: a
...\n
```
Commit: 6d1184d05ffe3872ce5ea186c0cd3085219aae07
https://github.com/llvm/llvm-project/commit/6d1184d05ffe3872ce5ea186c0cd3085219aae07
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Organize emit functions in CIRGenFunction.h (#133017)
To make rebasing the incubator project easier, we've been trying to
place upstreamed code in the same order in which it appears in the
incubator project. However, while the upstream implementation is still
relatively sparse, it is often difficult to find points of reference for
placement of new declarations. To help with that, I refactored
CIRGenFunction.h in the incubator to put all the emit* functions in one
place and sort them alphabetically.
This change reorganizes the upstream CIRGenFunction.h to match the new
incubator ordering.
Commit: a942d7f8106226ba79185e60873c0e0e654f1e68
https://github.com/llvm/llvm-project/commit/a942d7f8106226ba79185e60873c0e0e654f1e68
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaCXX/member-pointer.cpp
M clang/test/SemaTemplate/instantiation-backtrace.cpp
Log Message:
-----------
[clang] fix deduction of member pointers with dependent named classes (#133113)
This fixes a regression when interpreting a nested name specifier for
deduction purposes in member pointers.
This introduces a helper for fully translating a nested name specifier
into a type.
This regression was introduced here:
https://github.com/llvm/llvm-project/pull/130537
and was reported here:
https://github.com/llvm/llvm-project/pull/132401#issuecomment-2751489581
No release notes, since this regression was never released.
Commit: d2a7a249c567cb170f22fe6e932896f9298b581d
https://github.com/llvm/llvm-project/commit/d2a7a249c567cb170f22fe6e932896f9298b581d
Author: Matthias Braun <matze at braunis.de>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Add __attribute__((retain)) to LLVM_DUMP_METHOD (#133025)
Without the retain attribute the dump functions will be stripped when
LLVM is compiled with `-ffunction-section -Wl,--gc-sections` on
ELF-based systems.
Commit: 1876a89b259b04af28ca0ffbcff36d5e9e2eb71a
https://github.com/llvm/llvm-project/commit/1876a89b259b04af28ca0ffbcff36d5e9e2eb71a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/mcpu_not_set_during_cross_compilation.s
Log Message:
-----------
[llvm-exegesis] Require RISCV Target for new test
This test was causing buildbot failures because it requires both the
RISCV and X86 targets to be enabled to run successfully. It already
requires the X86 target by virtue of being in the X86/ test directory,
but failed to require the RISCV target, which this patch corrects.
Commit: 25c5bad2f26e96a44b84765bedd82ee9bcffd22c
https://github.com/llvm/llvm-project/commit/25c5bad2f26e96a44b84765bedd82ee9bcffd22c
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/splat-vectors.ll
Log Message:
-----------
[RISCV] Check the legality of source vector types in matchSplatAsGather (#133028)
When we're trying to lower `extractelement + splat` with
vrgather.vi/.vx, we should also check the legality of source vector type
from `extractelement`, as the entire transformation assumes legal types.
Fixes #133020
Commit: f3991e10bb0aa8cd6a72e9ebd8112b2030c67f13
https://github.com/llvm/llvm-project/commit/f3991e10bb0aa8cd6a72e9ebd8112b2030c67f13
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Preprocessing/kind-suffix.F90
Log Message:
-----------
[flang] Allow macro replacement in numeric kind suffix (#132120)
When a numeric value has a kind suffix containing an identifier, allow
macro replacement for that identifier by treating it as its own token.
Fixes https://github.com/llvm/llvm-project/issues/131548.
Commit: 38207a52a701f8c2b77087450b277e7debd8fe73
https://github.com/llvm/llvm-project/commit/38207a52a701f8c2b77087450b277e7debd8fe73
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-coarray.cpp
A flang/test/Semantics/sync-images.f90
Log Message:
-----------
[flang] Test SYNC IMAGES, increase checking (#132279)
Add a test for the SYNC IMAGES statement, and add a check for invalid
image numbers.
Commit: 4ea5aa09deba468b250bebf3614e2a0cc57ec4b6
https://github.com/llvm/llvm-project/commit/4ea5aa09deba468b250bebf3614e2a0cc57ec4b6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/unittests/Runtime/ExternalIOTest.cpp
M flang-rt/unittests/Runtime/ListInputTest.cpp
M flang-rt/unittests/Runtime/LogicalFormatTest.cpp
M flang-rt/unittests/Runtime/Namelist.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang-rt/unittests/Runtime/RuntimeCrashTest.cpp
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
R flang/include/flang/Runtime/io-api-consts.h
M flang/include/flang/Runtime/io-api.h
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
Log Message:
-----------
[flang][NFC] Restore I/O runtime API header name (#132423)
flang/include/flang/Runtime/io-api.h was changed into io-api-consts.h,
then wrapped into a new io-api.h that includes io-api-consts.h, does
some redundant includes and declarations, and then declares the
prototype of one function, InquiryKeywordHashDecode.
Make that function static in io-stmt.cpp prior to its sole call site,
then undo the renaming, to reduce confusion and redundancy.
Commit: 6df27dd42d827a2468dcf4b4b1ee1a8e8af1a408
https://github.com/llvm/llvm-project/commit/6df27dd42d827a2468dcf4b4b1ee1a8e8af1a408
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/bug132435.f90
Log Message:
-----------
[flang] Fix missed case of symbol renaming in module file generation (#132475)
The map of symbols requiring new local aliases for USE association needs
to use the symbols' ultimate resolutions to avoid missing cases that can
arise in convoluted codes with lots of confusing renamings.
Fixes https://github.com/llvm/llvm-project/issues/132435.
Commit: 3bc8aa7823870cb4863cc32eb5917b610b5def87
https://github.com/llvm/llvm-project/commit/3bc8aa7823870cb4863cc32eb5917b610b5def87
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/include/flang/Semantics/expression.h
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/assign04.f90
Log Message:
-----------
[flang] Catch whole assumed-size array as RHS (#132819)
The right-hand side expression of an intrinsic assignment statement may
not be the name of an assumed-size array dummy argument.
Commit: 9b7a7e4b9e44a73978c374f95f90332620f87ce8
https://github.com/llvm/llvm-project/commit/9b7a7e4b9e44a73978c374f95f90332620f87ce8
Author: Brad Smith <brad at comstyle.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_wrapper_getpid.h
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/test/lit.cfg
M openmp/tools/multiplex/ompt-multiplex.h
Log Message:
-----------
[OpenMP] Add support for Haiku (#133034)
Co-authored-by: Jérôme Duval <jerome.duval at gmail.com>
Commit: bcad0501062325457cc9dae4b8b083e3bd2a04e3
https://github.com/llvm/llvm-project/commit/bcad0501062325457cc9dae4b8b083e3bd2a04e3
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A cross-project-tests/tools/llvm-objdump/ARM/lit.local.cfg
A cross-project-tests/tools/llvm-objdump/ARM/plt.c
M lld/test/ELF/arm-gnu-ifunc-plt.s
M lld/test/ELF/arm-mixed-plts.s
M lld/test/ELF/arm-plt-reloc.s
M lld/test/ELF/arm-thumb-interwork-shared.s
M lld/test/ELF/arm-thumb-interwork-thunk.s
M lld/test/ELF/arm-thumb-plt-range-thunk-os.s
M lld/test/ELF/arm-thumb-plt-reloc.s
M lld/test/ELF/arm-thunk-multipass-plt.s
M lld/test/ELF/arm-thunk-re-add.s
M lld/test/ELF/armv8-thumb-plt-reloc.s
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][ARM] Find ELF file PLT entries for arm, thumb (#130764)
This implements arm, armeb, thumb, thumbeb PLT entries parsing support
in ELF for llvm-objdump.
Implementation is similar to AArch64MCInstrAnalysis::findPltEntries. PLT
entry signatures are based on LLD code for PLT generation
(ARM::writePlt).
llvm-objdump tests are produced from lld/test/ELF/arm-plt-reloc.s,
lld/test/ELF/armv8-thumb-plt-reloc.s.
Commit: 86690ce3b79e7f54a6e617a162de6ff5a350e717
https://github.com/llvm/llvm-project/commit/86690ce3b79e7f54a6e617a162de6ff5a350e717
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Remove unnecessary calls MCRegister::id(). NFC
Commit: 2d14797f407fbe69eb969806c0c9cfe1f63ccda4
https://github.com/llvm/llvm-project/commit/2d14797f407fbe69eb969806c0c9cfe1f63ccda4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[Github] Simplify checkout in docs test workflow (#132975)
This makes things quite a bit simpler and also gets rid of some API
calls. We weren't hitting any API limits, but getting rid of them leaves
more quota for other things should we ever need it. This just diffs the
merge commit in the pull request workflows, which gives the diff for the
PR.
Commit: 7b130f4aa896905354a855a341d7ded69fe9f5db
https://github.com/llvm/llvm-project/commit/7b130f4aa896905354a855a341d7ded69fe9f5db
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libc/src/__support/CPP/atomic.h
Log Message:
-----------
[libc][CPP] correct cmpxchg failure ordering inference (#133127)
See https://en.cppreference.com/w/cpp/atomic/atomic/compare_exchange.
The failure order should be inferred from the success order if it is not
explicitly specified.
Commit: 304454f9e71ddbbb6c25e1b5d406131ded2417d0
https://github.com/llvm/llvm-project/commit/304454f9e71ddbbb6c25e1b5d406131ded2417d0
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang-cl] Accept the --warning-suppression-mappings= option (#133092)
Commit: 3ab70e3f90f43f33bd3180c1c3a9f9b00c4d6922
https://github.com/llvm/llvm-project/commit/3ab70e3f90f43f33bd3180c1c3a9f9b00c4d6922
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
A flang/test/Semantics/sizeof.f90
Log Message:
-----------
[Flang] Change sizeof argument name to "x" (#130189)
This closes #128610 by fixing the name of the argument to the sizeof
function to be "x" and adds a test.
Commit: de1c2f24bc1991beed8314ee5922f5768391537e
https://github.com/llvm/llvm-project/commit/de1c2f24bc1991beed8314ee5922f5768391537e
Author: David Green <david.green at arm.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
Log Message:
-----------
[LoopVectorizer][AArch64] Move getMinTripCountTailFoldingThreshold later. (#132170)
This moves the checks of MinTripCountTailFoldingThreshold later, during the
calculation of whether to tail fold. This allows it to check beforehand whether
tail predication is required, either for scalable or fixed-width vectors.
This option is only specified for AArch64, where it returns the minimum of 5.
This patch aims to allow the vectorization of TC=4 loops, preventing them from
performing slower when SVE is present.
Commit: 077940621d2ef1352f0353a58c3130ed6c3034e8
https://github.com/llvm/llvm-project/commit/077940621d2ef1352f0353a58c3130ed6c3034e8
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/test/Driver/debug-parsing-log.f90
A flang/test/Parser/acc-data-statement.f90
A flang/test/Parser/acc.f
Log Message:
-----------
[flang][openacc] Make OpenACC block construct parse errors less verbose. (#131042)
This PR does reduces the verbosity of parser errors for OpenACC block
constructs that do not parse correctly because they are missing their
trailing end block directive by:
- Removing the redundant error messages created by parsing 3 different
styles of directive tokens.
- Providing a general mechanism of configuring the max number of
contexts printed for every syntax error.
- Not printing less specific contexts that are at the same location.
Prior to the changes:
```
$ flang -fc1 -fopenacc -fsyntax-only flang/test/Parser/acc-data-statement.f90 2>&1 | tee acc-data-statement.prior.log | wc -l
262
```
[acc-data-statement.prior.log](https://github.com/user-attachments/files/19298165/acc-data-statement.prior.log)
```
$ flang -fc1 -fopenacc -fsyntax-only flang/test/Parser/acc-data-statement.f90 2>&1 | tee acc-data-statement.prior.log | wc -l
73
```
[acc-data-statement.post.log](https://github.com/user-attachments/files/19298181/acc-data-statement.post.log)
Commit: 9224165871c5555acc568b3895c736ff2a580e1e
https://github.com/llvm/llvm-project/commit/9224165871c5555acc568b3895c736ff2a580e1e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
A .ci/compute_projects.py
A .ci/compute_projects_test.py
Log Message:
-----------
[CI] Add Python Script for Computing Projects/Runtimes to Test
This patch adds a python script, compute_projects, and associated unit
tests for computing the projects and runtimes that need to be tested in
premerge. Rewriting in Python opens up a couple new
improvements/opportunities:
1. I personally find python to be much easier to work with than shell
scripts for tasks like this. Particularly it becomes a lot easier to
work with paths with proper array support.
2. Unit testing becomes easier which makes it a lot easier to reason
about behavior changes, especially in review.
3. Most of the configuration is now setup in some dictionaries, which
makes changes much easier to apply for most of the common changes.
This preserves the behavior of the existing premerge scripts as much as
possible.
Reviewers: ldionne, lnihlen, Endilll, tstellar, Keenuts
Reviewed By: Keenuts
Pull Request: https://github.com/llvm/llvm-project/pull/132634
Commit: 51bceb46f8eeb7c3d060387be315ca41855933c2
https://github.com/llvm/llvm-project/commit/51bceb46f8eeb7c3d060387be315ca41855933c2
Author: Martin Storsjö <martin at martin.st>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
Log Message:
-----------
[libcxx] [test] Fix restoring LLVM_DIR and Clang_DIR (#132838)
In 664f345cd53d1f624d94f9889a1c9fff803e3391, a fix was introduced,
attempting to restore LLVM_DIR and Clang_DIR after doing
find_package(Clang).
However, 6775285e7695f2d45cf455f5d31b2c9fa9362d3d added a return if the
clangTidy target wasn't found. If this is hit, we don't restore LLVM_DIR
and Clang_DIR, which causes strange effects if CMake is rerun a second
time.
Move the code for restoring LLVM_DIR and Clang_DIR to directly after the
find_package calls, to make sure they are restored, regardless of the
find_package outcome.
Commit: 25f4f0a56de741a8120cfeab297211e9505ec1d7
https://github.com/llvm/llvm-project/commit/25f4f0a56de741a8120cfeab297211e9505ec1d7
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/lib/BinaryFormat/ELF.cpp
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/test/tools/llvm-ifs/write-stub.test
Log Message:
-----------
[llvm-ifs] Handle more e_machine values for --target (#128559)
This adds ELF::convertTripleArchTypeToEMachine and uses it in
llvm-ifs. It handles many more Triple::ArchType values than the
old code, though not all since I couldn't quickly discern
what all the mappings are.
Commit: 2d1517d257fcbd0c9bce14badc7646e94d81ea2b
https://github.com/llvm/llvm-project/commit/2d1517d257fcbd0c9bce14badc7646e94d81ea2b
Author: Austin Schuh <AustinSchuh at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/Headers/__clang_cuda_intrinsics.h
Log Message:
-----------
cuda clang: Fix argument order for __reduce_max_sync (#132881)
Fixes: https://github.com/llvm/llvm-project/issues/131415
---------
Signed-off-by: Austin Schuh <austin.linux at gmail.com>
Commit: 2c7d40b2f0c5e68e90297b605ceb70c55d201bca
https://github.com/llvm/llvm-project/commit/2c7d40b2f0c5e68e90297b605ceb70c55d201bca
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-trunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/induction-unroll-novec.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-nested-loop.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-min-index.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
Log Message:
-----------
[VPlan] Generalize SCALAR-STEPS removal to any unroll factor.
Follow-up to dfca6c0d3bf9d1a056 to extend isUnrolled handle any unrolled
VPlan, which means there's a single UF, but it will be > 1 if unrolling
took place.
Commit: d724bab8064685c98cdded88157b6e2245e0d7bc
https://github.com/llvm/llvm-project/commit/d724bab8064685c98cdded88157b6e2245e0d7bc
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Create a libc_header_library macro for hand-in-hand. (#133131)
Create a proper way to build header-only libraries for llvm-libc code
sharing. Use it to group headers that can be shared with libcxx for
std::from_chars() implementation.
It mostly works, though the macro needs to be updated to enforce that no
.cpp files are listed in dependencies (it's not the case now) - see PR
#133126.
Commit: 38aac86a2490ba1974755758e1311a6cbdbefb25
https://github.com/llvm/llvm-project/commit/38aac86a2490ba1974755758e1311a6cbdbefb25
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Speed up inferMatchingSuperRegClass. NFC. (#133060)
SubToSuperRegs was a DenseMap of std::vectors, where the vectors
typically had size 1. Switching to a vector of pairs avoids the overhead
of allocating tiny vectors.
I measured a 1.14x speed-up building AMDGPUGenRegisterInfo.inc with this
patch.
Commit: 9c18edc62123e778d1d713df44aa05c91e7bbbae
https://github.com/llvm/llvm-project/commit/9c18edc62123e778d1d713df44aa05c91e7bbbae
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/FormatEntity.h
M lldb/include/lldb/Core/IOHandler.h
A lldb/include/lldb/Core/Statusline.h
M lldb/include/lldb/Host/Editline.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
A lldb/source/Core/Statusline.cpp
M lldb/source/Host/common/Editline.cpp
R lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py
A lldb/test/API/functionalities/statusline/Makefile
A lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/functionalities/statusline/main.c
Log Message:
-----------
[lldb] Implement a statusline in LLDB (#121860)
Add a statusline to command-line LLDB to display information about the
current state of the debugger. The statusline is a dedicated area
displayed at the bottom of the screen. The information displayed is
configurable through a setting consisting of LLDB’s format strings.
Enablement
----------
The statusline is enabled by default, but can be disabled with the
following setting:
```
(lldb) settings set show-statusline false
```
Configuration
-------------
The statusline is configurable through the `statusline-format` setting.
The default configuration shows the target name, the current file, the
stop reason and any ongoing progress events.
```
(lldb) settings show statusline-format
statusline-format (format-string) = "${ansi.bg.blue}${ansi.fg.black}{${target.file.basename}}{ | ${line.file.basename}:${line.number}:${line.column}}{ | ${thread.stop-reason}}{ | {${progress.count} }${progress.message}}"
```
The statusline supersedes the current progress reporting implementation.
Consequently, the following settings no longer have any effect (but
continue to exist to not break anyone's `.lldbinit`):
```
show-progress -- Whether to show progress or not if the debugger's output is an interactive color-enabled terminal.
show-progress-ansi-prefix -- When displaying progress in a color-enabled terminal, use the ANSI terminal code specified in this format immediately before the progress message.
show-progress-ansi-suffix -- When displaying progress in a color-enabled terminal, use the ANSI terminal code specified in this format immediately after the progress message.
```
Format Strings
--------------
LLDB's format strings are documented in the LLDB documentation and on
the website: https://lldb.llvm.org/use/formatting.html#format-strings.
The current implementation is relatively limited but various
improvements have been discussed in the RFC.
One such improvement is being to display a string when a format string
is empty. Right now, when launching LLDB without a target, the
statusline will be empty, which is expected, but looks rather odd.
RFC
---
The full RFC can be found on Discourse:
https://discourse.llvm.org/t/rfc-lldb-statusline/83948
Commit: 533f85ae0542ee80a9b19bef09234646a7b19d1c
https://github.com/llvm/llvm-project/commit/533f85ae0542ee80a9b19bef09234646a7b19d1c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
Log Message:
-----------
[gn build] Port 9c18edc62123
Commit: fc0102ec043c449ade32805dcd3e70045322934d
https://github.com/llvm/llvm-project/commit/fc0102ec043c449ade32805dcd3e70045322934d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Remove unnecessary struct keyword. NFC
Commit: bfe85230e2dc27493b82ffba5a46c8f7449a6e10
https://github.com/llvm/llvm-project/commit/bfe85230e2dc27493b82ffba5a46c8f7449a6e10
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
Log Message:
-----------
[mlir][IntegerRangeAnalysis] expose maybeReplaceWithConstant (#133151)
This PR exposes `maybeReplaceWithConstant` in headers for downstream
use.
Commit: 6075275e68bd2362095af76b1acb49c2ac9610a4
https://github.com/llvm/llvm-project/commit/6075275e68bd2362095af76b1acb49c2ac9610a4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[AsmPrinter] Don't pass Twine by value. NFC
Commit: 06411399fb6f29277cfb3601f8c9603778f20224
https://github.com/llvm/llvm-project/commit/06411399fb6f29277cfb3601f8c9603778f20224
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] srl pattern for true16 mode (#132987)
Added a srl pattern for true16 flow. Changing right shift 16bit to a
reg_sequence
`srl vgpr32, 16 -> reg_sequence (vgpr32.hi16, 0)`
and finally it's lowered to two COPY
`vdst.lo16 = COPY vsrc.hi16`
`vdst.hi16 = COPY 0`
The benefits of this transform is allowing the following pass to
optimize out these copy.
Commit: 26bc1c6058d0af952de3073dcc9e710b4ba256aa
https://github.com/llvm/llvm-project/commit/26bc1c6058d0af952de3073dcc9e710b4ba256aa
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.ll
Log Message:
-----------
[RISCV] Fix incorrect runline for test
Commit: 78d7dd297f20a7b993ff177d956b0b7446a906f7
https://github.com/llvm/llvm-project/commit/78d7dd297f20a7b993ff177d956b0b7446a906f7
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[github] remove more caches after downloading things (#133129)
This is generally good practice if the caches won't be reused (though
arguably pedantic for the `stage1-toolchain` stage).
`docker history` on comparable images showed that this saves a few
hundred MB on stage1, and ~60MB on the `apt-get` layer of
`ci-container-agent`.
Commit: 3386156b1e8418083e99833d3d22420cf439c039
https://github.com/llvm/llvm-project/commit/3386156b1e8418083e99833d3d22420cf439c039
Author: QuietMisdreavus <QuietMisdreavus at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/Index/extract-api-cursor-cpp.cpp
Log Message:
-----------
[clang][ExtractAPI] fix a couple crashes when used via libclang (#132297)
This PR fixes two crashes in ExtractAPI that occur when decls are
requested via libclang:
- A null-dereference would sometimes happen in
`DeclarationFragmentsBuilder::getFragmentsForClassTemplateSpecialization`
when the template being processed was loaded indirectly via a typedef,
with parameters filled in. The first commit loads the template parameter
locations ahead of time to perform a null check before dereferencing.
- An assertion (or another null-dereference) was happening in
`CXXRecordDecl::bases` when processing a forward-declaration (i.e. a
record without a definition). The second commit guards the use of
`bases` in `ExtractAPIVisitorBase::getBases` by first checking that the
decl in question has a complete definition.
The added test `extract-api-cursor-cpp` adds tests for these two
scenarios to protect against the crash in the future.
Fixes rdar://140592475, fixes rdar://123430367
Commit: 2b43ecd27b9651ac2bfb1328ad14b43a0f47a385
https://github.com/llvm/llvm-project/commit/2b43ecd27b9651ac2bfb1328ad14b43a0f47a385
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor.cpp
Log Message:
-----------
[webkit.RefCntblBaseVirtualDtor] Add support for NoVirtualDestructorBase. (#132497)
This PR adds the support for WTF::NoVirtualDestructorBase, which
signifies to the checker that the class is exempt from having a virtual
destructor.
Commit: 7da71a6b7132be8db76c67e34a2ba497bf851779
https://github.com/llvm/llvm-project/commit/7da71a6b7132be8db76c67e34a2ba497bf851779
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Exclude runtimes from being tested as projects
Before this patch, making a change to a runtime directory (like libcxx)
would cause the project to be added to the LLVM_ENABLE_PROJECTS CMake
flag which is illegal as they can only be built as part of
LLVM_ENABLE_RUNTIMES. This patch fixes that behavior. Test added.
Commit: f1dad0bcb58f2b8bf0d847d4a65909b797be4fa1
https://github.com/llvm/llvm-project/commit/f1dad0bcb58f2b8bf0d847d4a65909b797be4fa1
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
M llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.exe
M llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.o
Log Message:
-----------
[DWARFLinker] Handle empty sequences when processing `DW_AT_LLVM_stmt_sequence` attributes (#132875)
We previously assumed that every `DW_AT_LLVM_stmt_sequence` attribute
has a corresponding sequence in the processed line table. However, this
isn't always true. Some sequences can be removed by the linker if they
are empty, as shown
[here](https://github.com/alx32/llvm-project/blob/release/14.x/llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp#L565-L566).
When an attribute refers to one of these removed sequences, there is no
actual sequence for it to match. In such cases, we update the attribute
to indicate that it is invalid and does not point to any sequence. This
informs readers that the attribute should be ignored.
The newly modified test would have triggered the assert that is being
removed in this patch.
Commit: a629b505757a1853e6083290e5d8d7b82f4f4d4a
https://github.com/llvm/llvm-project/commit/a629b505757a1853e6083290e5d8d7b82f4f4d4a
Author: Ethan Kaji <ethan.kaji at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
Port `NVPTXTargetLowering::LowerCONCAT_VECTORS` to SelectionDAG (#120030)
Ports `NVPTXTargetLowering::LowerCONCAT_VECTORS` to
`llvm/lib/CodeGen/SelectionDAG` as requested in
https://github.com/llvm/llvm-project/issues/116695.
Commit: f9aa7a20d9352102c41285e63c3a1459036af79d
https://github.com/llvm/llvm-project/commit/f9aa7a20d9352102c41285e63c3a1459036af79d
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
A libcxx/test/std/utilities/utility/forward/forward_like.verify.cpp
Log Message:
-----------
[libc++] Verify std::forward_like's mandates clause. (#127318)
The existing using _ForwardLike declaration already fails with a
subsitution failure. The LWG issue was filed to clarify what should
happen for non-referencable types.
Added test to verify libc++ is already enforcing the new Mandates.
Implements:
- LWG3757 What's the effect of std::forward_like<void>(x)
Closes: #105026
Commit: 3c0300d1fecea583c9b3d7689213676db18485aa
https://github.com/llvm/llvm-project/commit/3c0300d1fecea583c9b3d7689213676db18485aa
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M libcxx/include/__ranges/enable_view.h
M libcxx/test/std/ranges/range.req/range.view/enable_view.compile.pass.cpp
M libcxx/test/std/ranges/range.req/range.view/view.compile.pass.cpp
Log Message:
-----------
[libc++][ranges] Adjust inheritance detection for `enable_view` (#132582)
Per [range.view]/6, a `view_interface` isn't a base class of itself, so
`enable_view` should report `false`. Also, current implementation
strategy handles `const` but not `volatile`, IIUC cv-qualifiers should
be consistent handled.
In `enable_view.compile.pass.cpp`, coverage for (`const`) `volatile`
types are added.
Drive-by: Remove one unnessary `test_macro.h` inclusion in a test.
Fixes #132577.
Commit: 88099a7da97b5ea5f12fb8c6c993d7f1b6fe06ce
https://github.com/llvm/llvm-project/commit/88099a7da97b5ea5f12fb8c6c993d7f1b6fe06ce
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
Log Message:
-----------
[LoongArch] Custom lower vector trunc to vector shuffle (#130938)
Commit: 79e82b6f146e39b2498b9eb44033cde8659ba6b7
https://github.com/llvm/llvm-project/commit/79e82b6f146e39b2498b9eb44033cde8659ba6b7
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.ll
M llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.mir
M llvm/test/CodeGen/RISCV/rvv/stores-of-loads-merging.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
Log Message:
-----------
[RISCV] Use a precise size for MMO on scalable spill and fill (#133171)
The primary effect of this is that we get proper scalable sizes printed
by the assembler, but this may also enable proper aliasing analysis. I
don't see any test changes resulting from the later.
Getting the size is slightly tricky as we store the scalable size as a
non-scalable quantity in the object size field for the frame index. We
really should remove that hack at some point...
For the synthetic tuple spills and fills, I dropped the size from the
split loads and stores to avoid incorrect (overly large) sizes. We could
also divide by the NF factor if we felt like writing the code to do so.
Commit: 263ec7221ef6ef96876d75b69ab48bf37dcbb25e
https://github.com/llvm/llvm-project/commit/263ec7221ef6ef96876d75b69ab48bf37dcbb25e
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M mlir/include/mlir/TableGen/Attribute.h
A mlir/include/mlir/TableGen/EnumInfo.h
M mlir/include/mlir/TableGen/Pattern.h
M mlir/lib/TableGen/Attribute.cpp
M mlir/lib/TableGen/CMakeLists.txt
A mlir/lib/TableGen/EnumInfo.cpp
M mlir/lib/TableGen/Pattern.cpp
M mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/mlir-tblgen/TosaUtilsGen.cpp
Log Message:
-----------
[mlir][NFC] Move and rename EnumAttrCase, EnumAttr C++ classes (#132650)
This moves the EnumAttrCase and EnumAttr classes from Attribute.h/.cpp
to a new EnumInfo.h/cpp and renames them to EnumCase and EnumInfo,
respectively.
This doesn't change any of the tablegen files or any user-facing aspects
of the enum attribute generation system, just reorganizes code in order
to make main PR (#132148) shorter.
Commit: 2ca27e7c3e252d5c5fce57c0f85d0290babf82f3
https://github.com/llvm/llvm-project/commit/2ca27e7c3e252d5c5fce57c0f85d0290babf82f3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Fix typo in compute_projects_test.py
I apparently forgot to properly name the test before submitting the last
patch. This patch properly names the test.
Commit: e54f31a20c23b2b1fdb524a63b84361703613c4e
https://github.com/llvm/llvm-project/commit/e54f31a20c23b2b1fdb524a63b84361703613c4e
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M compiler-rt/cmake/builtin-config-ix.cmake
Log Message:
-----------
[compiler-rt][builtins] Add missing flag for builtins standalone build (#133046)
When builtins are built with runtimes, it is built before compiler-rt,
and this makes some of the HAS_XXX_FLAGs missing. In this case, the
COMPILER_RT_HAS_FCF_PROTECTION_FLAG is missing which makes it impossible
to enable CET in this case. This patch addresses this issue by also
check for such flag in standalone build instead of relying on the
compiler-rt's detection.
Commit: d58f57228d46a73059d507eef252a8dfae14f256
https://github.com/llvm/llvm-project/commit/d58f57228d46a73059d507eef252a8dfae14f256
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Use named sub-operands to simplify encoding/decoding for CoreV Reg-Reg instructions. (#133181)
We can name the sub-operands using a DAG in the 'ins'. This allows those
names to be matched to the encoding fields. This removes the need for a
custom encoder/decoder that treats the 2 sub-operands as a single 10-bit
value.
While doing this, I noticed the base and offset names in the
MIOperandInfo were swapped relative to how the operands are parsed and
printed. Assuming that I've correctly understood the parsing/print
format as "offset(base)".
Commit: 64046e9d2628ce421682eea8465e41554b46c96d
https://github.com/llvm/llvm-project/commit/64046e9d2628ce421682eea8465e41554b46c96d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
Log Message:
-----------
[Driver] Use a range constructor of StringSet (NFC) (#133201)
This patch uses a range constructor to collapse:
llvm::StringSet<> Dest;
for (const auto &S : Src)
Dest.insert(S);
down to:
llvm::StringSet<> Dest(llvm::from_range, Src);
Commit: 16d1942c069a7572efceba884452f08a157cb684
https://github.com/llvm/llvm-project/commit/16d1942c069a7572efceba884452f08a157cb684
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Drop '-x c' from riscv-target-features.c. NFC
Commit: cc30fbacec66fd6a53aabc0880de23fc22826a3a
https://github.com/llvm/llvm-project/commit/cc30fbacec66fd6a53aabc0880de23fc22826a3a
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/docs/RISCV/RISCVVectorExtension.rst
Log Message:
-----------
[Docs][RISCV] Update RISCVVectorExtension.rst to reflect RISCVVMV0Elimination. NFC (#133058)
Also correct the old name of RISCVFoldMasks to RISCVVectorPeephole
Commit: 291fd8f2cec30a218d1a8b50958ba4647de7b7c8
https://github.com/llvm/llvm-project/commit/291fd8f2cec30a218d1a8b50958ba4647de7b7c8
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
Log Message:
-----------
clang/lib/Sema/SemaExprCXX.cpp: Suppress a warning introduced in #133113. [-Wunused-but-set-variable]
Commit: 68e90e4f0c57b89be0b3f4cc750019dc34aea3ea
https://github.com/llvm/llvm-project/commit/68e90e4f0c57b89be0b3f4cc750019dc34aea3ea
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M compiler-rt/lib/asan/asan_poisoning.h
Log Message:
-----------
[asan][NFCI] Add ASAN_POISONING_H header guard (#133178)
Commit: 80f216db530eda98a444bc1994c7d69a7107c3c6
https://github.com/llvm/llvm-project/commit/80f216db530eda98a444bc1994c7d69a7107c3c6
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
A clang/test/Modules/no-transitive-decl-change-3.cppm
Log Message:
-----------
[C++20] [Modules] Add a test
A test from a regression in the downstream.
The test should be always good.
Commit: 618e8b9a708ed037ec90c495890344046d78e5bf
https://github.com/llvm/llvm-project/commit/618e8b9a708ed037ec90c495890344046d78e5bf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Avoid unnecessary statusline redraw in HandleProgressEvent
There's no need to call RedrawStatusline from HandleProgressEvent. The
statusline gets redraw after handling all events, including progress
events, in the default event handler loop.
Commit: 55b95151d2a618b12156730962e109b3d5fa67b1
https://github.com/llvm/llvm-project/commit/55b95151d2a618b12156730962e109b3d5fa67b1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M lldb/source/Core/Statusline.cpp
Log Message:
-----------
[lldb] Avoid flickering by not clearing the statusline when redrawing
When redrawing the statusline, the current implementation would clear
the current line before drawing the new content. Since we always
overwrite the whole statusline from beginning to end, there's no need to
clear it and we can avoid the potential for flickering.
Commit: ad51368881bb828dbc0f0c42d7617ac860ec5e04
https://github.com/llvm/llvm-project/commit/ad51368881bb828dbc0f0c42d7617ac860ec5e04
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvmir] add llvm.experimental.constrained.sitofp intrinsics (#133166)
https://llvm.org/docs/LangRef.html#llvm-experimental-constrained-sitofp-intrinsic
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: 9438694a54186ee6173c93d3a662d1a42383bece
https://github.com/llvm/llvm-project/commit/9438694a54186ee6173c93d3a662d1a42383bece
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvmir] Add llvm.intr.ldexp operation (#133070)
https://llvm.org/docs/LangRef.html#llvm-ldexp-intrinsic
Commit: 2df25a47339c38875476e559d80b225dfe07ff02
https://github.com/llvm/llvm-project/commit/2df25a47339c38875476e559d80b225dfe07ff02
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/fold_bitcast_md_range.ll
Log Message:
-----------
Invalidate range metadata when folding bitcast into load (#133095)
Commit: 6294325a535d8042a667ccfb4400a9f63e1bee63
https://github.com/llvm/llvm-project/commit/6294325a535d8042a667ccfb4400a9f63e1bee63
Author: Mallikarjuna Gouda <mgouda at mips.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
A clang/test/CodeGen/Mips/subtarget-feature-test.c
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsSubtarget.h
Log Message:
-----------
[MIPS] Define SubTargetFeature for i6500 cpu (#132907)
PR #130587 defined same SubTargetFeature for CPUs i6400 and i6500 which
resulted into following warning when -mcpu=i6500 was used:
+i6500' is not a recognized feature for this target (ignoring feature)
This PR fixes above issue by defining separate SubTargetFeature for
i6500.
Commit: b8a0558dea942b40f6cdcfaf9b6ba62d4140d693
https://github.com/llvm/llvm-project/commit/b8a0558dea942b40f6cdcfaf9b6ba62d4140d693
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a regression on annotating template angles (#132885)
Annotate the angles in `A<B != A>B` as template opener/closer as it's
unlikely that they are less/greater-than operators in this context.
Fix #132248
Commit: 05fb8408de23c3ccb6125b6886742177755bd757
https://github.com/llvm/llvm-project/commit/05fb8408de23c3ccb6125b6886742177755bd757
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Allow `Language: Cpp` for C files (#133033)
Fix #132832
Commit: 58a0c9570c69ecdf23e998637d2b82cfa455bf14
https://github.com/llvm/llvm-project/commit/58a0c9570c69ecdf23e998637d2b82cfa455bf14
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
R clang/test/CodeGen/Mips/subtarget-feature-test.c
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsSubtarget.h
Log Message:
-----------
Revert "[MIPS] Define SubTargetFeature for i6500 cpu" (#133215)
Reverts llvm/llvm-project#132907 due to some test failures.
Commit: f15924d1d1310527d7d78e8c66655e6b94bc241b
https://github.com/llvm/llvm-project/commit/f15924d1d1310527d7d78e8c66655e6b94bc241b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/AST/NestedNameSpecifier.cpp
Log Message:
-----------
Fix MSVC "not all control paths return a value" warning. NFC.
Commit: 1715386e809eb9f24ed7d874b2f309853d5d8950
https://github.com/llvm/llvm-project/commit/1715386e809eb9f24ed7d874b2f309853d5d8950
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
Fix MSVC signed/unsigned comparison warning. NFC.
Commit: db98e2922f0121f2c6fb3d6f42b40f9774f9a563
https://github.com/llvm/llvm-project/commit/db98e2922f0121f2c6fb3d6f42b40f9774f9a563
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_acosh.h
A libclc/clc/include/clc/math/clc_asinh.h
A libclc/clc/include/clc/math/clc_atanh.h
A libclc/clc/include/clc/math/clc_ep_log.h
A libclc/clc/include/clc/math/clc_ep_log.inc
A libclc/clc/include/clc/math/clc_log1p.h
M libclc/clc/include/clc/math/tables.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_acosh.cl
A libclc/clc/lib/generic/math/clc_acosh.inc
A libclc/clc/lib/generic/math/clc_asinh.cl
A libclc/clc/lib/generic/math/clc_asinh.inc
A libclc/clc/lib/generic/math/clc_atanh.cl
A libclc/clc/lib/generic/math/clc_atanh.inc
A libclc/clc/lib/generic/math/clc_ep_log.cl
A libclc/clc/lib/generic/math/clc_ep_log.inc
A libclc/clc/lib/generic/math/clc_log1p.cl
A libclc/clc/lib/generic/math/clc_log1p.inc
A libclc/clc/lib/generic/math/clc_tables.cl
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_rootn.cl
R libclc/generic/lib/math/ep_log.cl
R libclc/generic/lib/math/ep_log.h
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/tables.cl
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move log1p/asinh/acosh/atanh to the CLC library (#132956)
These four functions all related in that they share tables and helper
functions. Furthermore, the acosh and atanh builtins call log1p.
As with other work in this area, these builtins are now vectorized. To
enable this, there are new table accessor functions which return a
vector of table values using a vector of indices. These are internally
scalarized, in the absence of gather operations. Some tables which were
tables of multiple entries (e.g., double2) are split into two separate
"low" and "high" tables. This might affect the performance of memory
operations but are hopefully mitigated by better codegen overall.
Commit: 00c527abab3dfea5f3122f8151d69e77655eb033
https://github.com/llvm/llvm-project/commit/00c527abab3dfea5f3122f8151d69e77655eb033
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
A llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
Log Message:
-----------
[Coro] Allow spilling @llvm.coro.suspend() to the coro frame (#133088)
It was excluded from spilling in a263a60, possibly by accident.
In the linked bug, we hit a situation like this:
```
%s = call @llvm.coro.suspend(...)
|
switch (%s)
case v1: / \ case v2:
... ...
| suspend point
| ...
\ /
%x = phi [v1] [v2]
|
...
|
use(%x)
```
Instcombine will notice that %x correlates exactly with %s, and so
use(%x) becomes use(%s).
However, corosplit would substitute different values for %s when
splitting the function, so even though %s had a particular value when
control actually passed through the switch, it could have a *different*
value when reaching use(%s).
This illustrates that while IR from the frontend typically does not use
these suspend return values across suspend points, mid-level
optimizations on the presplit coroutine may introduce new uses of
suspend values, so they must be considered eligible to spill to the
coroutine frame.
Fixes: #130326
Commit: f7a3334016580d4e69134b574b8b4081d348ff83
https://github.com/llvm/llvm-project/commit/f7a3334016580d4e69134b574b8b4081d348ff83
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-movmsk-avx.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - add X86ISD::BLENDI handling (#133102)
Commit: 99ec6f8aecc5d4ae8ff2ae6bebe8d670562c19df
https://github.com/llvm/llvm-project/commit/99ec6f8aecc5d4ae8ff2ae6bebe8d670562c19df
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
A llvm/test/MC/LoongArch/Misc/no-aliases.s
Log Message:
-----------
[LoongArch][MC] Add support for disassembly option "no-aliases" (#132900)
This parallels the GNU Binutils feature's usage. A hidden command-line
option `--loongarch-no-aliases` is also added, similar to how
`--loongarch-numeric-reg` is for the `numeric` option.
Commit: d7cea2b18717f0cc31b7da4a03f772d89ee201db
https://github.com/llvm/llvm-project/commit/d7cea2b18717f0cc31b7da4a03f772d89ee201db
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/source/Symbol/UnwindPlan.cpp
Log Message:
-----------
[lldb] Remove UnwindPlan::Row shared_ptrs (#132370)
The surrounding code doesn't use them anymore. This removes the internal
usages.
This patch makes the Rows actual values. An alternative would be to make
them unique_ptrs. That would make vector resizes faster at the cost of
more pointer chasing and heap fragmentation. I don't know which one is
better so I picked the simpler option.
Commit: 71d54cd4f1cc5233437f25479166e4659fbe2e53
https://github.com/llvm/llvm-project/commit/71d54cd4f1cc5233437f25479166e4659fbe2e53
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Symbol/Function.cpp
Log Message:
-----------
[lldb] Remove (deprecated) Function::GetAddressRange (#132923)
All uses have been replaced by GetAddressRange*s* or GetAddress.
Also fix two internal uses of the range member.
Commit: 491d3dfc761e3a03c6bd187533f4684d6864a8cb
https://github.com/llvm/llvm-project/commit/491d3dfc761e3a03c6bd187533f4684d6864a8cb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (#133083)
If the broadcast is already the full vector width, try to prefer a blend over a vector insertion which is usually a lower latency (and sometimes a lower uop count).
Commit: 8abca171c3346eb7c889354d9b2288ad2b7e1504
https://github.com/llvm/llvm-project/commit/8abca171c3346eb7c889354d9b2288ad2b7e1504
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/__cstddef/byte.h
M libcxx/include/__exception/exception.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__exception/operations.h
M libcxx/include/__exception/terminate.h
M libcxx/include/__fwd/byte.h
M libcxx/include/__new/align_val_t.h
M libcxx/include/__new/destroying_delete_t.h
M libcxx/include/__new/exceptions.h
M libcxx/include/__new/new_handler.h
M libcxx/include/__new/nothrow_t.h
M libcxx/include/any
M libcxx/include/typeinfo
M libcxx/include/variant
Log Message:
-----------
[libc++] Introduce unversioned namespace macros (#133009)
We've started using `_LIBCPP_BEGIN_NAMESPACE_STD` and
`_LIBCPP_END_NAMESPACE_STD` for more than just the namespace for a while
now. For example, we're using it to add visibility annotations to types.
This works very well and avoids a bunch of annotations, but doesn't work
for the few places where we have an unversioned namespace. This adds
`_LIBCPP_BEGIN_UNVERSIONED_NAMESPACE_STD` and
`_LIBCPP_END_UNVERSIONED_NAMESPACE_STD` to make it simpler to add new
annotations consistently across the library as well as making it more
explicit that the unversioned namespace is indeed intended.
Commit: 6c2171672f03356835c534a0ec18250233ea66db
https://github.com/llvm/llvm-project/commit/6c2171672f03356835c534a0ec18250233ea66db
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
Fix gcc signed/unsigned comparison warning. NFC.
Commit: 3284559cca4bc64e78e8243bb34195216e8979ee
https://github.com/llvm/llvm-project/commit/3284559cca4bc64e78e8243bb34195216e8979ee
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_atan2.h
A libclc/clc/include/clc/math/clc_atan2pi.h
M libclc/clc/include/clc/math/tables.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_atan2.cl
A libclc/clc/lib/generic/math/clc_atan2.inc
A libclc/clc/lib/generic/math/clc_atan2pi.cl
A libclc/clc/lib/generic/math/clc_atan2pi.inc
M libclc/clc/lib/generic/math/clc_tables.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/tables.cl
Log Message:
-----------
[libclc] Move atan2/atan2pi to the CLC library (#133226)
As with other work in this area, these builtins are now vectorized.
A further table has been split into two. There was discrepancy between
comments above the table describing the values as "lead" and "tail" and
variables taken from the table called "head" and "tail", so these have
been unified as head/tail.
Commit: 6c56a842b73cf2046b9ab8cf077890e11b758373
https://github.com/llvm/llvm-project/commit/6c56a842b73cf2046b9ab8cf077890e11b758373
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGLoopInfo.h
M clang/test/CodeGenCXX/pragma-followup_inner.cpp
M clang/test/CodeGenCXX/pragma-followup_outer.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
Log Message:
-----------
[clang][CodeGen] Generate follow-up metadata for loops in correct format (#131985)
When pragma of loop transformations is specified, follow-up metadata for
loops is generated after each transformation. On the LLVM side,
follow-up metadata is expected to be a list of properties, such as the
following:
```
!followup = !{!"llvm.loop.vectorize.followup_all", !mp, !isvectorized}
!mp = !{!"llvm.loop.mustprogress"}
!isvectorized = !{"llvm.loop.isvectorized"}
```
However, on the clang side, the generated metadata contains an MDNode
that has those properties, as shown below:
```
!followup = !{!"llvm.loop.vectorize.followup_all", !loop_id}
!loop_id = distinct !{!loop_id, !mp, !isvectorized}
!mp = !{!"llvm.loop.mustprogress"}
!isvectorized = !{"llvm.loop.isvectorized"}
```
According to the
[LangRef](https://llvm.org/docs/TransformMetadata.html#transformation-metadata-structure),
the LLVM side is correct. Due to this inconsistency, follow-up metadata
was not interpreted correctly, e.g., only one transformation is applied
when multiple pragmas are used.
This patch fixes clang side to emit followup metadata in correct format.
Commit: 1a140820ab6962a387eeec17ebe669c724822c49
https://github.com/llvm/llvm-project/commit/1a140820ab6962a387eeec17ebe669c724822c49
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV] Have GPRMem on the correct operand in QCIRVInstESStore (#133042)
It should be on rs1 and not rs2.
Commit: a9672515ce6b8b1bc6976ed1225f4fb4d53fa381
https://github.com/llvm/llvm-project/commit/a9672515ce6b8b1bc6976ed1225f4fb4d53fa381
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
Log Message:
-----------
[Clang] Correct the DeclRefExpr's Type after the initializer gets instantiated (#133212)
The instantiation of a VarDecl's initializer might be deferred until the
variable is actually used. However, we were still building the
DeclRefExpr with a type that could later be changed by the initializer's
instantiation, which is incorrect when incomplete arrays are involved.
Fixes #79750
Fixes #113936
Fixes #133047
Commit: 39e7efe1e4304544289d8d1b45f4d04d11b4a791
https://github.com/llvm/llvm-project/commit/39e7efe1e4304544289d8d1b45f4d04d11b4a791
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/unittests/Host/HostTest.cpp
Log Message:
-----------
[lldb] Respect LaunchInfo::SetExecutable in ProcessLauncherPosixFork (#133093)
Using argv[0] for this was incorrect. I'm ignoring LaunchInfo::SetArg0,
as that's what darwin and windows launchers do (they use the first
element of the args vector instead).
I picked up the funny unit test re-exec method from the llvm unit tests.
Commit: a6e56162c251db180f4618202c8088acba311ce8
https://github.com/llvm/llvm-project/commit/a6e56162c251db180f4618202c8088acba311ce8
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Modify operand regclass in load store patterns (#133071)
$rs1 is defined as GPRMem in the correspoding instruction definition
classes.
Commit: 17aca79d98d92510d131c4766a040b02adf6c4b8
https://github.com/llvm/llvm-project/commit/17aca79d98d92510d131c4766a040b02adf6c4b8
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M lldb/include/lldb/Symbol/FuncUnwinders.h
M lldb/include/lldb/Symbol/UnwindTable.h
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindTable.cpp
A lldb/test/Shell/Unwind/Inputs/basic-block-sections-with-dwarf.s
A lldb/test/Shell/Unwind/Inputs/linux-x86_64.yaml
A lldb/test/Shell/Unwind/basic-block-sections-with-dwarf-static.test
A lldb/test/Shell/Unwind/basic-block-sections-with-dwarf.test
Log Message:
-----------
[lldb] Teach FuncUnwinders about discontinuous functions (#133072)
The main change here is that we're now able to correctly look up plans
for these functions. Previously, due to caching, we could end up with
one entry covering most of the address space (because part of the
function was at the beginning and one at the end). Now, we can correctly
recognise that the part in between does not belong to that function, and
we can create a different FuncUnwinders instance for it. It doesn't help
the discontinuous function much (its plan will still be garbled), but
we can at least properly unwind out of the simple functions in between.
Fixing the unwind plans for discontinuous functions requires handling
each unwind source specially, and this setup allows us to make the
transition incrementally.
Commit: ac09b789d8add7325fbf95d0feeb03a29de79b5c
https://github.com/llvm/llvm-project/commit/ac09b789d8add7325fbf95d0feeb03a29de79b5c
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/invalid.mlir
Log Message:
-----------
[mlir][scf] Remove redundant ensureTerminator for `scf.forall` (#133081)
The override function `ensureTerminator` ensures that the terminator
`InParallelOp` has a region. However, if the terminator of `scf.forall`
is not an `InParallelOp`, calling ensureTerminator causes a crash. Since
the InParallelOp builder already guarantees the existence of a region,
`ForallOp::ensureTerminator` is redundant and can be safely removed.
Fixes #130019.
Commit: 17d05695388128353662fbb80bbb7a13d172b41d
https://github.com/llvm/llvm-project/commit/17d05695388128353662fbb80bbb7a13d172b41d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M libcxx/include/__configuration/availability.h
M libcxx/include/__functional/hash.h
M libcxx/include/__string/char_traits.h
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/functional.cpp
Log Message:
-----------
[libc++] Instantiate hash function externally (#127040)
This has multiple benefits:
- There is a single instance of our hash function, reducing object file
size
- The hash implementation isn't instantiated in every TU anymore,
reducing compile times
- Behind an ABI configuration macro it would be possible to salt the
hash
Commit: d0aa1f9c43a4a5709e060aea6c844bdcc70bcd0e
https://github.com/llvm/llvm-project/commit/d0aa1f9c43a4a5709e060aea6c844bdcc70bcd0e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/hip-toolchain-rdc.hip
M libc/startup/gpu/CMakeLists.txt
Log Message:
-----------
[Clang] Make `--lto-partitions` only default for HIP (#133164)
Summary:
The default behavior for LTO on other targets does not specify the
number of LTO partitions. Recent changes made this default to 8 on
AMDGPU which had some issues with the `libc` project. The option to
disable this is HIP only so I think for now we should restrict this just
to HIP.
I'm definitely on board with getting some more parallelism here, but I
think it should probably be restricted to just offloading languages. The
new driver goes through the `--target=amdgcn-amd-amdhsa` for its output,
which means we'd need to forward the default somehow.
Commit: 8fdfe3f2a752b5886faf88c96ce61a0465f7dc9b
https://github.com/llvm/llvm-project/commit/8fdfe3f2a752b5886faf88c96ce61a0465f7dc9b
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/min_element.h
M libcxx/include/__algorithm/ranges_max.h
M libcxx/include/__algorithm/ranges_max_element.h
M libcxx/include/__algorithm/ranges_min.h
M libcxx/include/__algorithm/ranges_min_element.h
Log Message:
-----------
[libc++] Refactor ranges::{min, max, min_element, max_element} to use std::__min_element (#132418)
Previously, ranges::min_element delegated to ranges::__min_element_impl, which
duplicated the definition of std::__min_element. This patch updates
ranges::min_element to directly call std::__min_element, which allows
removing the redundant code in ranges::__min_element_impl.
Upon removal of ranges::__min_element_impl, the other ranges algorithms
ranges::{min,max,max_element}, which previously delegated to ranges::__min_element_impl,
have been updated to call std::__min_element instead.
This refactoring unifies the implementation across these algorithms,
ensuring that future optimizations or maintenance work only need to be
applied in one place.
Commit: 27a437108be83b217d9b7b8360fc40d42ae4458b
https://github.com/llvm/llvm-project/commit/27a437108be83b217d9b7b8360fc40d42ae4458b
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/fpextend.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
Log Message:
-----------
[InstCombine] Handle scalable splats of constants in getMinimumFPType (#132960)
We previously handled ConstantExpr scalable splats in
5d929794a87602cfd873381e11cc99149196bb49, but only fpexts.
ConstantExpr fpexts have since been removed, and simultaneously we
didn't handle splats of constants that weren't extended.
This updates it to remove the fpext check and instead see if we can
shrink the result of getSplatValue.
Note that the test case doesn't get completely folded away due to
#132922
Commit: 1e555e9ea52a1eddf02e8f89ea4c80d4c9f23f51
https://github.com/llvm/llvm-project/commit/1e555e9ea52a1eddf02e8f89ea4c80d4c9f23f51
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-27 (Thu, 27 Mar 2025)
Changed paths:
A .ci/compute_projects.py
A .ci/compute_projects_test.py
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/docs.yml
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/PAuthGadgetScanner.h
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
M bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
M bolt/test/indirect-goto-relocs.test
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/refactor/Rename.h
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/clangd/unittests/StdLibTests.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
M clang-tools-extra/modularize/ModularizeUtilities.h
M clang-tools-extra/modularize/ModuleAssistant.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cdb.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_index.py
M clang/bindings/python/tests/cindex/test_location.py
M clang/bindings/python/tests/cindex/test_translation_unit.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGLoopInfo.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/Hexagon.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/PPC.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/CodeGen/TargetBuiltins/SystemZ.cpp
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/__clang_cuda_intrinsics.h
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_compat_overloads.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
A clang/test/AST/ByteCode/codegen-mutable-read.cpp
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/cxx-uninitialized-object.cpp
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/fixed-address-notes.c
A clang/test/Analysis/issue-91835.cpp
A clang/test/Analysis/lambda-capture-structured-binding.cpp
M clang/test/Analysis/misc-ps.m
M clang/test/Analysis/pr22954.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
A clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/CodeGen/int-to-bool.cpp
M clang/test/CIR/CodeGen/loop.cpp
A clang/test/CIR/Lowering/binop-bool.cir
A clang/test/CIR/Lowering/binop-fp.cir
A clang/test/CIR/Lowering/binop-signed-int.cir
A clang/test/CIR/Lowering/binop-unsigned-int.cir
M clang/test/CIR/Lowering/cast.cir
A clang/test/CIR/Transforms/hoist-allocas.cir
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-detection.c
A clang/test/CodeGen/RISCV/issue-129995.cpp
R clang/test/CodeGen/RISCV/pr129995.cc
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGenCXX/pragma-followup_inner.cpp
M clang/test/CodeGenCXX/pragma-followup_outer.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M clang/test/CodeGenHLSL/builtins/acos.hlsl
M clang/test/CodeGenHLSL/builtins/asin.hlsl
M clang/test/CodeGenHLSL/builtins/atan.hlsl
M clang/test/CodeGenHLSL/builtins/atan2.hlsl
M clang/test/CodeGenHLSL/builtins/ceil.hlsl
M clang/test/CodeGenHLSL/builtins/cos.hlsl
M clang/test/CodeGenHLSL/builtins/cosh.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
M clang/test/CodeGenHLSL/builtins/floor.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/lerp.hlsl
M clang/test/CodeGenHLSL/builtins/log.hlsl
M clang/test/CodeGenHLSL/builtins/log10.hlsl
M clang/test/CodeGenHLSL/builtins/log2.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/pow.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
M clang/test/CodeGenHLSL/builtins/sin.hlsl
M clang/test/CodeGenHLSL/builtins/sinh.hlsl
M clang/test/CodeGenHLSL/builtins/sqrt.hlsl
M clang/test/CodeGenHLSL/builtins/step.hlsl
M clang/test/CodeGenHLSL/builtins/tan.hlsl
M clang/test/CodeGenHLSL/builtins/tanh.hlsl
M clang/test/CodeGenHLSL/builtins/trunc.hlsl
M clang/test/Driver/aarch64-mcpu-native.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/cl-options.c
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/print-enabled-extensions/aarch64-grace.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
A clang/test/Index/extract-api-cursor-cpp.cpp
A clang/test/Modules/no-transitive-decl-change-3.cppm
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
M clang/test/SemaCXX/member-pointer.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaTemplate/instantiation-backtrace.cpp
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
M clang/tools/cir-opt/cir-opt.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/MacroExpansionContextTest.cpp
M clang/unittests/Basic/SourceManagerTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Lex/HeaderSearchTest.cpp
M clang/unittests/Lex/LexerTest.cpp
M clang/unittests/Lex/ModuleDeclStateTest.cpp
M clang/unittests/Lex/PPCallbacksTest.cpp
M clang/unittests/Lex/PPConditionalDirectiveRecordTest.cpp
M clang/unittests/Lex/PPDependencyDirectivesTest.cpp
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/asan/asan_poisoning.h
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_posix_libcdep.cpp
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/asan/TestCases/Posix/setproctitle.c
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/profile/instrprof-darwin-dead-strip.c
A compiler-rt/test/sanitizer_common/TestCases/disable_symbolizer_path_search.cpp
A cross-project-tests/tools/llvm-objdump/ARM/lit.local.cfg
A cross-project-tests/tools/llvm-objdump/ARM/plt.c
M flang-rt/CMakeLists.txt
R flang-rt/cmake/clang_gcc_root.cpp
M flang-rt/cmake/quadmath_wrapper.h.in
M flang-rt/lib/quadmath/CMakeLists.txt
M flang-rt/lib/runtime/command.cpp
M flang-rt/lib/runtime/exceptions.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/unittests/Runtime/ExternalIOTest.cpp
M flang-rt/unittests/Runtime/ListInputTest.cpp
M flang-rt/unittests/Runtime/LogicalFormatTest.cpp
M flang-rt/unittests/Runtime/Namelist.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang-rt/unittests/Runtime/RuntimeCrashTest.cpp
M flang/cmake/modules/FlangCommon.cmake
A flang/cmake/quadmath_wrapper.h.in
M flang/docs/Intrinsics.md
M flang/include/flang/Common/windows-include.h
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Command.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/command.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/extensions.h
R flang/include/flang/Runtime/io-api-consts.h
M flang/include/flang/Runtime/io-api.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/CMakeLists.txt
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/test/Driver/debug-parsing-log.f90
A flang/test/Driver/slp-vectorize.f90
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
A flang/test/Lower/Intrinsics/hostnm-func.f90
A flang/test/Lower/Intrinsics/hostnm-sub.f90
M flang/test/Lower/Intrinsics/ieee_compare.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_next.f90
M flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/nearest.f90
A flang/test/Parser/acc-data-statement.f90
A flang/test/Parser/acc.f
A flang/test/Preprocessing/kind-suffix.F90
M flang/test/Semantics/assign04.f90
A flang/test/Semantics/bug132435.f90
A flang/test/Semantics/hostnm.f90
A flang/test/Semantics/sizeof.f90
A flang/test/Semantics/sync-images.f90
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/VISIT.h
M libc/include/search.yaml
M libc/shared/rpc.h
M libc/src/__support/CPP/atomic.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/math/generic/coshf16.cpp
M libc/src/math/generic/sinhf16.cpp
M libc/src/time/time_utils.cpp
M libc/test/src/__support/CPP/atomic_test.cpp
A libclc/clc/include/clc/math/clc_acosh.h
A libclc/clc/include/clc/math/clc_asinh.h
A libclc/clc/include/clc/math/clc_atan2.h
A libclc/clc/include/clc/math/clc_atan2pi.h
A libclc/clc/include/clc/math/clc_atanh.h
A libclc/clc/include/clc/math/clc_ep_log.h
A libclc/clc/include/clc/math/clc_ep_log.inc
A libclc/clc/include/clc/math/clc_log1p.h
M libclc/clc/include/clc/math/tables.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_acosh.cl
A libclc/clc/lib/generic/math/clc_acosh.inc
A libclc/clc/lib/generic/math/clc_asinh.cl
A libclc/clc/lib/generic/math/clc_asinh.inc
A libclc/clc/lib/generic/math/clc_atan2.cl
A libclc/clc/lib/generic/math/clc_atan2.inc
A libclc/clc/lib/generic/math/clc_atan2pi.cl
A libclc/clc/lib/generic/math/clc_atan2pi.inc
A libclc/clc/lib/generic/math/clc_atanh.cl
A libclc/clc/lib/generic/math/clc_atanh.inc
A libclc/clc/lib/generic/math/clc_ep_log.cl
A libclc/clc/lib/generic/math/clc_ep_log.inc
A libclc/clc/lib/generic/math/clc_log1p.cl
A libclc/clc/lib/generic/math/clc_log1p.inc
A libclc/clc/lib/generic/math/clc_tables.cl
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_rootn.cl
R libclc/generic/lib/math/ep_log.cl
R libclc/generic/lib/math/ep_log.h
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/tables.cl
M libclc/spirv/lib/SOURCES
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__algorithm/min_element.h
M libcxx/include/__algorithm/ranges_max.h
M libcxx/include/__algorithm/ranges_max_element.h
M libcxx/include/__algorithm/ranges_min.h
M libcxx/include/__algorithm/ranges_min_element.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__algorithm/stable_sort.h
M libcxx/include/__bit_reference
M libcxx/include/__config
M libcxx/include/__configuration/availability.h
M libcxx/include/__cstddef/byte.h
M libcxx/include/__exception/exception.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__exception/operations.h
M libcxx/include/__exception/terminate.h
M libcxx/include/__functional/hash.h
M libcxx/include/__functional/reference_wrapper.h
M libcxx/include/__fwd/byte.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__new/align_val_t.h
M libcxx/include/__new/destroying_delete_t.h
M libcxx/include/__new/exceptions.h
M libcxx/include/__new/new_handler.h
M libcxx/include/__new/nothrow_t.h
M libcxx/include/__ranges/enable_view.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__tuple/tuple_size.h
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__vector/vector.h
M libcxx/include/any
M libcxx/include/bitset
M libcxx/include/module.modulemap
M libcxx/include/typeinfo
M libcxx/include/utility
M libcxx/include/variant
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/functional.cpp
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/libcxx/type_traits/desugars_to.compile.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/refwrap/desugars_to.compile.pass.cpp
M libcxx/test/std/ranges/range.req/range.view/enable_view.compile.pass.cpp
M libcxx/test/std/ranges/range.req/range.view/view.compile.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_incomplete.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_incomplete.verify.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_structured_bindings.pass.cpp
A libcxx/test/std/utilities/utility/forward/forward_like.verify.cpp
A libcxx/test/std/utilities/utility/mem.res/mem.res.monotonic.buffer/mem.res.monotonic.buffer.mem/release_reset_initial_status.pass.cpp
A libcxx/test/std/utilities/utility/utility.monostate.relpos/relops.pass.cpp
A libcxx/test/std/utilities/utility/utility.monostate/monostate.pass.cpp
M libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
M libcxx/utils/ci/BOT_OWNERS.txt
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Options.td
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/arm-gnu-ifunc-plt.s
M lld/test/ELF/arm-mixed-plts.s
M lld/test/ELF/arm-plt-reloc.s
M lld/test/ELF/arm-thumb-interwork-shared.s
M lld/test/ELF/arm-thumb-interwork-thunk.s
M lld/test/ELF/arm-thumb-plt-range-thunk-os.s
M lld/test/ELF/arm-thumb-plt-reloc.s
M lld/test/ELF/arm-thunk-multipass-plt.s
M lld/test/ELF/arm-thunk-re-add.s
M lld/test/ELF/armv8-thumb-plt-reloc.s
A lld/test/ELF/why-live.test
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/FormatEntity.h
M lldb/include/lldb/Core/IOHandler.h
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Core/Module.h
A lldb/include/lldb/Core/Statusline.h
M lldb/include/lldb/Expression/DWARFExpressionList.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Interpreter/CommandInterpreter.h
M lldb/include/lldb/Symbol/FuncUnwinders.h
M lldb/include/lldb/Symbol/Function.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Symbol/UnwindTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
A lldb/source/Core/Statusline.cpp
M lldb/source/Expression/DWARFExpressionList.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Symbol/UnwindTable.cpp
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/Makefile
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/TestNestedBreakpointCommands.py
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/main.c
A lldb/test/API/functionalities/breakpoint/nested_breakpoint_commands/make_bkpt_cmds.py
R lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py
A lldb/test/API/functionalities/statusline/Makefile
A lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/functionalities/statusline/main.c
A lldb/test/Shell/Unwind/Inputs/basic-block-sections-with-dwarf.s
A lldb/test/Shell/Unwind/Inputs/linux-x86_64.yaml
A lldb/test/Shell/Unwind/basic-block-sections-with-dwarf-static.test
A lldb/test/Shell/Unwind/basic-block-sections-with-dwarf.test
M lldb/unittests/Host/HostTest.cpp
M llvm/CMakeLists.txt
M llvm/docs/CommandGuide/llvm-mca.rst
M llvm/docs/LangRef.rst
M llvm/docs/LoopTerminology.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/TargetParser/AArch64FeatPriorities.inc
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Utils/LockstepReverseIterator.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/ELF.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Assumptions.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
R llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/lib/Target/SPIRV/SPIRVIRMapping.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Analysis/CostModel/AArch64/cast.ll
M llvm/test/Analysis/CostModel/AArch64/no-sve-no-neon.ll
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
A llvm/test/Analysis/CostModel/NVPTX/inline-asm.ll
A llvm/test/Analysis/CostModel/NVPTX/lit.local.cfg
A llvm/test/Bitcode/array-bitstride.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-convert-v4f64.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/complex-int-to-fp.ll
M llvm/test/CodeGen/AArch64/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fprcvt-cvtf.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AArch64/vector-fcvt.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
A llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
A llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
A llvm/test/CodeGen/ARM/rotate-add.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-backward.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-forward.ll
M llvm/test/CodeGen/AVR/hardware-mul.ll
M llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
A llvm/test/CodeGen/AVR/issue-132203.ll
M llvm/test/CodeGen/Generic/MIRStripDebug/no-metadata-present.mir
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/MIR/AArch64/empty-MF.mir
M llvm/test/CodeGen/NVPTX/fp-contract.ll
A llvm/test/CodeGen/NVPTX/nvptx-aa-inline-asm.ll
A llvm/test/CodeGen/NVPTX/rotate-add.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
A llvm/test/CodeGen/RISCV/option-exact-inlineasm.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vandn.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.ll
M llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.mir
M llvm/test/CodeGen/RISCV/rvv/stores-of-loads-merging.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
A llvm/test/CodeGen/SPIRV/GroupAndSubgroupInstructions.spvasm
M llvm/test/CodeGen/SPIRV/SampledImageRetType.ll
M llvm/test/CodeGen/SPIRV/atomicrmw.ll
M llvm/test/CodeGen/SPIRV/const-array-in-struct.ll
M llvm/test/CodeGen/SPIRV/const-composite.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_checked.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-composite.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-type-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/image/sampler.ll
M llvm/test/CodeGen/SPIRV/inline/type.ll
M llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
M llvm/test/CodeGen/SPIRV/literals.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-comparison.ll.bak
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/smul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/umul.with.overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/usub.with.overflow.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/pointers/array-skips-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-eq-types.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/scoped_atomicrmw.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
A llvm/test/CodeGen/SPIRV/store-bool.ll
M llvm/test/CodeGen/SPIRV/struct.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchangeExplicit_cl20.ll
M llvm/test/CodeGen/SPIRV/transcoding/BuildNDRange.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorInsertDynamic_i16.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_legacy.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_work_item_fence.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/barrier.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/work_group_barrier.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/transcoding/group_ops.ll
M llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_clustered_reduce.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_extended_types.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_shuffle_relative.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
A llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/combine-movmsk-avx.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
A llvm/test/CodeGen/X86/fold_bitcast_md_range.ll
M llvm/test/CodeGen/X86/isel-sqrt.ll
A llvm/test/CodeGen/X86/rotate-add.ll
M llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
M llvm/test/CodeGen/X86/win32-eh.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
R llvm/test/MC/AArch64/SME2/st1b
M llvm/test/MC/AArch64/coff-relocations-diags.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf_err.s
M llvm/test/MC/LoongArch/Macros/aliases-br.s
A llvm/test/MC/LoongArch/Misc/no-aliases.s
A llvm/test/MC/RISCV/option-exact.s
M llvm/test/MC/RISCV/option-invalid.s
A llvm/test/TableGen/RegisterInfoEmitter-inherit-properties.td
M llvm/test/Transforms/Coroutines/coro-materialize.ll
A llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/InstCombine/fpextend.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
A llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-trunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/induction-unroll-novec.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-nested-loop.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-min-index.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
R llvm/test/Transforms/SLPVectorizer/X86/BinOpSameOpcodeHelper.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
R llvm/test/Transforms/SLPVectorizer/isOpcodeOrAlt.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
M llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.exe
M llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.o
A llvm/test/tools/llvm-exegesis/X86/mcpu_not_set_during_cross_compilation.s
M llvm/test/tools/llvm-ifs/write-stub.test
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s
A llvm/test/tools/llvm-symbolizer/use-debug-info-line-info.s
M llvm/test/tools/obj2yaml/Minidump/basic.yaml
M llvm/tools/bugpoint/CrashDebugger.cpp
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-mca/Views/InstructionInfoView.cpp
M llvm/tools/llvm-mca/Views/InstructionInfoView.h
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/DebugTypeODRUniquingTest.cpp
M llvm/unittests/Support/YAMLIOTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/gn/secondary/clang/test/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/TableGen/Attribute.h
A mlir/include/mlir/TableGen/EnumInfo.h
M mlir/include/mlir/TableGen/Pattern.h
M mlir/lib/Analysis/Liveness.cpp
M mlir/lib/Analysis/TopologicalSortUtils.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVEnums.cpp
M mlir/lib/Dialect/SPIRV/IR/TargetAndABI.cpp
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/IR/AttributeDetail.h
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Pass/PassCrashRecovery.cpp
M mlir/lib/TableGen/Attribute.cpp
M mlir/lib/TableGen/CMakeLists.txt
A mlir/lib/TableGen/EnumInfo.cpp
M mlir/lib/TableGen/Pattern.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/InliningUtils.cpp
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
R mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope-with-crash-reproduction.mlir
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/SCF/invalid.mlir
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/Tensor/mesh-spmdization.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
R mlir/test/IR/test-builtin-distinct-attrs-with-crash-reproduction.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Target/LLVMIR/Import/alias.ll
M mlir/test/Target/LLVMIR/Import/exception.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/mlir-tblgen/TosaUtilsGen.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_wrapper_getpid.h
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/test/lit.cfg
M openmp/tools/multiplex/ompt-multiplex.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
Rebase, address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/cae674e4ae6b...1e555e9ea52a
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